1 /* 2 * (C) Copyright 2006-2008 3 * Texas Instruments. 4 * Richard Woodruff <r-woodruff2@ti.com> 5 * Syed Mohammed Khasim <x0khasim@ti.com> 6 * 7 * (C) Copyright 2009 8 * Frederik Kriewitz <frederik@kriewitz.eu> 9 * 10 * Configuration settings for the DevKit8000 board. 11 * 12 * SPDX-License-Identifier: GPL-2.0+ 13 */ 14 15 #ifndef __CONFIG_H 16 #define __CONFIG_H 17 18 /* High Level Configuration Options */ 19 #define CONFIG_MACH_TYPE MACH_TYPE_DEVKIT8000 20 21 /* 22 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM 23 * 64 bytes before this address should be set aside for u-boot.img's 24 * header. That is 0x800FFFC0--0x80100000 should not be used for any 25 * other needs. 26 */ 27 #define CONFIG_SYS_TEXT_BASE 0x80100000 28 29 #define CONFIG_SPL_BSS_START_ADDR 0x80000500 /* leave space for bootargs*/ 30 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 31 32 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 33 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */ 34 35 /* Physical Memory Map */ 36 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ 37 38 #include <configs/ti_omap3_common.h> 39 40 #define CONFIG_MISC_INIT_R 41 42 #define CONFIG_REVISION_TAG 1 43 44 /* Size of malloc() pool */ 45 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ 46 /* Sector */ 47 #undef CONFIG_SYS_MALLOC_LEN 48 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10)) 49 50 /* Hardware drivers */ 51 /* DM9000 */ 52 #define CONFIG_NET_RETRY_COUNT 20 53 #define CONFIG_DRIVER_DM9000 1 54 #define CONFIG_DM9000_BASE 0x2c000000 55 #define DM9000_IO CONFIG_DM9000_BASE 56 #define DM9000_DATA (CONFIG_DM9000_BASE + 0x400) 57 #define CONFIG_DM9000_USE_16BIT 1 58 #define CONFIG_DM9000_NO_SROM 1 59 #undef CONFIG_DM9000_DEBUG 60 61 /* SPI */ 62 #undef CONFIG_SPI 63 #undef CONFIG_OMAP3_SPI 64 65 /* I2C */ 66 67 /* TWL4030 */ 68 #define CONFIG_TWL4030_LED 1 69 70 /* Board NAND Info */ 71 #define MTDIDS_DEFAULT "nand0=nand" 72 #define MTDPARTS_DEFAULT "mtdparts=nand:" \ 73 "512k(x-loader)," \ 74 "1920k(u-boot)," \ 75 "128k(u-boot-env)," \ 76 "4m(kernel)," \ 77 "-(fs)" 78 79 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ 80 /* to access nand */ 81 #define CONFIG_JFFS2_NAND 82 /* nand device jffs2 lives on */ 83 #define CONFIG_JFFS2_DEV "nand0" 84 /* start of jffs2 partition */ 85 #define CONFIG_JFFS2_PART_OFFSET 0x680000 86 #define CONFIG_JFFS2_PART_SIZE 0xf980000 /* size of jffs2 */ 87 /* partition */ 88 89 #undef CONFIG_SUPPORT_RAW_INITRD 90 91 /* BOOTP/DHCP options */ 92 #define CONFIG_BOOTP_SUBNETMASK 93 #define CONFIG_BOOTP_GATEWAY 94 #define CONFIG_BOOTP_HOSTNAME 95 #define CONFIG_BOOTP_NISDOMAIN 96 #define CONFIG_BOOTP_BOOTPATH 97 #define CONFIG_BOOTP_BOOTFILESIZE 98 #define CONFIG_BOOTP_DNS 99 #define CONFIG_BOOTP_DNS2 100 #define CONFIG_BOOTP_SEND_HOSTNAME 101 #define CONFIG_BOOTP_NTPSERVER 102 #define CONFIG_BOOTP_TIMEOFFSET 103 #undef CONFIG_BOOTP_VENDOREX 104 105 /* Environment information */ 106 #define CONFIG_EXTRA_ENV_SETTINGS \ 107 "loadaddr=0x82000000\0" \ 108 "console=ttyO2,115200n8\0" \ 109 "mmcdev=0\0" \ 110 "vram=12M\0" \ 111 "dvimode=1024x768MR-16@60\0" \ 112 "defaultdisplay=dvi\0" \ 113 "nfsopts=hard,tcp,rsize=65536,wsize=65536\0" \ 114 "kernelopts=rw\0" \ 115 "commonargs=" \ 116 "setenv bootargs console=${console} " \ 117 "vram=${vram} " \ 118 "omapfb.mode=dvi:${dvimode} " \ 119 "omapdss.def_disp=${defaultdisplay}\0" \ 120 "mmcargs=" \ 121 "run commonargs; " \ 122 "setenv bootargs ${bootargs} " \ 123 "root=/dev/mmcblk0p2 " \ 124 "rootwait " \ 125 "${kernelopts}\0" \ 126 "nandargs=" \ 127 "run commonargs; " \ 128 "setenv bootargs ${bootargs} " \ 129 "omapfb.mode=dvi:${dvimode} " \ 130 "omapdss.def_disp=${defaultdisplay} " \ 131 "root=/dev/mtdblock4 " \ 132 "rootfstype=jffs2 " \ 133 "${kernelopts}\0" \ 134 "netargs=" \ 135 "run commonargs; " \ 136 "setenv bootargs ${bootargs} " \ 137 "root=/dev/nfs " \ 138 "nfsroot=${serverip}:${rootpath},${nfsopts} " \ 139 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off " \ 140 "${kernelopts} " \ 141 "dnsip1=${dnsip} " \ 142 "dnsip2=${dnsip2}\0" \ 143 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ 144 "bootscript=echo Running bootscript from mmc ...; " \ 145 "source ${loadaddr}\0" \ 146 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ 147 "eraseenv=nand unlock 0x260000 0x20000; nand erase 0x260000 0x20000\0" \ 148 "mmcboot=echo Booting from mmc ...; " \ 149 "run mmcargs; " \ 150 "bootm ${loadaddr}\0" \ 151 "nandboot=echo Booting from nand ...; " \ 152 "run nandargs; " \ 153 "nand read ${loadaddr} 280000 400000; " \ 154 "bootm ${loadaddr}\0" \ 155 "netboot=echo Booting from network ...; " \ 156 "dhcp ${loadaddr}; " \ 157 "run netargs; " \ 158 "bootm ${loadaddr}\0" \ 159 "autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \ 160 "if run loadbootscript; then " \ 161 "run bootscript; " \ 162 "else " \ 163 "if run loaduimage; then " \ 164 "run mmcboot; " \ 165 "else run nandboot; " \ 166 "fi; " \ 167 "fi; " \ 168 "else run nandboot; fi\0" 169 170 #define CONFIG_BOOTCOMMAND "run autoboot" 171 172 /* Boot Argument Buffer Size */ 173 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0 + 0x07000000) 174 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ 175 0x01000000) /* 16MB */ 176 177 /* NAND and environment organization */ 178 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ 179 180 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET 181 182 /* SRAM config */ 183 #define CONFIG_SYS_SRAM_START 0x40200000 184 #define CONFIG_SYS_SRAM_SIZE 0x10000 185 186 /* Defines for SPL */ 187 188 #undef CONFIG_SPL_TEXT_BASE 189 #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/ 190 191 /* NAND boot config */ 192 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT 193 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 194 #define CONFIG_SYS_NAND_PAGE_COUNT 64 195 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 196 #define CONFIG_SYS_NAND_OOBSIZE 64 197 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) 198 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 199 #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\ 200 10, 11, 12, 13} 201 202 #define CONFIG_SYS_NAND_ECCSIZE 512 203 #define CONFIG_SYS_NAND_ECCBYTES 3 204 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW 205 206 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 207 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x200000 208 209 /* SPL OS boot options */ 210 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000 211 212 #undef CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 213 #undef CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 214 #undef CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 215 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x500 /* address 0xa0000 */ 216 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x8 /* address 0x1000 */ 217 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 8 /* 4KB */ 218 219 #undef CONFIG_SYS_SPL_ARGS_ADDR 220 #define CONFIG_SYS_SPL_ARGS_ADDR (PHYS_SDRAM_1 + 0x100) 221 222 #endif /* __CONFIG_H */ 223