1 /*
2  * Copyright (C) 2014 Stefan Roese <sr@denx.de>
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 #ifndef _CONFIG_DB_88F6820_GP_H
8 #define _CONFIG_DB_88F6820_GP_H
9 
10 /*
11  * High Level Configuration Options (easy to change)
12  */
13 #define CONFIG_DB_88F6820_GP		/* Board target name for DDR training */
14 
15 #define CONFIG_DISPLAY_BOARDINFO_LATE
16 
17 /*
18  * TEXT_BASE needs to be below 16MiB, since this area is scrubbed
19  * for DDR ECC byte filling in the SPL before loading the main
20  * U-Boot into it.
21  */
22 #define	CONFIG_SYS_TEXT_BASE	0x00800000
23 #define CONFIG_SYS_TCLK		250000000	/* 250MHz */
24 
25 /*
26  * Commands configuration
27  */
28 #define CONFIG_SYS_NO_FLASH		/* Declare no flash (NOR/SPI) */
29 #define CONFIG_CMD_CACHE
30 #define CONFIG_CMD_DHCP
31 #define CONFIG_CMD_ENV
32 #define CONFIG_CMD_EXT2
33 #define CONFIG_CMD_EXT4
34 #define CONFIG_CMD_FAT
35 #define CONFIG_CMD_FS_GENERIC
36 #define CONFIG_CMD_I2C
37 #define CONFIG_CMD_MMC
38 #define CONFIG_CMD_PCI
39 #define CONFIG_CMD_PING
40 #define CONFIG_CMD_SCSI
41 #define CONFIG_CMD_SF
42 #define CONFIG_CMD_SPI
43 #define CONFIG_CMD_TFTPPUT
44 #define CONFIG_CMD_TIME
45 
46 /* I2C */
47 #define CONFIG_SYS_I2C
48 #define CONFIG_SYS_I2C_MVTWSI
49 #define CONFIG_I2C_MVTWSI_BASE0		MVEBU_TWSI_BASE
50 #define CONFIG_SYS_I2C_SLAVE		0x0
51 #define CONFIG_SYS_I2C_SPEED		100000
52 
53 /* SPI NOR flash default params, used by sf commands */
54 #define CONFIG_SF_DEFAULT_SPEED		1000000
55 #define CONFIG_SF_DEFAULT_MODE		SPI_MODE_3
56 
57 /*
58  * SDIO/MMC Card Configuration
59  */
60 #define CONFIG_MMC
61 #define CONFIG_MMC_SDMA
62 #define CONFIG_GENERIC_MMC
63 #define CONFIG_SDHCI
64 #define CONFIG_MV_SDHCI
65 #define CONFIG_SYS_MMC_BASE		MVEBU_SDIO_BASE
66 
67 /*
68  * SATA/SCSI/AHCI configuration
69  */
70 #define CONFIG_LIBATA
71 #define CONFIG_SCSI_AHCI
72 #define CONFIG_SCSI_AHCI_PLAT
73 #define CONFIG_SYS_SCSI_MAX_SCSI_ID	2
74 #define CONFIG_SYS_SCSI_MAX_LUN		1
75 #define CONFIG_SYS_SCSI_MAX_DEVICE	(CONFIG_SYS_SCSI_MAX_SCSI_ID * \
76 					 CONFIG_SYS_SCSI_MAX_LUN)
77 
78 /* Partition support */
79 #define CONFIG_DOS_PARTITION
80 #define CONFIG_EFI_PARTITION
81 
82 /* Additional FS support/configuration */
83 #define CONFIG_SUPPORT_VFAT
84 
85 /* USB/EHCI configuration */
86 #define CONFIG_EHCI_IS_TDI
87 
88 /* Environment in SPI NOR flash */
89 #define CONFIG_ENV_IS_IN_SPI_FLASH
90 #define CONFIG_ENV_OFFSET		(1 << 20) /* 1MiB in */
91 #define CONFIG_ENV_SIZE			(64 << 10) /* 64KiB */
92 #define CONFIG_ENV_SECT_SIZE		(256 << 10) /* 256KiB sectors */
93 
94 #define CONFIG_PHY_MARVELL		/* there is a marvell phy */
95 #define PHY_ANEG_TIMEOUT	8000	/* PHY needs a longer aneg time */
96 
97 /* PCIe support */
98 #ifndef CONFIG_SPL_BUILD
99 #define CONFIG_PCI
100 #define CONFIG_PCI_MVEBU
101 #define CONFIG_PCI_PNP
102 #define CONFIG_PCI_SCAN_SHOW
103 #endif
104 
105 #define CONFIG_SYS_CONSOLE_INFO_QUIET	/* don't print console @ startup */
106 #define CONFIG_SYS_ALT_MEMTEST
107 
108 /* Keep device tree and initrd in lower memory so the kernel can access them */
109 #define CONFIG_EXTRA_ENV_SETTINGS	\
110 	"fdt_high=0x10000000\0"		\
111 	"initrd_high=0x10000000\0"
112 
113 /* SPL */
114 /*
115  * Select the boot device here
116  *
117  * Currently supported are:
118  * SPL_BOOT_SPI_NOR_FLASH	- Booting via SPI NOR flash
119  * SPL_BOOT_SDIO_MMC_CARD	- Booting via SDIO/MMC card (partition 1)
120  */
121 #define SPL_BOOT_SPI_NOR_FLASH		1
122 #define SPL_BOOT_SDIO_MMC_CARD		2
123 #define CONFIG_SPL_BOOT_DEVICE		SPL_BOOT_SPI_NOR_FLASH
124 
125 /* Defines for SPL */
126 #define CONFIG_SPL_FRAMEWORK
127 #define CONFIG_SPL_SIZE			(140 << 10)
128 #define CONFIG_SPL_TEXT_BASE		0x40000030
129 #define CONFIG_SPL_MAX_SIZE		(CONFIG_SPL_SIZE - 0x0030)
130 
131 #define CONFIG_SPL_BSS_START_ADDR	(0x40000000 + CONFIG_SPL_SIZE)
132 #define CONFIG_SPL_BSS_MAX_SIZE		(16 << 10)
133 
134 #ifdef CONFIG_SPL_BUILD
135 #define CONFIG_SYS_MALLOC_SIMPLE
136 #endif
137 
138 #define CONFIG_SPL_STACK		(0x40000000 + ((192 - 16) << 10))
139 #define CONFIG_SPL_BOOTROM_SAVE		(CONFIG_SPL_STACK + 4)
140 
141 #define CONFIG_SPL_LIBCOMMON_SUPPORT
142 #define CONFIG_SPL_LIBGENERIC_SUPPORT
143 #define CONFIG_SPL_SERIAL_SUPPORT
144 #define CONFIG_SPL_I2C_SUPPORT
145 
146 #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH
147 /* SPL related SPI defines */
148 #define CONFIG_SPL_SPI_SUPPORT
149 #define CONFIG_SPL_SPI_FLASH_SUPPORT
150 #define CONFIG_SPL_SPI_LOAD
151 #define CONFIG_SPL_SPI_BUS		0
152 #define CONFIG_SPL_SPI_CS		0
153 #define CONFIG_SYS_SPI_U_BOOT_OFFS	0x24000
154 #define CONFIG_SYS_U_BOOT_OFFS		CONFIG_SYS_SPI_U_BOOT_OFFS
155 #endif
156 
157 #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD
158 /* SPL related MMC defines */
159 #define CONFIG_SPL_MMC_SUPPORT
160 #define CONFIG_SPL_LIBDISK_SUPPORT
161 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION 1
162 #define CONFIG_SYS_MMC_U_BOOT_OFFS		(160 << 10)
163 #define CONFIG_SYS_U_BOOT_OFFS			CONFIG_SYS_MMC_U_BOOT_OFFS
164 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	(CONFIG_SYS_U_BOOT_OFFS / 512)
165 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	((512 << 10) / 512) /* 512KiB */
166 #ifdef CONFIG_SPL_BUILD
167 #define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER	0x00180000	/* in SDRAM */
168 #endif
169 #endif
170 
171 /*
172  * mv-common.h should be defined after CMD configs since it used them
173  * to enable certain macros
174  */
175 #include "mv-common.h"
176 
177 #endif /* _CONFIG_DB_88F6820_GP_H */
178