1 /* 2 * Copyright (C) 2014 Stefan Roese <sr@denx.de> 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #ifndef _CONFIG_DB_88F6820_GP_H 8 #define _CONFIG_DB_88F6820_GP_H 9 10 /* 11 * High Level Configuration Options (easy to change) 12 */ 13 #define CONFIG_ARMADA_XP /* SOC Family Name */ 14 #define CONFIG_ARMADA_38X 15 #define CONFIG_DB_88F6820_GP /* Board target name for DDR training */ 16 17 #define CONFIG_SYS_L2_PL310 18 19 #define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ 20 #define CONFIG_SYS_GENERIC_BOARD 21 #define CONFIG_DISPLAY_BOARDINFO_LATE 22 23 /* 24 * TEXT_BASE needs to be below 16MiB, since this area is scrubbed 25 * for DDR ECC byte filling in the SPL before loading the main 26 * U-Boot into it. 27 */ 28 #define CONFIG_SYS_TEXT_BASE 0x00800000 29 #define CONFIG_SYS_TCLK 250000000 /* 250MHz */ 30 31 /* 32 * Commands configuration 33 */ 34 #define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */ 35 #define CONFIG_CMD_CACHE 36 #define CONFIG_CMD_DHCP 37 #define CONFIG_CMD_ENV 38 #define CONFIG_CMD_EXT2 39 #define CONFIG_CMD_EXT4 40 #define CONFIG_CMD_FAT 41 #define CONFIG_CMD_FS_GENERIC 42 #define CONFIG_CMD_I2C 43 #define CONFIG_CMD_MMC 44 #define CONFIG_CMD_PING 45 #define CONFIG_CMD_SCSI 46 #define CONFIG_CMD_SF 47 #define CONFIG_CMD_SPI 48 #define CONFIG_CMD_TFTPPUT 49 #define CONFIG_CMD_TIME 50 #define CONFIG_CMD_USB 51 52 /* I2C */ 53 #define CONFIG_SYS_I2C 54 #define CONFIG_SYS_I2C_MVTWSI 55 #define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE 56 #define CONFIG_SYS_I2C_SLAVE 0x0 57 #define CONFIG_SYS_I2C_SPEED 100000 58 59 /* SPI NOR flash default params, used by sf commands */ 60 #define CONFIG_SF_DEFAULT_SPEED 1000000 61 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 62 #define CONFIG_SPI_FLASH_STMICRO 63 64 /* 65 * SDIO/MMC Card Configuration 66 */ 67 #define CONFIG_MMC 68 #define CONFIG_MMC_SDMA 69 #define CONFIG_GENERIC_MMC 70 #define CONFIG_SDHCI 71 #define CONFIG_MV_SDHCI 72 #define CONFIG_SYS_MMC_BASE MVEBU_SDIO_BASE 73 74 /* 75 * SATA/SCSI/AHCI configuration 76 */ 77 #define CONFIG_LIBATA 78 #define CONFIG_SCSI_AHCI 79 #define CONFIG_SCSI_AHCI_PLAT 80 #define CONFIG_SYS_SCSI_MAX_SCSI_ID 2 81 #define CONFIG_SYS_SCSI_MAX_LUN 1 82 #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ 83 CONFIG_SYS_SCSI_MAX_LUN) 84 85 /* Partition support */ 86 #define CONFIG_DOS_PARTITION 87 #define CONFIG_EFI_PARTITION 88 89 /* Additional FS support/configuration */ 90 #define CONFIG_SUPPORT_VFAT 91 92 /* USB/EHCI configuration */ 93 #define CONFIG_USB_EHCI 94 #define CONFIG_USB_STORAGE 95 #define CONFIG_USB_EHCI_MARVELL 96 #define CONFIG_EHCI_IS_TDI 97 98 /* Environment in SPI NOR flash */ 99 #define CONFIG_ENV_IS_IN_SPI_FLASH 100 #define CONFIG_ENV_OFFSET (1 << 20) /* 1MiB in */ 101 #define CONFIG_ENV_SIZE (64 << 10) /* 64KiB */ 102 #define CONFIG_ENV_SECT_SIZE (256 << 10) /* 256KiB sectors */ 103 104 #define CONFIG_PHY_MARVELL /* there is a marvell phy */ 105 #define CONFIG_PHY_ADDR { 1, 0 } 106 #define CONFIG_SYS_NETA_INTERFACE_TYPE PHY_INTERFACE_MODE_RGMII 107 #define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ 108 109 #define CONFIG_SYS_CONSOLE_INFO_QUIET /* don't print console @ startup */ 110 #define CONFIG_SYS_ALT_MEMTEST 111 112 /* Keep device tree and initrd in lower memory so the kernel can access them */ 113 #define CONFIG_EXTRA_ENV_SETTINGS \ 114 "fdt_high=0x10000000\0" \ 115 "initrd_high=0x10000000\0" 116 117 /* SPL */ 118 /* 119 * Select the boot device here 120 * 121 * Currently supported are: 122 * SPL_BOOT_SPI_NOR_FLASH - Booting via SPI NOR flash 123 * SPL_BOOT_SDIO_MMC_CARD - Booting via SDIO/MMC card (partition 1) 124 */ 125 #define SPL_BOOT_SPI_NOR_FLASH 1 126 #define SPL_BOOT_SDIO_MMC_CARD 2 127 #define CONFIG_SPL_BOOT_DEVICE SPL_BOOT_SPI_NOR_FLASH 128 129 /* Defines for SPL */ 130 #define CONFIG_SPL_FRAMEWORK 131 #define CONFIG_SPL_SIZE (140 << 10) 132 #define CONFIG_SPL_TEXT_BASE 0x40000030 133 #define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x0030) 134 135 #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) 136 #define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) 137 138 #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ 139 CONFIG_SPL_BSS_MAX_SIZE) 140 #define CONFIG_SYS_SPL_MALLOC_SIZE (16 << 10) 141 142 #define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) 143 #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) 144 145 #define CONFIG_SPL_LIBCOMMON_SUPPORT 146 #define CONFIG_SPL_LIBGENERIC_SUPPORT 147 #define CONFIG_SPL_SERIAL_SUPPORT 148 #define CONFIG_SPL_I2C_SUPPORT 149 150 #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH 151 /* SPL related SPI defines */ 152 #define CONFIG_SPL_SPI_SUPPORT 153 #define CONFIG_SPL_SPI_FLASH_SUPPORT 154 #define CONFIG_SPL_SPI_LOAD 155 #define CONFIG_SPL_SPI_BUS 0 156 #define CONFIG_SPL_SPI_CS 0 157 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 158 #define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS 159 #endif 160 161 #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD 162 /* SPL related MMC defines */ 163 #define CONFIG_SPL_MMC_SUPPORT 164 #define CONFIG_SPL_LIBDISK_SUPPORT 165 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION 1 166 #define CONFIG_SYS_MMC_U_BOOT_OFFS (160 << 10) 167 #define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_MMC_U_BOOT_OFFS 168 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR (CONFIG_SYS_U_BOOT_OFFS / 512) 169 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS ((512 << 10) / 512) /* 512KiB */ 170 #ifdef CONFIG_SPL_BUILD 171 #define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */ 172 #endif 173 #endif 174 175 /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */ 176 #define CONFIG_SYS_MVEBU_DDR_A38X 177 #define CONFIG_DDR3 178 179 /* 180 * mv-common.h should be defined after CMD configs since it used them 181 * to enable certain macros 182 */ 183 #include "mv-common.h" 184 185 #endif /* _CONFIG_DB_88F6820_GP_H */ 186