1 /* 2 * Copyright (C) 2016 Stefan Roese <sr@denx.de> 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #ifndef _CONFIG_DB_88F6720_H 8 #define _CONFIG_DB_88F6720_H 9 10 /* 11 * High Level Configuration Options (easy to change) 12 */ 13 #define CONFIG_DISPLAY_BOARDINFO_LATE 14 15 /* 16 * TEXT_BASE needs to be below 16MiB, since this area is scrubbed 17 * for DDR ECC byte filling in the SPL before loading the main 18 * U-Boot into it. 19 */ 20 #define CONFIG_SYS_TEXT_BASE 0x00800000 21 #define CONFIG_SYS_TCLK 200000000 /* 200MHz */ 22 23 /* 24 * Commands configuration 25 */ 26 27 /* I2C */ 28 #define CONFIG_SYS_I2C 29 #define CONFIG_SYS_I2C_MVTWSI 30 #define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE 31 #define CONFIG_SYS_I2C_SLAVE 0x0 32 #define CONFIG_SYS_I2C_SPEED 100000 33 34 /* USB/EHCI configuration */ 35 #define CONFIG_EHCI_IS_TDI 36 #define CONFIG_USB_MAX_CONTROLLER_COUNT 3 37 38 /* SPI NOR flash default params, used by sf commands */ 39 #define CONFIG_SF_DEFAULT_SPEED 1000000 40 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 41 42 /* Environment in SPI NOR flash */ 43 #define CONFIG_ENV_OFFSET (1 << 20) /* 1MiB in */ 44 #define CONFIG_ENV_SIZE (64 << 10) /* 64KiB */ 45 #define CONFIG_ENV_SECT_SIZE (64 << 10) /* 64KiB sectors */ 46 47 #define CONFIG_PHY_MARVELL /* there is a marvell phy */ 48 #define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ 49 50 #define CONFIG_SYS_ALT_MEMTEST 51 52 /* 53 * mv-common.h should be defined after CMD configs since it used them 54 * to enable certain macros 55 */ 56 #include "mv-common.h" 57 58 /* 59 * Memory layout while starting into the bin_hdr via the 60 * BootROM: 61 * 62 * 0x4000.4000 - 0x4003.4000 headers space (192KiB) 63 * 0x4000.4030 bin_hdr start address 64 * 0x4003.4000 - 0x4004.7c00 BootROM memory allocations (15KiB) 65 * 0x4007.fffc BootROM stack top 66 * 67 * The address space between 0x4007.fffc and 0x400f.fff is not locked in 68 * L2 cache thus cannot be used. 69 */ 70 71 /* SPL */ 72 /* Defines for SPL */ 73 #define CONFIG_SPL_FRAMEWORK 74 #define CONFIG_SPL_TEXT_BASE 0x40004030 75 #define CONFIG_SPL_MAX_SIZE ((128 << 10) - 0x4030) 76 77 #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10)) 78 #define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) 79 80 #ifdef CONFIG_SPL_BUILD 81 #define CONFIG_SYS_MALLOC_SIMPLE 82 #endif 83 84 #define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) 85 #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) 86 87 /* SPL related SPI defines */ 88 #define CONFIG_SPL_SPI_LOAD 89 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 90 #define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS 91 92 #endif /* _CONFIG_DB_88F6720_H */ 93