1 /* 2 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ 3 * 4 * Based on davinci_dvevm.h. Original Copyrights follow: 5 * 6 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License as published by 10 * the Free Software Foundation; either version 2 of the License, or 11 * (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 21 */ 22 23 #ifndef __CONFIG_H 24 #define __CONFIG_H 25 26 /* 27 * Board 28 */ 29 #define CONFIG_DRIVER_TI_EMAC 30 #define CONFIG_USE_SPIFLASH 31 32 /* 33 * SoC Configuration 34 */ 35 #define CONFIG_MACH_DAVINCI_DA850_EVM 36 #define CONFIG_ARM926EJS /* arm926ejs CPU core */ 37 #define CONFIG_SOC_DA8XX /* TI DA8xx SoC */ 38 #define CONFIG_SYS_CLK_FREQ clk_get(DAVINCI_ARM_CLKID) 39 #define CONFIG_SYS_OSCIN_FREQ 24000000 40 #define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE 41 #define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID) 42 #define CONFIG_SYS_HZ 1000 43 #define CONFIG_SKIP_LOWLEVEL_INIT 44 #define CONFIG_SYS_TEXT_BASE 0xc1080000 45 46 /* 47 * Memory Info 48 */ 49 #define CONFIG_SYS_MALLOC_LEN (0x10000 + 1*1024*1024) /* malloc() len */ 50 #define PHYS_SDRAM_1 DAVINCI_DDR_EMIF_DATA_BASE /* DDR Start */ 51 #define PHYS_SDRAM_1_SIZE (64 << 20) /* SDRAM size 64MB */ 52 #define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* max size from SPRS586*/ 53 54 /* memtest start addr */ 55 #define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM_1 + 0x2000000) 56 57 /* memtest will be run on 16MB */ 58 #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 0x2000000 + 16*1024*1024) 59 60 #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ 61 #define CONFIG_STACKSIZE (256*1024) /* regular stack */ 62 63 /* 64 * Serial Driver info 65 */ 66 #define CONFIG_SYS_NS16550 67 #define CONFIG_SYS_NS16550_SERIAL 68 #define CONFIG_SYS_NS16550_REG_SIZE -4 /* NS16550 register size */ 69 #define CONFIG_SYS_NS16550_COM1 DAVINCI_UART2_BASE /* Base address of UART2 */ 70 #define CONFIG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID) 71 #define CONFIG_CONS_INDEX 1 /* use UART0 for console */ 72 #define CONFIG_BAUDRATE 115200 /* Default baud rate */ 73 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } 74 75 #define CONFIG_SPI 76 #define CONFIG_SPI_FLASH 77 #define CONFIG_SPI_FLASH_STMICRO 78 #define CONFIG_DAVINCI_SPI 79 #define CONFIG_SYS_SPI_BASE DAVINCI_SPI1_BASE 80 #define CONFIG_SYS_SPI_CLK clk_get(DAVINCI_SPI1_CLKID) 81 #define CONFIG_SF_DEFAULT_SPEED 30000000 82 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 83 84 /* 85 * I2C Configuration 86 */ 87 #define CONFIG_HARD_I2C 88 #define CONFIG_DRIVER_DAVINCI_I2C 89 #define CONFIG_SYS_I2C_SPEED 25000 90 #define CONFIG_SYS_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */ 91 #define CONFIG_SYS_I2C_EXPANDER_ADDR 0x20 92 93 /* 94 * Flash & Environment 95 */ 96 #ifdef CONFIG_USE_NAND 97 #undef CONFIG_ENV_IS_IN_FLASH 98 #define CONFIG_NAND_DAVINCI 99 #define CONFIG_SYS_NO_FLASH 100 #define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */ 101 #define CONFIG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */ 102 #define CONFIG_ENV_SIZE (128 << 10) 103 #define CONFIG_SYS_NAND_USE_FLASH_BBT 104 #define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST 105 #define CONFIG_SYS_NAND_PAGE_2K 106 #define CONFIG_SYS_NAND_CS 3 107 #define CONFIG_SYS_NAND_BASE DAVINCI_ASYNC_EMIF_DATA_CE3_BASE 108 #define CONFIG_SYS_CLE_MASK 0x10 109 #define CONFIG_SYS_ALE_MASK 0x8 110 #undef CONFIG_SYS_NAND_HW_ECC 111 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ 112 #define NAND_MAX_CHIPS 1 113 #endif 114 115 /* 116 * Network & Ethernet Configuration 117 */ 118 #ifdef CONFIG_DRIVER_TI_EMAC 119 #define CONFIG_EMAC_MDIO_PHY_NUM 0 120 #define CONFIG_MII 121 #define CONFIG_BOOTP_DEFAULT 122 #define CONFIG_BOOTP_DNS 123 #define CONFIG_BOOTP_DNS2 124 #define CONFIG_BOOTP_SEND_HOSTNAME 125 #define CONFIG_NET_RETRY_COUNT 10 126 #define CONFIG_NET_MULTI 127 #endif 128 129 #ifdef CONFIG_USE_SPIFLASH 130 #undef CONFIG_ENV_IS_IN_FLASH 131 #undef CONFIG_ENV_IS_IN_NAND 132 #define CONFIG_ENV_IS_IN_SPI_FLASH 133 #define CONFIG_ENV_SIZE (64 << 10) 134 #define CONFIG_ENV_OFFSET (256 << 10) 135 #define CONFIG_ENV_SECT_SIZE (64 << 10) 136 #define CONFIG_SYS_NO_FLASH 137 #endif 138 139 /* 140 * U-Boot general configuration 141 */ 142 #define CONFIG_BOOTFILE "uImage" /* Boot file name */ 143 #define CONFIG_SYS_PROMPT "DA850-evm > " /* Command Prompt */ 144 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 145 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) 146 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 147 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */ 148 #define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x700000) 149 #define CONFIG_VERSION_VARIABLE 150 #define CONFIG_AUTO_COMPLETE 151 #define CONFIG_SYS_HUSH_PARSER 152 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " 153 #define CONFIG_CMDLINE_EDITING 154 #define CONFIG_SYS_LONGHELP 155 #define CONFIG_CRC32_VERIFY 156 #define CONFIG_MX_CYCLIC 157 158 /* 159 * Linux Information 160 */ 161 #define LINUX_BOOT_PARAM_ADDR (PHYS_SDRAM_1 + 0x100) 162 #define CONFIG_CMDLINE_TAG 163 #define CONFIG_REVISION_TAG 164 #define CONFIG_SETUP_MEMORY_TAGS 165 #define CONFIG_BOOTARGS \ 166 "mem=32M console=ttyS2,115200n8 root=/dev/mtdblock2 rw noinitrd ip=dhcp" 167 #define CONFIG_BOOTDELAY 3 168 169 /* 170 * U-Boot commands 171 */ 172 #include <config_cmd_default.h> 173 #define CONFIG_CMD_ENV 174 #define CONFIG_CMD_ASKENV 175 #define CONFIG_CMD_DHCP 176 #define CONFIG_CMD_DIAG 177 #define CONFIG_CMD_MII 178 #define CONFIG_CMD_PING 179 #define CONFIG_CMD_SAVES 180 #define CONFIG_CMD_MEMORY 181 182 #ifndef CONFIG_DRIVER_TI_EMAC 183 #undef CONFIG_CMD_NET 184 #undef CONFIG_CMD_DHCP 185 #undef CONFIG_CMD_MII 186 #undef CONFIG_CMD_PING 187 #endif 188 189 #ifdef CONFIG_USE_NAND 190 #undef CONFIG_CMD_FLASH 191 #undef CONFIG_CMD_IMLS 192 #define CONFIG_CMD_NAND 193 194 #define CONFIG_CMD_MTDPARTS 195 #define CONFIG_MTD_DEVICE 196 #define CONFIG_MTD_PARTITIONS 197 #define CONFIG_LZO 198 #define CONFIG_RBTREE 199 #define CONFIG_CMD_UBI 200 #define CONFIG_CMD_UBIFS 201 #endif 202 203 #ifdef CONFIG_USE_SPIFLASH 204 #undef CONFIG_CMD_IMLS 205 #undef CONFIG_CMD_FLASH 206 #define CONFIG_CMD_SPI 207 #define CONFIG_CMD_SF 208 #define CONFIG_CMD_SAVEENV 209 #endif 210 211 #if !defined(CONFIG_USE_NAND) && \ 212 !defined(CONFIG_USE_NOR) && \ 213 !defined(CONFIG_USE_SPIFLASH) 214 #define CONFIG_ENV_IS_NOWHERE 215 #define CONFIG_SYS_NO_FLASH 216 #define CONFIG_ENV_SIZE (16 << 10) 217 #undef CONFIG_CMD_IMLS 218 #undef CONFIG_CMD_ENV 219 #endif 220 221 /* additions for new relocation code, must added to all boards */ 222 #define CONFIG_SYS_SDRAM_BASE 0xc0000000 223 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - /* Fix this */ \ 224 GENERATED_GBL_DATA_SIZE) 225 #endif /* __CONFIG_H */ 226