xref: /openbmc/u-boot/include/configs/corvus.h (revision be3fcd0f)
1 /*
2  * Common board functions for siemens AT91SAM9G45 based boards
3  * (C) Copyright 2013 Siemens AG
4  *
5  * Based on:
6  * U-Boot file: include/configs/at91sam9m10g45ek.h
7  * (C) Copyright 2007-2008
8  * Stelian Pop <stelian@popies.net>
9  * Lead Tech Design <www.leadtechdesign.com>
10  *
11  * SPDX-License-Identifier:	GPL-2.0+
12  */
13 
14 #ifndef __CONFIG_H
15 #define __CONFIG_H
16 
17 #include <asm/hardware.h>
18 #include <linux/sizes.h>
19 
20 /*
21  * Warning: changing CONFIG_SYS_TEXT_BASE requires
22  * adapting the initial boot program.
23  * Since the linker has to swallow that define, we must use a pure
24  * hex number here!
25  */
26 
27 #define CONFIG_SYS_TEXT_BASE  0x72000000
28 
29 #define CONFIG_ATMEL_LEGACY		/* required until (g)pio is fixed */
30 
31 /* ARM asynchronous clock */
32 #define CONFIG_SYS_AT91_SLOW_CLOCK      32768
33 #define CONFIG_SYS_AT91_MAIN_CLOCK      12000000 /* from 12 MHz crystal */
34 
35 #define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs	*/
36 #define CONFIG_SETUP_MEMORY_TAGS
37 #define CONFIG_INITRD_TAG
38 #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
39 #define CONFIG_BOARD_EARLY_INIT_F
40 #define CONFIG_DISPLAY_CPUINFO
41 
42 /* general purpose I/O */
43 #define CONFIG_ATMEL_LEGACY		/* required until (g)pio is fixed */
44 #define CONFIG_AT91_GPIO
45 #define CONFIG_AT91_GPIO_PULLUP	1	/* keep pullups on peripheral pins */
46 
47 /* serial console */
48 #define CONFIG_ATMEL_USART
49 #define CONFIG_USART_BASE		ATMEL_BASE_DBGU
50 #define CONFIG_USART_ID			ATMEL_ID_SYS
51 
52 /* LED */
53 #define CONFIG_AT91_LED
54 #define CONFIG_RED_LED		AT91_PIN_PD31	/* this is the user1 led */
55 #define CONFIG_GREEN_LED	AT91_PIN_PD0	/* this is the user2 led */
56 
57 
58 /*
59  * BOOTP options
60  */
61 #define CONFIG_BOOTP_BOOTFILESIZE
62 #define CONFIG_BOOTP_BOOTPATH
63 #define CONFIG_BOOTP_GATEWAY
64 #define CONFIG_BOOTP_HOSTNAME
65 
66 /*
67  * Command line configuration.
68  */
69 #define CONFIG_CMD_NAND
70 
71 /* SDRAM */
72 #define CONFIG_NR_DRAM_BANKS		1
73 #define CONFIG_SYS_SDRAM_BASE           ATMEL_BASE_CS6
74 #define CONFIG_SYS_SDRAM_SIZE		0x08000000
75 
76 #define CONFIG_SYS_INIT_SP_ADDR \
77 	(CONFIG_SYS_SDRAM_BASE + SZ_4K - GENERATED_GBL_DATA_SIZE)
78 
79 /* No NOR flash */
80 #define CONFIG_SYS_NO_FLASH
81 
82 /* NAND flash */
83 #ifdef CONFIG_CMD_NAND
84 #define CONFIG_NAND_ATMEL
85 #define CONFIG_SYS_MAX_NAND_DEVICE		1
86 #define CONFIG_SYS_NAND_BASE			ATMEL_BASE_CS3
87 #define CONFIG_SYS_NAND_DBW_8
88 /* our ALE is AD21 */
89 #define CONFIG_SYS_NAND_MASK_ALE		(1 << 21)
90 /* our CLE is AD22 */
91 #define CONFIG_SYS_NAND_MASK_CLE		(1 << 22)
92 #define CONFIG_SYS_NAND_ENABLE_PIN		AT91_PIN_PC14
93 #define CONFIG_SYS_NAND_READY_PIN		AT91_PIN_PC8
94 #endif
95 
96 /* Ethernet */
97 #define CONFIG_MACB
98 #define CONFIG_PHYLIB
99 #define CONFIG_RMII
100 #define CONFIG_NET_RETRY_COUNT		20
101 #define CONFIG_AT91_WANTS_COMMON_PHY
102 
103 /* USB */
104 #define CONFIG_USB_EHCI
105 #define CONFIG_USB_EHCI_ATMEL
106 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	2
107 #define CONFIG_DOS_PARTITION
108 
109 /* USB DFU support */
110 #define CONFIG_CMD_MTDPARTS
111 #define CONFIG_MTD_DEVICE
112 #define CONFIG_MTD_PARTITIONS
113 
114 /* DFU class support */
115 #define CONFIG_SYS_DFU_DATA_BUF_SIZE	(SZ_1M)
116 #define DFU_MANIFEST_POLL_TIMEOUT	25000
117 
118 #define CONFIG_SYS_LOAD_ADDR	ATMEL_BASE_CS6
119 
120 /* bootstrap + u-boot + env in nandflash */
121 #define CONFIG_ENV_IS_IN_NAND
122 #define CONFIG_ENV_OFFSET		0x100000
123 #define CONFIG_ENV_OFFSET_REDUND	0x180000
124 #define CONFIG_ENV_SIZE			SZ_128K
125 
126 #define CONFIG_BOOTCOMMAND						\
127 	"nand read 0x70000000 0x200000 0x300000;"			\
128 	"bootm 0x70000000"
129 #define CONFIG_BOOTARGS							\
130 	"console=ttyS0,115200 earlyprintk "				\
131 	"mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,"		\
132 	"256k(env),256k(env_redundant),256k(spare),"			\
133 	"512k(dtb),6M(kernel)ro,-(rootfs) "				\
134 	"root=/dev/mtdblock7 rw rootfstype=jffs2"
135 
136 #define CONFIG_BAUDRATE			115200
137 
138 #define CONFIG_SYS_CBSIZE		256
139 #define CONFIG_SYS_MAXARGS		16
140 #define CONFIG_SYS_PBSIZE	(CONFIG_SYS_CBSIZE +	\
141 				 sizeof(CONFIG_SYS_PROMPT) + 16)
142 #define CONFIG_SYS_LONGHELP
143 #define CONFIG_CMDLINE_EDITING
144 #define CONFIG_AUTO_COMPLETE
145 
146 /*
147  * Size of malloc() pool
148  */
149 #define CONFIG_SYS_MALLOC_LEN	ROUND(3 * CONFIG_ENV_SIZE + \
150 				SZ_4M, 0x1000)
151 
152 /* Defines for SPL */
153 #define CONFIG_SPL_FRAMEWORK
154 #define CONFIG_SPL_TEXT_BASE		0x300000
155 #define CONFIG_SPL_MAX_SIZE		(12 * SZ_1K)
156 #define CONFIG_SPL_STACK		(SZ_16K)
157 
158 #define CONFIG_SPL_BSS_START_ADDR	CONFIG_SPL_MAX_SIZE
159 #define CONFIG_SPL_BSS_MAX_SIZE		(SZ_2K)
160 
161 #define CONFIG_SPL_BOARD_INIT
162 #define CONFIG_SPL_NAND_DRIVERS
163 #define CONFIG_SPL_NAND_BASE
164 #define CONFIG_SPL_NAND_ECC
165 #define CONFIG_SPL_NAND_RAW_ONLY
166 #define CONFIG_SPL_NAND_SOFTECC
167 #define CONFIG_SYS_NAND_U_BOOT_OFFS	0x20000
168 #define CONFIG_SYS_NAND_U_BOOT_SIZE	0x80000
169 #define	CONFIG_SYS_NAND_U_BOOT_START	CONFIG_SYS_TEXT_BASE
170 #define CONFIG_SYS_NAND_U_BOOT_DST	CONFIG_SYS_TEXT_BASE
171 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
172 
173 #define CONFIG_SYS_NAND_PAGE_SIZE	SZ_2K
174 #define CONFIG_SYS_NAND_BLOCK_SIZE	(SZ_128K)
175 #define CONFIG_SYS_NAND_PAGE_COUNT	(CONFIG_SYS_NAND_BLOCK_SIZE / \
176 					 CONFIG_SYS_NAND_PAGE_SIZE)
177 #define CONFIG_SYS_NAND_BAD_BLOCK_POS	NAND_LARGE_BADBLOCK_POS
178 #define CONFIG_SYS_NAND_ECCSIZE		256
179 #define CONFIG_SYS_NAND_ECCBYTES	3
180 #define CONFIG_SYS_NAND_OOBSIZE		64
181 #define CONFIG_SYS_NAND_ECCPOS		{ 40, 41, 42, 43, 44, 45, 46, 47, \
182 					  48, 49, 50, 51, 52, 53, 54, 55, \
183 					  56, 57, 58, 59, 60, 61, 62, 63, }
184 
185 #define CONFIG_SPL_ATMEL_SIZE
186 #define CONFIG_SYS_MASTER_CLOCK		132096000
187 #define AT91_PLL_LOCK_TIMEOUT		1000000
188 #define CONFIG_SYS_AT91_PLLA		0x20c73f03
189 #define CONFIG_SYS_MCKR			0x1301
190 #define CONFIG_SYS_MCKR_CSS		0x1302
191 
192 #endif
193