xref: /openbmc/u-boot/include/configs/corvus.h (revision aea02abe)
1 /*
2  * Common board functions for siemens AT91SAM9G45 based boards
3  * (C) Copyright 2013 Siemens AG
4  *
5  * Based on:
6  * U-Boot file: include/configs/at91sam9m10g45ek.h
7  * (C) Copyright 2007-2008
8  * Stelian Pop <stelian@popies.net>
9  * Lead Tech Design <www.leadtechdesign.com>
10  *
11  * SPDX-License-Identifier:	GPL-2.0+
12  */
13 
14 #ifndef __CONFIG_H
15 #define __CONFIG_H
16 
17 #include <asm/hardware.h>
18 #include <linux/sizes.h>
19 
20 /*
21  * Warning: changing CONFIG_SYS_TEXT_BASE requires
22  * adapting the initial boot program.
23  * Since the linker has to swallow that define, we must use a pure
24  * hex number here!
25  */
26 
27 #define CONFIG_SYS_TEXT_BASE  0x72000000
28 
29 #define CONFIG_ATMEL_LEGACY		/* required until (g)pio is fixed */
30 
31 /* ARM asynchronous clock */
32 #define CONFIG_SYS_AT91_SLOW_CLOCK      32768
33 #define CONFIG_SYS_AT91_MAIN_CLOCK      12000000 /* from 12 MHz crystal */
34 
35 #define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs	*/
36 #define CONFIG_SETUP_MEMORY_TAGS
37 #define CONFIG_INITRD_TAG
38 #define CONFIG_SKIP_LOWLEVEL_INIT
39 #define CONFIG_BOARD_EARLY_INIT_F
40 #define CONFIG_DISPLAY_CPUINFO
41 
42 #define CONFIG_CMD_BOOTZ
43 
44 /* general purpose I/O */
45 #define CONFIG_ATMEL_LEGACY		/* required until (g)pio is fixed */
46 #define CONFIG_AT91_GPIO
47 #define CONFIG_AT91_GPIO_PULLUP	1	/* keep pullups on peripheral pins */
48 
49 /* serial console */
50 #define CONFIG_ATMEL_USART
51 #define CONFIG_USART_BASE		ATMEL_BASE_DBGU
52 #define CONFIG_USART_ID			ATMEL_ID_SYS
53 
54 /* LED */
55 #define CONFIG_AT91_LED
56 #define CONFIG_RED_LED		AT91_PIN_PD31	/* this is the user1 led */
57 #define CONFIG_GREEN_LED	AT91_PIN_PD0	/* this is the user2 led */
58 
59 #define CONFIG_BOOTDELAY	3
60 
61 /*
62  * BOOTP options
63  */
64 #define CONFIG_BOOTP_BOOTFILESIZE
65 #define CONFIG_BOOTP_BOOTPATH
66 #define CONFIG_BOOTP_GATEWAY
67 #define CONFIG_BOOTP_HOSTNAME
68 
69 /*
70  * Command line configuration.
71  */
72 #define CONFIG_CMD_PING
73 #define CONFIG_CMD_DHCP
74 #define CONFIG_CMD_NAND
75 #define CONFIG_CMD_USB
76 
77 /* SDRAM */
78 #define CONFIG_NR_DRAM_BANKS		1
79 #define CONFIG_SYS_SDRAM_BASE           ATMEL_BASE_CS6
80 #define CONFIG_SYS_SDRAM_SIZE		0x08000000
81 
82 #define CONFIG_SYS_INIT_SP_ADDR \
83 	(CONFIG_SYS_SDRAM_BASE + SZ_4K - GENERATED_GBL_DATA_SIZE)
84 
85 /* No NOR flash */
86 #define CONFIG_SYS_NO_FLASH
87 
88 /* NAND flash */
89 #ifdef CONFIG_CMD_NAND
90 #define CONFIG_NAND_ATMEL
91 #define CONFIG_SYS_MAX_NAND_DEVICE		1
92 #define CONFIG_SYS_NAND_BASE			ATMEL_BASE_CS3
93 #define CONFIG_SYS_NAND_DBW_8
94 /* our ALE is AD21 */
95 #define CONFIG_SYS_NAND_MASK_ALE		(1 << 21)
96 /* our CLE is AD22 */
97 #define CONFIG_SYS_NAND_MASK_CLE		(1 << 22)
98 #define CONFIG_SYS_NAND_ENABLE_PIN		AT91_PIN_PC14
99 #define CONFIG_SYS_NAND_READY_PIN		AT91_PIN_PC8
100 #endif
101 
102 /* Ethernet */
103 #define CONFIG_MACB
104 #define CONFIG_RMII
105 #define CONFIG_NET_RETRY_COUNT		20
106 #define CONFIG_AT91_WANTS_COMMON_PHY
107 
108 /* USB */
109 #define CONFIG_USB_EHCI
110 #define CONFIG_USB_EHCI_ATMEL
111 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	2
112 #define CONFIG_DOS_PARTITION
113 #define CONFIG_USB_STORAGE
114 
115 /* USB DFU support */
116 #define CONFIG_CMD_MTDPARTS
117 #define CONFIG_MTD_DEVICE
118 #define CONFIG_MTD_PARTITIONS
119 
120 #define CONFIG_USB_GADGET
121 #define CONFIG_USB_GADGET_DUALSPEED
122 #define CONFIG_USB_GADGET_ATMEL_USBA
123 
124 /* DFU class support */
125 #define CONFIG_CMD_DFU
126 #define CONFIG_USB_FUNCTION_DFU
127 #define CONFIG_DFU_NAND
128 #define CONFIG_USB_GADGET_DOWNLOAD
129 #define CONFIG_USB_GADGET_VBUS_DRAW	2
130 #define CONFIG_SYS_DFU_DATA_BUF_SIZE	(SZ_1M)
131 #define DFU_MANIFEST_POLL_TIMEOUT	25000
132 
133 /* USB DFU IDs */
134 #define CONFIG_G_DNL_VENDOR_NUM 0x0908
135 #define CONFIG_G_DNL_PRODUCT_NUM 0x02d2
136 #define CONFIG_G_DNL_MANUFACTURER "Siemens AG"
137 
138 #define CONFIG_SYS_CACHELINE_SIZE	SZ_8K
139 #define CONFIG_SYS_LOAD_ADDR	ATMEL_BASE_CS6
140 
141 /* bootstrap + u-boot + env in nandflash */
142 #define CONFIG_ENV_IS_IN_NAND
143 #define CONFIG_ENV_OFFSET		0x100000
144 #define CONFIG_ENV_OFFSET_REDUND	0x180000
145 #define CONFIG_ENV_SIZE			SZ_128K
146 
147 #define CONFIG_BOOTCOMMAND						\
148 	"nand read 0x70000000 0x200000 0x300000;"			\
149 	"bootm 0x70000000"
150 #define CONFIG_BOOTARGS							\
151 	"console=ttyS0,115200 earlyprintk "				\
152 	"mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,"		\
153 	"256k(env),256k(env_redundant),256k(spare),"			\
154 	"512k(dtb),6M(kernel)ro,-(rootfs) "				\
155 	"root=/dev/mtdblock7 rw rootfstype=jffs2"
156 
157 #define CONFIG_BAUDRATE			115200
158 
159 #define CONFIG_SYS_CBSIZE		256
160 #define CONFIG_SYS_MAXARGS		16
161 #define CONFIG_SYS_PBSIZE	(CONFIG_SYS_CBSIZE +	\
162 				 sizeof(CONFIG_SYS_PROMPT) + 16)
163 #define CONFIG_SYS_LONGHELP
164 #define CONFIG_CMDLINE_EDITING
165 #define CONFIG_AUTO_COMPLETE
166 #define CONFIG_SYS_HUSH_PARSER
167 
168 /*
169  * Size of malloc() pool
170  */
171 #define CONFIG_SYS_MALLOC_LEN	ROUND(3 * CONFIG_ENV_SIZE + \
172 				SZ_4M, 0x1000)
173 
174 /* Defines for SPL */
175 #define CONFIG_SPL_FRAMEWORK
176 #define CONFIG_SPL_TEXT_BASE		0x300000
177 #define CONFIG_SPL_MAX_SIZE		(12 * SZ_1K)
178 #define CONFIG_SPL_STACK		(SZ_16K)
179 
180 #define CONFIG_SPL_BSS_START_ADDR	CONFIG_SPL_MAX_SIZE
181 #define CONFIG_SPL_BSS_MAX_SIZE		(SZ_2K)
182 
183 #define CONFIG_SPL_LIBCOMMON_SUPPORT
184 #define CONFIG_SPL_LIBGENERIC_SUPPORT
185 #define CONFIG_SPL_SERIAL_SUPPORT
186 
187 #define CONFIG_SPL_BOARD_INIT
188 #define CONFIG_SPL_GPIO_SUPPORT
189 #define CONFIG_SPL_NAND_SUPPORT
190 #define CONFIG_SPL_NAND_DRIVERS
191 #define CONFIG_SPL_NAND_BASE
192 #define CONFIG_SPL_NAND_ECC
193 #define CONFIG_SPL_NAND_RAW_ONLY
194 #define CONFIG_SPL_NAND_SOFTECC
195 #define CONFIG_SYS_NAND_U_BOOT_OFFS	0x20000
196 #define CONFIG_SYS_NAND_U_BOOT_SIZE	0x80000
197 #define	CONFIG_SYS_NAND_U_BOOT_START	CONFIG_SYS_TEXT_BASE
198 #define CONFIG_SYS_NAND_U_BOOT_DST	CONFIG_SYS_TEXT_BASE
199 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
200 
201 #define CONFIG_SYS_NAND_PAGE_SIZE	SZ_2K
202 #define CONFIG_SYS_NAND_BLOCK_SIZE	(SZ_128K)
203 #define CONFIG_SYS_NAND_PAGE_COUNT	(CONFIG_SYS_NAND_BLOCK_SIZE / \
204 					 CONFIG_SYS_NAND_PAGE_SIZE)
205 #define CONFIG_SYS_NAND_BAD_BLOCK_POS	NAND_LARGE_BADBLOCK_POS
206 #define CONFIG_SYS_NAND_ECCSIZE		256
207 #define CONFIG_SYS_NAND_ECCBYTES	3
208 #define CONFIG_SYS_NAND_OOBSIZE		64
209 #define CONFIG_SYS_NAND_ECCPOS		{ 40, 41, 42, 43, 44, 45, 46, 47, \
210 					  48, 49, 50, 51, 52, 53, 54, 55, \
211 					  56, 57, 58, 59, 60, 61, 62, 63, }
212 
213 #define CONFIG_SPL_ATMEL_SIZE
214 #define CONFIG_SYS_MASTER_CLOCK		132096000
215 #define AT91_PLL_LOCK_TIMEOUT		1000000
216 #define CONFIG_SYS_AT91_PLLA		0x20c73f03
217 #define CONFIG_SYS_MCKR			0x1301
218 #define CONFIG_SYS_MCKR_CSS		0x1302
219 
220 #endif
221