1 /* 2 * Common board functions for siemens AT91SAM9G45 based boards 3 * (C) Copyright 2013 Siemens AG 4 * 5 * Based on: 6 * U-Boot file: include/configs/at91sam9m10g45ek.h 7 * (C) Copyright 2007-2008 8 * Stelian Pop <stelian@popies.net> 9 * Lead Tech Design <www.leadtechdesign.com> 10 * 11 * SPDX-License-Identifier: GPL-2.0+ 12 */ 13 14 #ifndef __CONFIG_H 15 #define __CONFIG_H 16 17 #include <asm/hardware.h> 18 #include <linux/sizes.h> 19 20 /* 21 * Warning: changing CONFIG_SYS_TEXT_BASE requires 22 * adapting the initial boot program. 23 * Since the linker has to swallow that define, we must use a pure 24 * hex number here! 25 */ 26 27 #define CONFIG_SYS_TEXT_BASE 0x72000000 28 29 #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ 30 31 /* ARM asynchronous clock */ 32 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 33 #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */ 34 35 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 36 #define CONFIG_SETUP_MEMORY_TAGS 37 #define CONFIG_INITRD_TAG 38 #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY 39 40 /* general purpose I/O */ 41 #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ 42 #define CONFIG_AT91_GPIO 43 #define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */ 44 45 /* serial console */ 46 #define CONFIG_ATMEL_USART 47 #define CONFIG_USART_BASE ATMEL_BASE_DBGU 48 #define CONFIG_USART_ID ATMEL_ID_SYS 49 50 /* LED */ 51 #define CONFIG_AT91_LED 52 #define CONFIG_RED_LED AT91_PIN_PD31 /* this is the user1 led */ 53 #define CONFIG_GREEN_LED AT91_PIN_PD0 /* this is the user2 led */ 54 55 56 /* 57 * BOOTP options 58 */ 59 #define CONFIG_BOOTP_BOOTFILESIZE 60 #define CONFIG_BOOTP_BOOTPATH 61 #define CONFIG_BOOTP_GATEWAY 62 #define CONFIG_BOOTP_HOSTNAME 63 64 /* 65 * Command line configuration. 66 */ 67 #define CONFIG_CMD_NAND 68 69 /* SDRAM */ 70 #define CONFIG_NR_DRAM_BANKS 1 71 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS6 72 #define CONFIG_SYS_SDRAM_SIZE 0x08000000 73 74 #define CONFIG_SYS_INIT_SP_ADDR \ 75 (CONFIG_SYS_SDRAM_BASE + SZ_4K - GENERATED_GBL_DATA_SIZE) 76 77 /* NAND flash */ 78 #ifdef CONFIG_CMD_NAND 79 #define CONFIG_NAND_ATMEL 80 #define CONFIG_SYS_MAX_NAND_DEVICE 1 81 #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 82 #define CONFIG_SYS_NAND_DBW_8 83 /* our ALE is AD21 */ 84 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) 85 /* our CLE is AD22 */ 86 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) 87 #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 88 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC8 89 #endif 90 91 /* Ethernet */ 92 #define CONFIG_MACB 93 #define CONFIG_PHYLIB 94 #define CONFIG_RMII 95 #define CONFIG_NET_RETRY_COUNT 20 96 #define CONFIG_AT91_WANTS_COMMON_PHY 97 98 /* USB */ 99 #define CONFIG_USB_EHCI 100 #define CONFIG_USB_EHCI_ATMEL 101 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2 102 103 /* USB DFU support */ 104 #define CONFIG_CMD_MTDPARTS 105 #define CONFIG_MTD_DEVICE 106 #define CONFIG_MTD_PARTITIONS 107 108 /* DFU class support */ 109 #define CONFIG_SYS_DFU_DATA_BUF_SIZE (SZ_1M) 110 #define DFU_MANIFEST_POLL_TIMEOUT 25000 111 112 #define CONFIG_SYS_LOAD_ADDR ATMEL_BASE_CS6 113 114 /* bootstrap + u-boot + env in nandflash */ 115 #define CONFIG_ENV_IS_IN_NAND 116 #define CONFIG_ENV_OFFSET 0x100000 117 #define CONFIG_ENV_OFFSET_REDUND 0x180000 118 #define CONFIG_ENV_SIZE SZ_128K 119 120 #define CONFIG_BOOTCOMMAND \ 121 "nand read 0x70000000 0x200000 0x300000;" \ 122 "bootm 0x70000000" 123 #define CONFIG_BOOTARGS \ 124 "console=ttyS0,115200 earlyprintk " \ 125 "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \ 126 "256k(env),256k(env_redundant),256k(spare)," \ 127 "512k(dtb),6M(kernel)ro,-(rootfs) " \ 128 "root=/dev/mtdblock7 rw rootfstype=jffs2" 129 130 #define CONFIG_BAUDRATE 115200 131 132 #define CONFIG_SYS_CBSIZE 256 133 #define CONFIG_SYS_MAXARGS 16 134 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 135 sizeof(CONFIG_SYS_PROMPT) + 16) 136 #define CONFIG_SYS_LONGHELP 137 #define CONFIG_CMDLINE_EDITING 138 #define CONFIG_AUTO_COMPLETE 139 140 /* 141 * Size of malloc() pool 142 */ 143 #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + \ 144 SZ_4M, 0x1000) 145 146 /* Defines for SPL */ 147 #define CONFIG_SPL_FRAMEWORK 148 #define CONFIG_SPL_TEXT_BASE 0x300000 149 #define CONFIG_SPL_MAX_SIZE (12 * SZ_1K) 150 #define CONFIG_SPL_STACK (SZ_16K) 151 152 #define CONFIG_SPL_BSS_START_ADDR CONFIG_SPL_MAX_SIZE 153 #define CONFIG_SPL_BSS_MAX_SIZE (SZ_2K) 154 155 #define CONFIG_SPL_BOARD_INIT 156 #define CONFIG_SPL_NAND_DRIVERS 157 #define CONFIG_SPL_NAND_BASE 158 #define CONFIG_SPL_NAND_ECC 159 #define CONFIG_SPL_NAND_RAW_ONLY 160 #define CONFIG_SPL_NAND_SOFTECC 161 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000 162 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000 163 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 164 #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE 165 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 166 167 #define CONFIG_SYS_NAND_PAGE_SIZE SZ_2K 168 #define CONFIG_SYS_NAND_BLOCK_SIZE (SZ_128K) 169 #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ 170 CONFIG_SYS_NAND_PAGE_SIZE) 171 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS 172 #define CONFIG_SYS_NAND_ECCSIZE 256 173 #define CONFIG_SYS_NAND_ECCBYTES 3 174 #define CONFIG_SYS_NAND_OOBSIZE 64 175 #define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \ 176 48, 49, 50, 51, 52, 53, 54, 55, \ 177 56, 57, 58, 59, 60, 61, 62, 63, } 178 179 #define CONFIG_SPL_ATMEL_SIZE 180 #define CONFIG_SYS_MASTER_CLOCK 132096000 181 #define AT91_PLL_LOCK_TIMEOUT 1000000 182 #define CONFIG_SYS_AT91_PLLA 0x20c73f03 183 #define CONFIG_SYS_MCKR 0x1301 184 #define CONFIG_SYS_MCKR_CSS 0x1302 185 186 #endif 187