1 /* 2 * Copyright (c) 2011 The Chromium OS Authors. 3 * (C) Copyright 2008 4 * Graeme Russ, graeme.russ@gmail.com. 5 * 6 * See file CREDITS for list of people who contributed to this 7 * project. 8 * 9 * This program is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License as 11 * published by the Free Software Foundation; either version 2 of 12 * the License, or (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 22 * MA 02111-1307 USA 23 */ 24 25 #include <asm/ibmpc.h> 26 /* 27 * board/config.h - configuration options, board specific 28 */ 29 30 #ifndef __CONFIG_H 31 #define __CONFIG_H 32 33 /* 34 * High Level Configuration Options 35 * (easy to change) 36 */ 37 #define CONFIG_SYS_COREBOOT 38 #define CONFIG_SHOW_BOOT_PROGRESS 39 #define CONFIG_LAST_STAGE_INIT 40 #define CONFIG_SYS_VSNPRINTF 41 #define CONFIG_INTEL_CORE_ARCH /* Sandy bridge and ivy bridge chipsets. */ 42 #define CONFIG_ZBOOT_32 43 #define CONFIG_PHYSMEM 44 #define CONFIG_SYS_EARLY_PCI_INIT 45 46 #define CONFIG_LMB 47 #define CONFIG_OF_LIBFDT 48 #define CONFIG_OF_CONTROL 49 #define CONFIG_OF_SEPARATE 50 #define CONFIG_DEFAULT_DEVICE_TREE link 51 52 /*----------------------------------------------------------------------- 53 * Watchdog Configuration 54 */ 55 #undef CONFIG_WATCHDOG 56 #undef CONFIG_HW_WATCHDOG 57 58 /* SATA AHCI storage */ 59 60 #define CONFIG_SCSI_AHCI 61 62 #ifdef CONFIG_SCSI_AHCI 63 #define CONFIG_SYS_64BIT_LBA 64 #define CONFIG_SATA_INTEL 1 65 #define CONFIG_SCSI_DEV_LIST {PCI_VENDOR_ID_INTEL, \ 66 PCI_DEVICE_ID_INTEL_NM10_AHCI}, \ 67 {PCI_VENDOR_ID_INTEL, \ 68 PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_MOBILE}, \ 69 {PCI_VENDOR_ID_INTEL, \ 70 PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_SERIES6}, \ 71 {PCI_VENDOR_ID_INTEL, \ 72 PCI_DEVICE_ID_INTEL_PANTHERPOINT_AHCI_MOBILE} 73 74 #define CONFIG_SYS_SCSI_MAX_SCSI_ID 2 75 #define CONFIG_SYS_SCSI_MAX_LUN 1 76 #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ 77 CONFIG_SYS_SCSI_MAX_LUN) 78 #endif 79 80 /* Generic TPM interfaced through LPC bus */ 81 #define CONFIG_GENERIC_LPC_TPM 82 #define CONFIG_TPM_TIS_BASE_ADDRESS 0xfed40000 83 84 /*----------------------------------------------------------------------- 85 * Real Time Clock Configuration 86 */ 87 #define CONFIG_RTC_MC146818 88 #define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0 89 #define CONFIG_SYS_ISA_IO CONFIG_SYS_ISA_IO_BASE_ADDRESS 90 91 /*----------------------------------------------------------------------- 92 * Serial Configuration 93 */ 94 #define CONFIG_CONS_INDEX 1 95 #define CONFIG_SYS_NS16550 96 #define CONFIG_SYS_NS16550_SERIAL 97 #define CONFIG_SYS_NS16550_REG_SIZE 1 98 #define CONFIG_SYS_NS16550_CLK 1843200 99 #define CONFIG_BAUDRATE 9600 100 #define CONFIG_SYS_BAUDRATE_TABLE {300, 600, 1200, 2400, 4800, \ 101 9600, 19200, 38400, 115200} 102 #define CONFIG_SYS_NS16550_COM1 UART0_BASE 103 #define CONFIG_SYS_NS16550_COM2 UART1_BASE 104 #define CONFIG_SYS_NS16550_PORT_MAPPED 105 106 #define CONFIG_STD_DEVICES_SETTINGS "stdin=usbkbd,vga,eserial0\0" \ 107 "stdout=vga,eserial0,cbmem\0" \ 108 "stderr=vga,eserial0,cbmem\0" 109 110 #define CONFIG_CONSOLE_MUX 111 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 112 #define CONFIG_SYS_STDIO_DEREGISTER 113 #define CONFIG_CBMEM_CONSOLE 114 115 #define CONFIG_CMDLINE_EDITING 116 #define CONFIG_COMMAND_HISTORY 117 #define CONFIG_AUTOCOMPLETE 118 119 #define CONFIG_SUPPORT_VFAT 120 /************************************************************ 121 * ATAPI support (experimental) 122 ************************************************************/ 123 #define CONFIG_ATAPI 124 125 /************************************************************ 126 * DISK Partition support 127 ************************************************************/ 128 #define CONFIG_EFI_PARTITION 129 #define CONFIG_DOS_PARTITION 130 #define CONFIG_MAC_PARTITION 131 #define CONFIG_ISO_PARTITION /* Experimental */ 132 133 #define CONFIG_CMD_PART 134 #define CONFIG_CMD_CBFS 135 #define CONFIG_CMD_EXT4 136 #define CONFIG_CMD_EXT4_WRITE 137 #define CONFIG_PARTITION_UUIDS 138 139 /*----------------------------------------------------------------------- 140 * Video Configuration 141 */ 142 #define CONFIG_VIDEO 143 #define CONFIG_VIDEO_COREBOOT 144 #define CONFIG_VIDEO_SW_CURSOR 145 #define VIDEO_FB_16BPP_WORD_SWAP 146 #define CONFIG_I8042_KBD 147 #define CONFIG_CFB_CONSOLE 148 #define CONFIG_SYS_CONSOLE_INFO_QUIET 149 150 /* x86 GPIOs are accessed through a PCI device */ 151 #define CONFIG_INTEL_ICH6_GPIO 152 153 /*----------------------------------------------------------------------- 154 * Command line configuration. 155 */ 156 #include <config_cmd_default.h> 157 158 #define CONFIG_CMD_BDI 159 #define CONFIG_CMD_BOOTD 160 #define CONFIG_CMD_CONSOLE 161 #define CONFIG_CMD_DATE 162 #define CONFIG_CMD_ECHO 163 #undef CONFIG_CMD_FLASH 164 #define CONFIG_CMD_FPGA 165 #define CONFIG_CMD_GPIO 166 #define CONFIG_CMD_IMI 167 #undef CONFIG_CMD_IMLS 168 #define CONFIG_CMD_IO 169 #define CONFIG_CMD_IRQ 170 #define CONFIG_CMD_ITEST 171 #define CONFIG_CMD_LOADB 172 #define CONFIG_CMD_LOADS 173 #define CONFIG_CMD_MEMORY 174 #define CONFIG_CMD_MISC 175 #define CONFIG_CMD_NET 176 #undef CONFIG_CMD_NFS 177 #define CONFIG_CMD_PCI 178 #define CONFIG_CMD_PING 179 #define CONFIG_CMD_RUN 180 #define CONFIG_CMD_SAVEENV 181 #define CONFIG_CMD_SETGETDCR 182 #define CONFIG_CMD_SOURCE 183 #define CONFIG_CMD_TIME 184 #define CONFIG_CMD_GETTIME 185 #define CONFIG_CMD_XIMG 186 #define CONFIG_CMD_SCSI 187 188 #define CONFIG_CMD_FAT 189 #define CONFIG_CMD_EXT2 190 191 #define CONFIG_CMD_ZBOOT 192 193 #define CONFIG_BOOTDELAY 2 194 #define CONFIG_BOOTARGS \ 195 "root=/dev/sdb3 init=/sbin/init rootwait ro" 196 #define CONFIG_BOOTCOMMAND \ 197 "ext2load scsi 0:3 01000000 /boot/vmlinuz; zboot 01000000" 198 199 200 #if defined(CONFIG_CMD_KGDB) 201 #define CONFIG_KGDB_BAUDRATE 115200 202 #define CONFIG_KGDB_SER_INDEX 2 203 #endif 204 205 /* 206 * Miscellaneous configurable options 207 */ 208 #define CONFIG_SYS_LONGHELP 209 #define CONFIG_SYS_PROMPT "boot > " 210 #define CONFIG_SYS_CBSIZE 256 211 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 212 sizeof(CONFIG_SYS_PROMPT) + \ 213 16) 214 #define CONFIG_SYS_MAXARGS 16 215 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 216 217 #define CONFIG_SYS_MEMTEST_START 0x00100000 218 #define CONFIG_SYS_MEMTEST_END 0x01000000 219 #define CONFIG_SYS_LOAD_ADDR 0x100000 220 #define CONFIG_SYS_HZ 1000 221 #define CONFIG_SYS_X86_ISR_TIMER 222 223 /*----------------------------------------------------------------------- 224 * SDRAM Configuration 225 */ 226 #define CONFIG_NR_DRAM_BANKS 4 227 228 /* CONFIG_SYS_SDRAM_DRCTMCTL Overrides the following*/ 229 #undef CONFIG_SYS_SDRAM_PRECHARGE_DELAY 230 #undef CONFIG_SYS_SDRAM_RAS_CAS_DELAY 231 #undef CONFIG_SYS_SDRAM_CAS_LATENCY_2T 232 #undef CONFIG_SYS_SDRAM_CAS_LATENCY_3T 233 234 /*----------------------------------------------------------------------- 235 * CPU Features 236 */ 237 238 #define CONFIG_SYS_GENERIC_TIMER 239 #define CONFIG_SYS_PCAT_INTERRUPTS 240 #define CONFIG_SYS_NUM_IRQS 16 241 242 /*----------------------------------------------------------------------- 243 * Memory organization: 244 * 32kB Stack 245 * 16kB Cache-As-RAM @ 0x19200000 246 * 256kB Monitor 247 * (128kB + Environment Sector Size) malloc pool 248 */ 249 #define CONFIG_SYS_STACK_SIZE (32 * 1024) 250 #define CONFIG_SYS_CAR_ADDR 0x19200000 251 #define CONFIG_SYS_CAR_SIZE (16 * 1024) 252 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE 253 #define CONFIG_SYS_MONITOR_LEN (256 * 1024) 254 #define CONFIG_SYS_MALLOC_LEN (0x20000 + 128 * 1024) 255 256 257 /* allow to overwrite serial and ethaddr */ 258 #define CONFIG_ENV_OVERWRITE 259 260 /*----------------------------------------------------------------------- 261 * FLASH configuration 262 */ 263 #define CONFIG_ICH_SPI 264 #define CONFIG_SPI_FLASH 265 #define CONFIG_SPI_FLASH_MACRONIX 266 #define CONFIG_SPI_FLASH_WINBOND 267 #define CONFIG_SPI_FLASH_GIGADEVICE 268 #define CONFIG_SYS_NO_FLASH 269 #define CONFIG_CMD_SF 270 #define CONFIG_CMD_SF_TEST 271 #define CONFIG_CMD_SPI 272 #define CONFIG_SPI 273 274 /*----------------------------------------------------------------------- 275 * Environment configuration 276 */ 277 #define CONFIG_ENV_IS_NOWHERE 278 #define CONFIG_ENV_SIZE 0x01000 279 280 /*----------------------------------------------------------------------- 281 * PCI configuration 282 */ 283 #define CONFIG_PCI 284 285 /*----------------------------------------------------------------------- 286 * USB configuration 287 */ 288 #define CONFIG_USB_EHCI 289 #define CONFIG_USB_EHCI_PCI 290 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 12 291 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 292 #define CONFIG_USB_STORAGE 293 #define CONFIG_USB_KEYBOARD 294 #define CONFIG_SYS_USB_EVENT_POLL 295 296 #define CONFIG_USB_HOST_ETHER 297 #define CONFIG_USB_ETHER_ASIX 298 #define CONFIG_USB_ETHER_SMSC95XX 299 300 #define CONFIG_CMD_USB 301 302 #define CONFIG_EXTRA_ENV_SETTINGS \ 303 CONFIG_STD_DEVICES_SETTINGS 304 305 #endif /* __CONFIG_H */ 306