xref: /openbmc/u-boot/include/configs/coreboot.h (revision 37544a6d)
1 /*
2  * Copyright (c) 2011 The Chromium OS Authors.
3  * (C) Copyright 2008
4  * Graeme Russ, graeme.russ@gmail.com.
5  *
6  * See file CREDITS for list of people who contributed to this
7  * project.
8  *
9  * This program is free software; you can redistribute it and/or
10  * modify it under the terms of the GNU General Public License as
11  * published by the Free Software Foundation; either version 2 of
12  * the License, or (at your option) any later version.
13  *
14  * This program is distributed in the hope that it will be useful,
15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
17  * GNU General Public License for more details.
18  *
19  * You should have received a copy of the GNU General Public License
20  * along with this program; if not, write to the Free Software
21  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22  * MA 02111-1307 USA
23  */
24 
25 #include <asm/ibmpc.h>
26 /*
27  * board/config.h - configuration options, board specific
28  */
29 
30 #ifndef __CONFIG_H
31 #define __CONFIG_H
32 
33 /*
34  * High Level Configuration Options
35  * (easy to change)
36  */
37 #define CONFIG_SYS_COREBOOT
38 #define CONFIG_SHOW_BOOT_PROGRESS
39 #define CONFIG_LAST_STAGE_INIT
40 #define CONFIG_SYS_VSNPRINTF
41 #define CONFIG_ZBOOT_32
42 #define CONFIG_PHYSMEM
43 #define CONFIG_SYS_EARLY_PCI_INIT
44 
45 #define CONFIG_LMB
46 #define CONFIG_OF_LIBFDT
47 #define CONFIG_OF_CONTROL
48 #define CONFIG_OF_SEPARATE
49 #define CONFIG_DEFAULT_DEVICE_TREE	link
50 
51 #define CONFIG_BOOTSTAGE
52 #define CONFIG_BOOTSTAGE_REPORT
53 #define CONFIG_BOOTSTAGE_FDT
54 #define CONFIG_CMD_BOOTSTAGE
55 /* Place to stash bootstage data from first-stage U-Boot */
56 #define CONFIG_BOOTSTAGE_STASH		0x0110f000
57 #define CONFIG_BOOTSTAGE_STASH_SIZE	0x7fc
58 #define CONFIG_BOOTSTAGE_USER_COUNT	60
59 
60 #define CONFIG_LZO
61 #undef CONFIG_ZLIB
62 #undef CONFIG_GZIP
63 
64 /*-----------------------------------------------------------------------
65  * Watchdog Configuration
66  */
67 #undef CONFIG_WATCHDOG
68 #undef CONFIG_HW_WATCHDOG
69 
70 /* SATA AHCI storage */
71 
72 #define CONFIG_SCSI_AHCI
73 
74 #ifdef CONFIG_SCSI_AHCI
75 #define CONFIG_SYS_64BIT_LBA
76 #define CONFIG_SATA_INTEL		1
77 #define CONFIG_SCSI_DEV_LIST		{PCI_VENDOR_ID_INTEL, \
78 			PCI_DEVICE_ID_INTEL_NM10_AHCI},	      \
79 	{PCI_VENDOR_ID_INTEL,		\
80 			PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_MOBILE}, \
81 	{PCI_VENDOR_ID_INTEL, \
82 			PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_SERIES6}, \
83 	{PCI_VENDOR_ID_INTEL,		\
84 			PCI_DEVICE_ID_INTEL_PANTHERPOINT_AHCI_MOBILE}
85 
86 #define CONFIG_SYS_SCSI_MAX_SCSI_ID	2
87 #define CONFIG_SYS_SCSI_MAX_LUN		1
88 #define CONFIG_SYS_SCSI_MAX_DEVICE	(CONFIG_SYS_SCSI_MAX_SCSI_ID * \
89 					 CONFIG_SYS_SCSI_MAX_LUN)
90 #endif
91 
92 /* Generic TPM interfaced through LPC bus */
93 #define CONFIG_TPM
94 #define CONFIG_TPM_TIS_LPC
95 #define CONFIG_TPM_TIS_BASE_ADDRESS        0xfed40000
96 
97 /*-----------------------------------------------------------------------
98  * Real Time Clock Configuration
99  */
100 #define CONFIG_RTC_MC146818
101 #define CONFIG_SYS_ISA_IO_BASE_ADDRESS	0
102 #define CONFIG_SYS_ISA_IO      CONFIG_SYS_ISA_IO_BASE_ADDRESS
103 
104 /*-----------------------------------------------------------------------
105  * Serial Configuration
106  */
107 #define CONFIG_CONS_INDEX		1
108 #define CONFIG_SYS_NS16550
109 #define CONFIG_SYS_NS16550_SERIAL
110 #define CONFIG_SYS_NS16550_REG_SIZE	1
111 #define CONFIG_SYS_NS16550_CLK		1843200
112 #define CONFIG_BAUDRATE			9600
113 #define CONFIG_SYS_BAUDRATE_TABLE	{300, 600, 1200, 2400, 4800, \
114 					 9600, 19200, 38400, 115200}
115 #define CONFIG_SYS_NS16550_COM1	UART0_BASE
116 #define CONFIG_SYS_NS16550_COM2	UART1_BASE
117 #define CONFIG_SYS_NS16550_PORT_MAPPED
118 
119 #define CONFIG_STD_DEVICES_SETTINGS     "stdin=usbkbd,vga,eserial0\0" \
120 					"stdout=vga,eserial0,cbmem\0" \
121 					"stderr=vga,eserial0,cbmem\0"
122 
123 #define CONFIG_CONSOLE_MUX
124 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
125 #define CONFIG_SYS_STDIO_DEREGISTER
126 #define CONFIG_CBMEM_CONSOLE
127 
128 #define CONFIG_CMDLINE_EDITING
129 #define CONFIG_COMMAND_HISTORY
130 #define CONFIG_AUTOCOMPLETE
131 
132 #define CONFIG_SUPPORT_VFAT
133 /************************************************************
134  * ATAPI support (experimental)
135  ************************************************************/
136 #define CONFIG_ATAPI
137 
138 /************************************************************
139  * DISK Partition support
140  ************************************************************/
141 #define CONFIG_EFI_PARTITION
142 #define CONFIG_DOS_PARTITION
143 #define CONFIG_MAC_PARTITION
144 #define CONFIG_ISO_PARTITION		/* Experimental */
145 
146 #define CONFIG_CMD_PART
147 #define CONFIG_CMD_CBFS
148 #define CONFIG_CMD_EXT4
149 #define CONFIG_CMD_EXT4_WRITE
150 #define CONFIG_PARTITION_UUIDS
151 
152 /*-----------------------------------------------------------------------
153  * Video Configuration
154  */
155 #define CONFIG_VIDEO
156 #define CONFIG_VIDEO_COREBOOT
157 #define CONFIG_VIDEO_SW_CURSOR
158 #define VIDEO_FB_16BPP_WORD_SWAP
159 #define CONFIG_I8042_KBD
160 #define CONFIG_CFB_CONSOLE
161 #define CONFIG_SYS_CONSOLE_INFO_QUIET
162 
163 /* x86 GPIOs are accessed through a PCI device */
164 #define CONFIG_INTEL_ICH6_GPIO
165 
166 /*-----------------------------------------------------------------------
167  * Command line configuration.
168  */
169 #include <config_cmd_default.h>
170 
171 #define CONFIG_CMD_BDI
172 #define CONFIG_CMD_BOOTD
173 #define CONFIG_CMD_CONSOLE
174 #define CONFIG_CMD_DATE
175 #define CONFIG_CMD_ECHO
176 #undef CONFIG_CMD_FLASH
177 #define CONFIG_CMD_FPGA
178 #define CONFIG_CMD_GPIO
179 #define CONFIG_CMD_IMI
180 #undef CONFIG_CMD_IMLS
181 #define CONFIG_CMD_IO
182 #define CONFIG_CMD_IRQ
183 #define CONFIG_CMD_ITEST
184 #define CONFIG_CMD_LOADB
185 #define CONFIG_CMD_LOADS
186 #define CONFIG_CMD_MEMORY
187 #define CONFIG_CMD_MISC
188 #define CONFIG_CMD_NET
189 #undef CONFIG_CMD_NFS
190 #define CONFIG_CMD_PCI
191 #define CONFIG_CMD_PING
192 #define CONFIG_CMD_RUN
193 #define CONFIG_CMD_SAVEENV
194 #define CONFIG_CMD_SETGETDCR
195 #define CONFIG_CMD_SOURCE
196 #define CONFIG_CMD_TIME
197 #define CONFIG_CMD_GETTIME
198 #define CONFIG_CMD_XIMG
199 #define CONFIG_CMD_SCSI
200 
201 #define CONFIG_CMD_FAT
202 #define CONFIG_CMD_EXT2
203 
204 #define CONFIG_CMD_ZBOOT
205 
206 #define CONFIG_BOOTDELAY	2
207 #define CONFIG_BOOTARGS		\
208 	"root=/dev/sdb3 init=/sbin/init rootwait ro"
209 #define CONFIG_BOOTCOMMAND	\
210 	"ext2load scsi 0:3 01000000 /boot/vmlinuz; zboot 01000000"
211 
212 
213 #if defined(CONFIG_CMD_KGDB)
214 #define CONFIG_KGDB_BAUDRATE			115200
215 #define CONFIG_KGDB_SER_INDEX			2
216 #endif
217 
218 /*
219  * Miscellaneous configurable options
220  */
221 #define CONFIG_SYS_LONGHELP
222 #define CONFIG_SYS_PROMPT			"boot > "
223 #define CONFIG_SYS_CBSIZE			256
224 #define CONFIG_SYS_PBSIZE			(CONFIG_SYS_CBSIZE + \
225 						 sizeof(CONFIG_SYS_PROMPT) + \
226 						 16)
227 #define CONFIG_SYS_MAXARGS			16
228 #define CONFIG_SYS_BARGSIZE			CONFIG_SYS_CBSIZE
229 
230 #define CONFIG_SYS_MEMTEST_START		0x00100000
231 #define CONFIG_SYS_MEMTEST_END			0x01000000
232 #define CONFIG_SYS_LOAD_ADDR			0x100000
233 #define CONFIG_SYS_HZ				1000
234 
235 /*-----------------------------------------------------------------------
236  * SDRAM Configuration
237  */
238 #define CONFIG_NR_DRAM_BANKS			4
239 
240 /* CONFIG_SYS_SDRAM_DRCTMCTL Overrides the following*/
241 #undef CONFIG_SYS_SDRAM_PRECHARGE_DELAY
242 #undef CONFIG_SYS_SDRAM_RAS_CAS_DELAY
243 #undef CONFIG_SYS_SDRAM_CAS_LATENCY_2T
244 #undef CONFIG_SYS_SDRAM_CAS_LATENCY_3T
245 
246 /*-----------------------------------------------------------------------
247  * CPU Features
248  */
249 
250 #define CONFIG_SYS_X86_TSC_TIMER
251 #define CONFIG_SYS_PCAT_INTERRUPTS
252 #define CONFIG_SYS_PCAT_TIMER
253 #define CONFIG_SYS_NUM_IRQS			16
254 
255 /*-----------------------------------------------------------------------
256  * Memory organization:
257  * 32kB Stack
258  * 16kB Cache-As-RAM @ 0x19200000
259  * 256kB Monitor
260  * (128kB + Environment Sector Size) malloc pool
261  */
262 #define CONFIG_SYS_STACK_SIZE			(32 * 1024)
263 #define CONFIG_SYS_CAR_ADDR			0x19200000
264 #define CONFIG_SYS_CAR_SIZE			(16 * 1024)
265 #define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_TEXT_BASE
266 #define CONFIG_SYS_MONITOR_LEN			(256 * 1024)
267 #define CONFIG_SYS_MALLOC_LEN			(0x20000 + 128 * 1024)
268 
269 
270 /* allow to overwrite serial and ethaddr */
271 #define CONFIG_ENV_OVERWRITE
272 
273 /*-----------------------------------------------------------------------
274  * FLASH configuration
275  */
276 #define CONFIG_ICH_SPI
277 #define CONFIG_SPI_FLASH
278 #define CONFIG_SPI_FLASH_MACRONIX
279 #define CONFIG_SPI_FLASH_WINBOND
280 #define CONFIG_SPI_FLASH_GIGADEVICE
281 #define CONFIG_SYS_NO_FLASH
282 #define CONFIG_CMD_SF
283 #define CONFIG_CMD_SF_TEST
284 #define CONFIG_CMD_SPI
285 #define CONFIG_SPI
286 
287 /*-----------------------------------------------------------------------
288  * Environment configuration
289  */
290 #define CONFIG_ENV_IS_NOWHERE
291 #define CONFIG_ENV_SIZE			0x01000
292 
293 /*-----------------------------------------------------------------------
294  * PCI configuration
295  */
296 #define CONFIG_PCI
297 
298 /*-----------------------------------------------------------------------
299  * USB configuration
300  */
301 #define CONFIG_USB_EHCI
302 #define CONFIG_USB_EHCI_PCI
303 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS     12
304 #define CONFIG_USB_MAX_CONTROLLER_COUNT        2
305 #define CONFIG_USB_STORAGE
306 #define CONFIG_USB_KEYBOARD
307 #define CONFIG_SYS_USB_EVENT_POLL
308 
309 #define CONFIG_USB_HOST_ETHER
310 #define CONFIG_USB_ETHER_ASIX
311 #define CONFIG_USB_ETHER_SMSC95XX
312 
313 #define CONFIG_CMD_USB
314 
315 #define CONFIG_EXTRA_ENV_SETTINGS \
316 	CONFIG_STD_DEVICES_SETTINGS
317 
318 #endif	/* __CONFIG_H */
319