1 /*
2  * Copyright (C) 2014 Stefan Roese <sr@denx.de>
3  * Copyright (C) 2016 Mario Six <mario.six@gdsys.cc>
4  *
5  * SPDX-License-Identifier:	GPL-2.0+
6  */
7 
8 #ifndef _CONFIG_CONTROLCENTERDC_H
9 #define _CONFIG_CONTROLCENTERDC_H
10 
11 /*
12  * High Level Configuration Options (easy to change)
13  */
14 #define CONFIG_CUSTOMER_BOARD_SUPPORT
15 
16 #define CONFIG_SKIP_LOWLEVEL_INIT	/* disable board lowlevel_init */
17 #define CONFIG_DISPLAY_BOARDINFO_LATE
18 #define CONFIG_BOARD_LATE_INIT
19 #define CONFIG_LAST_STAGE_INIT
20 
21 /*
22  * TEXT_BASE needs to be below 16MiB, since this area is scrubbed
23  * for DDR ECC byte filling in the SPL before loading the main
24  * U-Boot into it.
25  */
26 #define	CONFIG_SYS_TEXT_BASE	0x00800000
27 
28 #define CONFIG_SYS_TCLK		250000000	/* 250MHz */
29 
30 #define CONFIG_LOADADDR 		1000000
31 
32 /*
33  * Commands configuration
34  */
35 #define CONFIG_CMD_I2C
36 #define CONFIG_CMD_SPI
37 
38 /* SPI NOR flash default params, used by sf commands */
39 #define CONFIG_SF_DEFAULT_BUS		1
40 #define CONFIG_SF_DEFAULT_SPEED		1000000
41 #define CONFIG_SF_DEFAULT_MODE		SPI_MODE_3
42 
43 /*
44  * SDIO/MMC Card Configuration
45  */
46 #define CONFIG_SYS_MMC_BASE		MVEBU_SDIO_BASE
47 
48 /*
49  * SATA/SCSI/AHCI configuration
50  */
51 #define CONFIG_SCSI_AHCI_PLAT
52 #define CONFIG_SYS_SCSI_MAX_SCSI_ID	2
53 #define CONFIG_SYS_SCSI_MAX_LUN		1
54 #define CONFIG_SYS_SCSI_MAX_DEVICE	(CONFIG_SYS_SCSI_MAX_SCSI_ID * \
55 					 CONFIG_SYS_SCSI_MAX_LUN)
56 
57 /* Additional FS support/configuration */
58 #define CONFIG_SUPPORT_VFAT
59 
60 /* USB/EHCI configuration */
61 #define CONFIG_EHCI_IS_TDI
62 
63 /* Environment in SPI NOR flash */
64 #define CONFIG_ENV_SPI_BUS		1
65 #define CONFIG_ENV_OFFSET		(1 << 20) /* 1MiB in */
66 #define CONFIG_ENV_SIZE			(64 << 10) /* 64KiB */
67 #define CONFIG_ENV_SECT_SIZE		(256 << 10) /* 256KiB sectors */
68 
69 #define CONFIG_PHY_MARVELL		/* there is a marvell phy */
70 #define PHY_ANEG_TIMEOUT	8000	/* PHY needs a longer aneg time */
71 
72 /* PCIe support */
73 #ifndef CONFIG_SPL_BUILD
74 #define CONFIG_PCI
75 #define CONFIG_PCI_MVEBU
76 #define CONFIG_PCI_PNP
77 #define CONFIG_PCI_SCAN_SHOW
78 #endif
79 
80 #define CONFIG_SYS_ALT_MEMTEST
81 
82 /*
83  * Software (bit-bang) MII driver configuration
84  */
85 #define CONFIG_BITBANGMII		/* bit-bang MII PHY management */
86 #define CONFIG_BITBANGMII_MULTI
87 
88 /* SPL */
89 /*
90  * Select the boot device here
91  *
92  * Currently supported are:
93  * SPL_BOOT_SPI_NOR_FLASH	- Booting via SPI NOR flash
94  * SPL_BOOT_SDIO_MMC_CARD	- Booting via SDIO/MMC card (partition 1)
95  */
96 #define SPL_BOOT_SPI_NOR_FLASH		1
97 #define SPL_BOOT_SDIO_MMC_CARD		2
98 #define CONFIG_SPL_BOOT_DEVICE		SPL_BOOT_SPI_NOR_FLASH
99 
100 /* Defines for SPL */
101 #define CONFIG_SPL_FRAMEWORK
102 #define CONFIG_SPL_SIZE			(160 << 10)
103 
104 #if defined(CONFIG_SECURED_MODE_IMAGE)
105 #define CONFIG_SPL_TEXT_BASE		0x40002614
106 #define CONFIG_SPL_MAX_SIZE		(CONFIG_SPL_SIZE - 0x2614)
107 #else
108 #define CONFIG_SPL_TEXT_BASE		0x40000030
109 #define CONFIG_SPL_MAX_SIZE		(CONFIG_SPL_SIZE - 0x30)
110 #endif
111 
112 #define CONFIG_SPL_BSS_START_ADDR	(0x40000000 + CONFIG_SPL_SIZE)
113 #define CONFIG_SPL_BSS_MAX_SIZE		(16 << 10)
114 
115 #ifdef CONFIG_SPL_BUILD
116 #define CONFIG_SYS_MALLOC_SIMPLE
117 #endif
118 
119 #define CONFIG_SPL_STACK		(0x40000000 + ((212 - 16) << 10))
120 #define CONFIG_SPL_BOOTROM_SAVE		(CONFIG_SPL_STACK + 4)
121 
122 #define CONFIG_SPL_LIBCOMMON_SUPPORT
123 #define CONFIG_SPL_LIBGENERIC_SUPPORT
124 #define CONFIG_SPL_SERIAL_SUPPORT
125 #define CONFIG_SPL_I2C_SUPPORT
126 
127 #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH
128 /* SPL related SPI defines */
129 #define CONFIG_SPL_SPI_LOAD
130 #define CONFIG_SYS_SPI_U_BOOT_OFFS	0x30000
131 #define CONFIG_SYS_U_BOOT_OFFS		CONFIG_SYS_SPI_U_BOOT_OFFS
132 #endif
133 
134 #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD
135 /* SPL related MMC defines */
136 #define CONFIG_SPL_MMC_SUPPORT
137 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION 1
138 #define CONFIG_SYS_MMC_U_BOOT_OFFS		(168 << 10)
139 #define CONFIG_SYS_U_BOOT_OFFS			CONFIG_SYS_MMC_U_BOOT_OFFS
140 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	(CONFIG_SYS_U_BOOT_OFFS / 512)
141 #ifdef CONFIG_SPL_BUILD
142 #define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER	0x00180000	/* in SDRAM */
143 #endif
144 #endif
145 
146 /*
147  * Environment Configuration
148  */
149 #define CONFIG_ENV_OVERWRITE
150 
151 #define CONFIG_BAUDRATE 115200
152 
153 #define CONFIG_HOSTNAME		ccdc
154 #define CONFIG_ROOTPATH		"/opt/nfsroot"
155 #define CONFIG_BOOTFILE		"ccdc.img"
156 
157 #define CONFIG_PREBOOT		/* enable preboot variable */
158 
159 #define CONFIG_EXTRA_ENV_SETTINGS						\
160 	"netdev=eth1\0"						\
161 	"consoledev=ttyS1\0"							\
162 	"u-boot=u-boot.bin\0"							\
163 	"bootfile_addr=1000000\0"						\
164 	"keyprogram_addr=3000000\0"						\
165 	"keyprogram_file=keyprogram.img\0"						\
166 	"fdtfile=controlcenterdc.dtb\0"						\
167 	"load=tftpboot ${loadaddr} ${u-boot}\0"					\
168 	"mmcdev=0:2\0"								\
169 	"update=sf probe 1:0;"							\
170 		" sf erase 0 +${filesize};"					\
171 		" sf write ${fileaddr} 0 ${filesize}\0"				\
172 	"upd=run load update\0"							\
173 	"fdt_high=0x10000000\0"							\
174 	"initrd_high=0x10000000\0"						\
175 	"loadkeyprogram=tpm flush_keys;"					\
176 		" mmc rescan;"							\
177 		" ext4load mmc ${mmcdev} ${keyprogram_addr} ${keyprogram_file};"\
178 		" source ${keyprogram_addr}:script@1\0"				\
179 	"gpio1=gpio@22_25\0"							\
180 	"gpio2=A29\0"								\
181 	"blinkseq='0 0 0 0 2 0 2 2 3 1 3 1 0 0 2 2 3 1 3 3 2 0 2 2 3 1 1 1 "	\
182 		  "2 0 2 2 3 1 3 1 0 0 2 0 3 3 3 1 2 0 0 0 3 1 1 1 0 0 0 0'\0"	\
183 	"bootfail=for i in ${blinkseq}; do"					\
184 		" if test $i -eq 0; then"					\
185 		" gpio clear ${gpio1}; gpio set ${gpio2};"			\
186 		" elif test $i -eq 1; then"					\
187 		" gpio clear ${gpio1}; gpio clear ${gpio2};"			\
188 		" elif test $i -eq 2; then"					\
189 		" gpio set ${gpio1}; gpio set ${gpio2};"			\
190 		" else;"							\
191 		" gpio clear ${gpio1}; gpio set ${gpio2};"			\
192 		" fi; sleep 0.12; done\0"
193 
194 #define CONFIG_NFSBOOTCOMMAND								\
195 	"setenv bootargs root=/dev/nfs rw "						\
196 	"nfsroot=${serverip}:${rootpath} "						\
197 	"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:${netdev}:off "	\
198 	"console=${consoledev},${baudrate} ${othbootargs}; "				\
199 	"tftpboot ${bootfile_addr} ${bootfile}; "						\
200 	"bootm ${bootfile_addr}"
201 
202 #define CONFIG_MMCBOOTCOMMAND					\
203 	"setenv bootargs root=/dev/mmcblk0p3 rw rootwait "	\
204 	"console=${consoledev},${baudrate} ${othbootargs}; "	\
205 	"ext2load mmc 0:2 ${bootfile_addr} ${bootfile}; "	\
206 	"bootm ${bootfile_addr}"
207 
208 #define CONFIG_BOOTCOMMAND			\
209 	"if env exists keyprogram; then;"	\
210 	" setenv keyprogram; run nfsboot;"	\
211         " fi;"					\
212         " run dobootfail"
213 
214 /*
215  * mv-common.h should be defined after CMD configs since it used them
216  * to enable certain macros
217  */
218 #include "mv-common.h"
219 
220 #endif /* _CONFIG_CONTROLCENTERDC_H */
221