1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright (C) 2014 Stefan Roese <sr@denx.de> 4 * Copyright (C) 2016 Mario Six <mario.six@gdsys.cc> 5 */ 6 7 #ifndef _CONFIG_CONTROLCENTERDC_H 8 #define _CONFIG_CONTROLCENTERDC_H 9 10 /* 11 * High Level Configuration Options (easy to change) 12 */ 13 #define CONFIG_CUSTOMER_BOARD_SUPPORT 14 15 #define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ 16 #define CONFIG_BOARD_LATE_INIT 17 18 /* 19 * TEXT_BASE needs to be below 16MiB, since this area is scrubbed 20 * for DDR ECC byte filling in the SPL before loading the main 21 * U-Boot into it. 22 */ 23 24 #define CONFIG_SYS_TCLK 250000000 /* 250MHz */ 25 26 #define CONFIG_LOADADDR 1000000 27 28 /* 29 * SDIO/MMC Card Configuration 30 */ 31 #define CONFIG_SYS_MMC_BASE MVEBU_SDIO_BASE 32 33 /* 34 * SATA/SCSI/AHCI configuration 35 */ 36 #define CONFIG_SCSI_AHCI_PLAT 37 #define CONFIG_SYS_SCSI_MAX_SCSI_ID 2 38 #define CONFIG_SYS_SCSI_MAX_LUN 1 39 #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ 40 CONFIG_SYS_SCSI_MAX_LUN) 41 42 /* USB/EHCI configuration */ 43 #define CONFIG_EHCI_IS_TDI 44 45 /* Environment in SPI NOR flash */ 46 #define CONFIG_ENV_OFFSET (1 << 20) /* 1MiB in */ 47 #define CONFIG_ENV_SIZE (64 << 10) /* 64KiB */ 48 #define CONFIG_ENV_SECT_SIZE (256 << 10) /* 256KiB sectors */ 49 50 #define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ 51 52 /* PCIe support */ 53 #ifndef CONFIG_SPL_BUILD 54 #define CONFIG_PCI_SCAN_SHOW 55 #endif 56 57 /* 58 * Software (bit-bang) MII driver configuration 59 */ 60 #define CONFIG_BITBANGMII /* bit-bang MII PHY management */ 61 #define CONFIG_BITBANGMII_MULTI 62 63 /* SPL */ 64 /* 65 * Select the boot device here 66 * 67 * Currently supported are: 68 * SPL_BOOT_SPI_NOR_FLASH - Booting via SPI NOR flash 69 * SPL_BOOT_SDIO_MMC_CARD - Booting via SDIO/MMC card (partition 1) 70 */ 71 #define SPL_BOOT_SPI_NOR_FLASH 1 72 #define SPL_BOOT_SDIO_MMC_CARD 2 73 #define CONFIG_SPL_BOOT_DEVICE SPL_BOOT_SPI_NOR_FLASH 74 75 /* Defines for SPL */ 76 #define CONFIG_SPL_SIZE (160 << 10) 77 78 #if defined(CONFIG_SECURED_MODE_IMAGE) 79 #define CONFIG_SPL_TEXT_BASE 0x40002614 80 #define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x2614) 81 #else 82 #define CONFIG_SPL_TEXT_BASE 0x40000030 83 #define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x30) 84 #endif 85 86 #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) 87 #define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) 88 89 #ifdef CONFIG_SPL_BUILD 90 #define CONFIG_SYS_MALLOC_SIMPLE 91 #endif 92 93 #define CONFIG_SPL_STACK (0x40000000 + ((212 - 16) << 10)) 94 #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) 95 96 #define CONFIG_SPL_LIBCOMMON_SUPPORT 97 #define CONFIG_SPL_LIBGENERIC_SUPPORT 98 #define CONFIG_SPL_I2C_SUPPORT 99 100 #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH 101 /* SPL related SPI defines */ 102 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x30000 103 #define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS 104 #endif 105 106 #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD 107 /* SPL related MMC defines */ 108 #define CONFIG_SPL_MMC_SUPPORT 109 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION 1 110 #define CONFIG_SYS_MMC_U_BOOT_OFFS (168 << 10) 111 #define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_MMC_U_BOOT_OFFS 112 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR (CONFIG_SYS_U_BOOT_OFFS / 512) 113 #ifdef CONFIG_SPL_BUILD 114 #define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */ 115 #endif 116 #endif 117 118 /* 119 * Environment Configuration 120 */ 121 #define CONFIG_ENV_OVERWRITE 122 123 #define CONFIG_BAUDRATE 115200 124 125 #define CONFIG_HOSTNAME "ccdc" 126 #define CONFIG_ROOTPATH "/opt/nfsroot" 127 #define CONFIG_BOOTFILE "ccdc.img" 128 129 #define CONFIG_PREBOOT /* enable preboot variable */ 130 131 #define CONFIG_EXTRA_ENV_SETTINGS \ 132 "netdev=eth1\0" \ 133 "consoledev=ttyS1\0" \ 134 "u-boot=u-boot.bin\0" \ 135 "bootfile_addr=1000000\0" \ 136 "keyprogram_addr=3000000\0" \ 137 "keyprogram_file=keyprogram.img\0" \ 138 "fdtfile=controlcenterdc.dtb\0" \ 139 "load=tftpboot ${loadaddr} ${u-boot}\0" \ 140 "mmcdev=0:2\0" \ 141 "update=sf probe 1:0;" \ 142 " sf erase 0 +${filesize};" \ 143 " sf write ${fileaddr} 0 ${filesize}\0" \ 144 "upd=run load update\0" \ 145 "fdt_high=0x10000000\0" \ 146 "initrd_high=0x10000000\0" \ 147 "loadkeyprogram=tpm flush_keys;" \ 148 " mmc rescan;" \ 149 " ext4load mmc ${mmcdev} ${keyprogram_addr} ${keyprogram_file};"\ 150 " source ${keyprogram_addr}:script@1\0" \ 151 "gpio1=gpio@22_25\0" \ 152 "gpio2=A29\0" \ 153 "blinkseq='0 0 0 0 2 0 2 2 3 1 3 1 0 0 2 2 3 1 3 3 2 0 2 2 3 1 1 1 " \ 154 "2 0 2 2 3 1 3 1 0 0 2 0 3 3 3 1 2 0 0 0 3 1 1 1 0 0 0 0'\0" \ 155 "bootfail=for i in ${blinkseq}; do" \ 156 " if test $i -eq 0; then" \ 157 " gpio clear ${gpio1}; gpio set ${gpio2};" \ 158 " elif test $i -eq 1; then" \ 159 " gpio clear ${gpio1}; gpio clear ${gpio2};" \ 160 " elif test $i -eq 2; then" \ 161 " gpio set ${gpio1}; gpio set ${gpio2};" \ 162 " else;" \ 163 " gpio clear ${gpio1}; gpio set ${gpio2};" \ 164 " fi; sleep 0.12; done\0" 165 166 #define CONFIG_NFSBOOTCOMMAND \ 167 "setenv bootargs root=/dev/nfs rw " \ 168 "nfsroot=${serverip}:${rootpath} " \ 169 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:${netdev}:off " \ 170 "console=${consoledev},${baudrate} ${othbootargs}; " \ 171 "tftpboot ${bootfile_addr} ${bootfile}; " \ 172 "bootm ${bootfile_addr}" 173 174 #define CONFIG_MMCBOOTCOMMAND \ 175 "setenv bootargs root=/dev/mmcblk0p3 rw rootwait " \ 176 "console=${consoledev},${baudrate} ${othbootargs}; " \ 177 "ext2load mmc 0:2 ${bootfile_addr} ${bootfile}; " \ 178 "bootm ${bootfile_addr}" 179 180 #define CONFIG_BOOTCOMMAND \ 181 "if env exists keyprogram; then;" \ 182 " setenv keyprogram; run nfsboot;" \ 183 " fi;" \ 184 " run dobootfail" 185 186 /* 187 * mv-common.h should be defined after CMD configs since it used them 188 * to enable certain macros 189 */ 190 #include "mv-common.h" 191 192 #endif /* _CONFIG_CONTROLCENTERDC_H */ 193