1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright 2015-2016 Toradex, Inc. 4 * 5 * Configuration settings for the Toradex VF50/VF61 modules. 6 * 7 * Based on vf610twr.h: 8 * Copyright 2013 Freescale Semiconductor, Inc. 9 */ 10 11 #ifndef __CONFIG_H 12 #define __CONFIG_H 13 14 #include <asm/arch/imx-regs.h> 15 16 #define CONFIG_SYS_FSL_CLK 17 18 #define CONFIG_SKIP_LOWLEVEL_INIT 19 20 #ifdef CONFIG_CMD_FUSE 21 #define CONFIG_MXC_OCOTP 22 #endif 23 24 #ifdef CONFIG_VIDEO_FSL_DCU_FB 25 #define CONFIG_SPLASH_SCREEN_ALIGN 26 #define CONFIG_VIDEO_LOGO 27 #define CONFIG_VIDEO_BMP_LOGO 28 #define CONFIG_SYS_FSL_DCU_LE 29 30 #define CONFIG_SYS_DCU_ADDR DCU0_BASE_ADDR 31 #define DCU_LAYER_MAX_NUM 64 32 #endif 33 34 /* Size of malloc() pool */ 35 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024) 36 37 /* Allow to overwrite serial and ethaddr */ 38 #define CONFIG_ENV_OVERWRITE 39 40 /* NAND support */ 41 #define CONFIG_SYS_NAND_ONFI_DETECTION 42 #define CONFIG_SYS_MAX_NAND_DEVICE 1 43 #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR 44 45 /* Dynamic MTD partition support */ 46 #define CONFIG_MTD_PARTITIONS 47 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ 48 49 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 50 #define CONFIG_SYS_FSL_ESDHC_NUM 1 51 52 #define CONFIG_FEC_MXC 53 #define CONFIG_MII 54 #define IMX_FEC_BASE ENET1_BASE_ADDR 55 #define CONFIG_FEC_XCV_TYPE RMII 56 #define CONFIG_FEC_MXC_PHYADDR 0 57 58 #define CONFIG_IPADDR 192.168.10.2 59 #define CONFIG_NETMASK 255.255.255.0 60 #define CONFIG_SERVERIP 192.168.10.1 61 62 #define CONFIG_LOADADDR 0x80008000 63 #define CONFIG_FDTADDR 0x84000000 64 65 /* We boot from the gfxRAM area of the OCRAM. */ 66 #define CONFIG_BOARD_SIZE_LIMIT 520192 67 68 #define SD_BOOTCMD \ 69 "sdargs=root=/dev/mmcblk0p2 rw rootwait\0" \ 70 "sdboot=run setup; setenv bootargs ${defargs} ${sdargs} ${mtdparts} " \ 71 "${setupargs} ${vidargs}; echo Booting from MMC/SD card...; " \ 72 "load mmc 0:2 ${kernel_addr_r} /boot/${kernel_file} && " \ 73 "load mmc 0:2 ${fdt_addr_r} /boot/${soc}-colibri-${fdt_board}.dtb && " \ 74 "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ 75 76 #define NFS_BOOTCMD \ 77 "nfsargs=ip=:::::eth0: root=/dev/nfs\0" \ 78 "nfsboot=run setup; " \ 79 "setenv bootargs ${defargs} ${nfsargs} ${mtdparts} " \ 80 "${setupargs} ${vidargs}; echo Booting from NFS...;" \ 81 "dhcp ${kernel_addr_r} && " \ 82 "tftp ${fdt_addr_r} ${soc}-colibri-${fdt_board}.dtb && " \ 83 "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ 84 85 #define UBI_BOOTCMD \ 86 "ubiargs=ubi.mtd=ubi root=ubi0:rootfs rootfstype=ubifs " \ 87 "ubi.fm_autoconvert=1\0" \ 88 "ubiboot=run setup; " \ 89 "setenv bootargs ${defargs} ${ubiargs} ${mtdparts} " \ 90 "${setupargs} ${vidargs}; echo Booting from NAND...; " \ 91 "ubi part ubi && " \ 92 "ubi read ${kernel_addr_r} kernel && " \ 93 "ubi read ${fdt_addr_r} dtb && " \ 94 "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ 95 96 #define CONFIG_BOOTCOMMAND "run ubiboot; run sdboot; run nfsboot" 97 98 #define DFU_ALT_NAND_INFO "vf-bcb part 0,1;u-boot part 0,2;ubi part 0,4" 99 100 #define CONFIG_EXTRA_ENV_SETTINGS \ 101 "kernel_addr_r=0x82000000\0" \ 102 "fdt_addr_r=0x84000000\0" \ 103 "kernel_file=zImage\0" \ 104 "fdt_file=${soc}-colibri-${fdt_board}.dtb\0" \ 105 "fdt_board=eval-v3\0" \ 106 "fdt_fixup=;\0" \ 107 "defargs=\0" \ 108 "console=ttyLP0\0" \ 109 "setup=setenv setupargs " \ 110 "console=tty1 console=${console}" \ 111 ",${baudrate}n8 ${memargs}\0" \ 112 "setsdupdate=mmc rescan && set interface mmc && " \ 113 "fatload ${interface} 0:1 ${loadaddr} flash_blk.img && " \ 114 "source ${loadaddr}\0" \ 115 "setusbupdate=usb start && set interface usb && " \ 116 "fatload ${interface} 0:1 ${loadaddr} flash_blk.img && " \ 117 "source ${loadaddr}\0" \ 118 "setupdate=run setsdupdate || run setusbupdate\0" \ 119 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ 120 "dfu_alt_info=" DFU_ALT_NAND_INFO "\0" \ 121 "video-mode=dcufb:640x480-16@60,monitor=lcd\0" \ 122 "splashpos=m,m\0" \ 123 SD_BOOTCMD \ 124 NFS_BOOTCMD \ 125 UBI_BOOTCMD 126 127 /* Miscellaneous configurable options */ 128 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 129 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 130 131 #define CONFIG_SYS_MEMTEST_START 0x80010000 132 #define CONFIG_SYS_MEMTEST_END 0x87C00000 133 134 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 135 #define CONFIG_SYS_HZ 1000 136 137 /* Physical memory map */ 138 #define CONFIG_NR_DRAM_BANKS 1 139 #define PHYS_SDRAM (0x80000000) 140 #define PHYS_SDRAM_SIZE (256 * 1024 * 1024) 141 142 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 143 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 144 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 145 146 #define CONFIG_SYS_INIT_SP_OFFSET \ 147 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 148 #define CONFIG_SYS_INIT_SP_ADDR \ 149 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 150 151 /* Environment organization */ 152 153 #ifdef CONFIG_ENV_IS_IN_MMC 154 #define CONFIG_SYS_MMC_ENV_DEV 0 155 #define CONFIG_ENV_OFFSET (12 * 64 * 1024) 156 #define CONFIG_ENV_SIZE (8 * 1024) 157 #endif 158 159 #ifdef CONFIG_ENV_IS_IN_NAND 160 #define CONFIG_ENV_SIZE (64 * 2048) 161 #define CONFIG_ENV_RANGE (4 * 64 * 2048) 162 #define CONFIG_ENV_OFFSET (12 * 64 * 2048) 163 #endif 164 165 /* USB Host Support */ 166 #define CONFIG_USB_EHCI_VF 167 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 168 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 169 170 /* USB DFU */ 171 #define CONFIG_SYS_DFU_DATA_BUF_SIZE (1024 * 1024) 172 173 /* USB Storage */ 174 175 #endif /* __CONFIG_H */ 176