1 /*
2  * Toradex Colibri PXA270 configuration file
3  *
4  * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
5  *
6  * This program is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU General Public License as
8  * published by the Free Software Foundation; either version 2 of
9  * the License, or (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, write to the Free Software
18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
19  * MA 02111-1307 USA
20  */
21 
22 #ifndef __CONFIG_H
23 #define __CONFIG_H
24 
25 /*
26  * High Level Board Configuration Options
27  */
28 #define	CONFIG_CPU_PXA27X		1	/* Marvell PXA270 CPU */
29 #define	CONFIG_SYS_TEXT_BASE		0x0
30 
31 #define	CONFIG_DISPLAY_CPUINFO
32 
33 /*
34  * Environment settings
35  */
36 #define	CONFIG_ENV_OVERWRITE
37 #define	CONFIG_SYS_MALLOC_LEN		(128 * 1024)
38 #define	CONFIG_ARCH_CPU_INIT
39 #define	CONFIG_BOOTCOMMAND						\
40 	"if mmc init && fatload mmc 0 0xa0000000 uImage; then "		\
41 		"bootm 0xa0000000; "					\
42 	"fi; "								\
43 	"if usb reset && fatload usb 0 0xa0000000 uImage; then "	\
44 		"bootm 0xa0000000; "					\
45 	"fi; "								\
46 	"bootm 0x80000;"
47 #define	CONFIG_BOOTARGS			"console=tty0 console=ttyS0,115200"
48 #define	CONFIG_TIMESTAMP
49 #define	CONFIG_BOOTDELAY		2	/* Autoboot delay */
50 #define	CONFIG_CMDLINE_TAG
51 #define	CONFIG_SETUP_MEMORY_TAGS
52 #define	CONFIG_LZMA			/* LZMA compression support */
53 #define	CONFIG_OF_LIBFDT
54 
55 /*
56  * Serial Console Configuration
57  */
58 #define	CONFIG_PXA_SERIAL
59 #define	CONFIG_FFUART			1
60 #define	CONFIG_BAUDRATE			115200
61 #define	CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }
62 
63 /*
64  * Bootloader Components Configuration
65  */
66 #include <config_cmd_default.h>
67 
68 #define	CONFIG_CMD_NET
69 #define	CONFIG_CMD_ENV
70 #undef	CONFIG_CMD_IMLS
71 #define	CONFIG_CMD_MMC
72 #define	CONFIG_CMD_USB
73 #define	CONFIG_CMD_FLASH
74 
75 /*
76  * Networking Configuration
77  *  chip on the Voipac PXA270 board
78  */
79 #ifdef	CONFIG_CMD_NET
80 #define	CONFIG_CMD_PING
81 #define	CONFIG_CMD_DHCP
82 
83 #define	CONFIG_DRIVER_DM9000		1
84 #define CONFIG_DM9000_BASE		0x08000000
85 #define DM9000_IO			(CONFIG_DM9000_BASE)
86 #define DM9000_DATA			(CONFIG_DM9000_BASE + 4)
87 #define	CONFIG_NET_RETRY_COUNT		10
88 
89 #define	CONFIG_BOOTP_BOOTFILESIZE
90 #define	CONFIG_BOOTP_BOOTPATH
91 #define	CONFIG_BOOTP_GATEWAY
92 #define	CONFIG_BOOTP_HOSTNAME
93 #endif
94 
95 /*
96  * MMC Card Configuration
97  */
98 #ifdef	CONFIG_CMD_MMC
99 #define	CONFIG_MMC
100 #define	CONFIG_GENERIC_MMC
101 #define	CONFIG_PXA_MMC_GENERIC
102 #define	CONFIG_SYS_MMC_BASE		0xF0000000
103 #define	CONFIG_CMD_FAT
104 #define	CONFIG_CMD_EXT2
105 #define	CONFIG_DOS_PARTITION
106 #endif
107 
108 /*
109  * KGDB
110  */
111 #ifdef	CONFIG_CMD_KGDB
112 #define	CONFIG_KGDB_BAUDRATE		230400		/* speed to run kgdb serial port */
113 #define	CONFIG_KGDB_SER_INDEX		2		/* which serial port to use */
114 #endif
115 
116 /*
117  * HUSH Shell Configuration
118  */
119 #define	CONFIG_SYS_HUSH_PARSER		1
120 #define	CONFIG_SYS_PROMPT_HUSH_PS2	"> "
121 
122 #define	CONFIG_SYS_LONGHELP
123 #ifdef	CONFIG_SYS_HUSH_PARSER
124 #define	CONFIG_SYS_PROMPT		"$ "
125 #else
126 #define	CONFIG_SYS_PROMPT		"=> "
127 #endif
128 #define	CONFIG_SYS_CBSIZE		256
129 #define	CONFIG_SYS_PBSIZE		\
130 	(CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
131 #define	CONFIG_SYS_MAXARGS		16
132 #define	CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
133 #define	CONFIG_SYS_DEVICE_NULLDEV	1
134 #define	CONFIG_CMDLINE_EDITING		1
135 #define	CONFIG_AUTO_COMPLETE		1
136 
137 
138 /*
139  * Clock Configuration
140  */
141 #define	CONFIG_SYS_HZ			1000		/* Timer @ 3250000 Hz */
142 #define	CONFIG_SYS_CPUSPEED		0x290		/* 520MHz */
143 
144 /*
145  * Stack sizes
146  *
147  * The stack sizes are set up in start.S using the settings below
148  */
149 #define	CONFIG_STACKSIZE		(128 * 1024)	/* regular stack */
150 #ifdef	CONFIG_USE_IRQ
151 #define	CONFIG_STACKSIZE_IRQ		(4 * 1024)	/* IRQ stack */
152 #define	CONFIG_STACKSIZE_FIQ		(4 * 1024)	/* FIQ stack */
153 #endif
154 
155 /*
156  * DRAM Map
157  */
158 #define	CONFIG_NR_DRAM_BANKS		1		/* We have 1 bank of DRAM */
159 #define	PHYS_SDRAM_1			0xa0000000	/* SDRAM Bank #1 */
160 #define	PHYS_SDRAM_1_SIZE		0x04000000	/* 64 MB */
161 
162 #define	CONFIG_SYS_DRAM_BASE		0xa0000000	/* CS0 */
163 #define	CONFIG_SYS_DRAM_SIZE		0x04000000	/* 64 MB DRAM */
164 
165 #define CONFIG_SYS_MEMTEST_START	0xa0400000	/* memtest works on */
166 #define CONFIG_SYS_MEMTEST_END		0xa0800000	/* 4 ... 8 MB in DRAM */
167 
168 #define	CONFIG_SYS_LOAD_ADDR		PHYS_SDRAM_1
169 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
170 #define	CONFIG_SYS_INIT_SP_ADDR		0x5c010000
171 
172 /*
173  * NOR FLASH
174  */
175 #ifdef	CONFIG_CMD_FLASH
176 #define	PHYS_FLASH_1			0x00000000	/* Flash Bank #1 */
177 #define	CONFIG_SYS_FLASH_BASE		PHYS_FLASH_1
178 
179 #define	CONFIG_SYS_FLASH_CFI
180 #define	CONFIG_FLASH_CFI_DRIVER		1
181 
182 #define	CONFIG_SYS_MAX_FLASH_SECT	(4 + 255)
183 #define	CONFIG_SYS_MAX_FLASH_BANKS	1
184 
185 #define	CONFIG_SYS_FLASH_ERASE_TOUT	(25 * CONFIG_SYS_HZ)
186 #define	CONFIG_SYS_FLASH_WRITE_TOUT	(25 * CONFIG_SYS_HZ)
187 
188 #define	CONFIG_SYS_FLASH_USE_BUFFER_WRITE	1
189 #define	CONFIG_SYS_FLASH_PROTECTION		1
190 
191 #define CONFIG_ENV_IS_IN_FLASH		1
192 
193 #else	/* No flash */
194 #define	CONFIG_SYS_NO_FLASH
195 #define	CONFIG_SYS_ENV_IS_NOWHERE
196 #endif
197 
198 #define	CONFIG_SYS_MONITOR_BASE		0x0
199 #define	CONFIG_SYS_MONITOR_LEN		0x80000
200 
201 #define	CONFIG_ENV_ADDR			\
202 			(CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
203 #define	CONFIG_ENV_SIZE			0x40000
204 #define	CONFIG_ENV_SECT_SIZE		0x40000
205 #define CONFIG_ENV_ADDR_REDUND		(CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
206 #define CONFIG_ENV_SIZE_REDUND		(CONFIG_ENV_SIZE)
207 
208 /*
209  * GPIO settings
210  */
211 #define	CONFIG_SYS_GPSR0_VAL	0x00000000
212 #define	CONFIG_SYS_GPSR1_VAL	0x00020000
213 #define	CONFIG_SYS_GPSR2_VAL	0x0002C000
214 #define	CONFIG_SYS_GPSR3_VAL	0x00000000
215 
216 #define	CONFIG_SYS_GPCR0_VAL	0x00000000
217 #define	CONFIG_SYS_GPCR1_VAL	0x00000000
218 #define	CONFIG_SYS_GPCR2_VAL	0x00000000
219 #define	CONFIG_SYS_GPCR3_VAL	0x00000000
220 
221 #define	CONFIG_SYS_GPDR0_VAL	0x08000000
222 #define	CONFIG_SYS_GPDR1_VAL	0x0002A981
223 #define	CONFIG_SYS_GPDR2_VAL	0x0202FC00
224 #define	CONFIG_SYS_GPDR3_VAL	0x00000000
225 
226 #define	CONFIG_SYS_GAFR0_L_VAL	0x00100000
227 #define	CONFIG_SYS_GAFR0_U_VAL	0x00C00010
228 #define	CONFIG_SYS_GAFR1_L_VAL	0x999A901A
229 #define	CONFIG_SYS_GAFR1_U_VAL	0xAAA00008
230 #define	CONFIG_SYS_GAFR2_L_VAL	0xAAAAAAAA
231 #define	CONFIG_SYS_GAFR2_U_VAL	0x0109A000
232 #define	CONFIG_SYS_GAFR3_L_VAL	0x54000300
233 #define	CONFIG_SYS_GAFR3_U_VAL	0x00024001
234 
235 #define	CONFIG_SYS_PSSR_VAL	0x30
236 
237 /*
238  * Clock settings
239  */
240 #define	CONFIG_SYS_CKEN		0x00500240
241 #define	CONFIG_SYS_CCCR		0x02000290
242 
243 /*
244  * Memory settings
245  */
246 #define	CONFIG_SYS_MSC0_VAL	0x000095f2
247 #define	CONFIG_SYS_MSC1_VAL	0x00007ff4
248 #define	CONFIG_SYS_MSC2_VAL	0x00000000
249 #define	CONFIG_SYS_MDCNFG_VAL	0x08000ac9
250 #define	CONFIG_SYS_MDREFR_VAL	0x2013e01e
251 #define	CONFIG_SYS_MDMRS_VAL	0x00320032
252 #define	CONFIG_SYS_FLYCNFG_VAL	0x00000000
253 #define	CONFIG_SYS_SXCNFG_VAL	0x40044004
254 
255 /*
256  * PCMCIA and CF Interfaces
257  */
258 #define	CONFIG_SYS_MECR_VAL	0x00000001
259 #define	CONFIG_SYS_MCMEM0_VAL	0x00014307
260 #define	CONFIG_SYS_MCMEM1_VAL	0x00014307
261 #define	CONFIG_SYS_MCATT0_VAL	0x0001c787
262 #define	CONFIG_SYS_MCATT1_VAL	0x0001c787
263 #define	CONFIG_SYS_MCIO0_VAL	0x0001430f
264 #define	CONFIG_SYS_MCIO1_VAL	0x0001430f
265 
266 /*
267  * USB
268  */
269 #ifdef CONFIG_CMD_USB
270 #define	CONFIG_USB_OHCI_NEW
271 #define	CONFIG_SYS_USB_OHCI_CPU_INIT
272 #define	CONFIG_SYS_USB_OHCI_BOARD_INIT
273 #define	CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	2
274 #define	CONFIG_SYS_USB_OHCI_REGS_BASE	0x4C000000
275 #define	CONFIG_SYS_USB_OHCI_SLOT_NAME	"tdex270"
276 #define	CONFIG_USB_STORAGE
277 #endif
278 
279 #endif	/* __CONFIG_H */
280