1 /* 2 * Toradex Colibri PXA270 configuration file 3 * 4 * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com> 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License as 8 * published by the Free Software Foundation; either version 2 of 9 * the License, or (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 19 * MA 02111-1307 USA 20 */ 21 22 #ifndef __CONFIG_H 23 #define __CONFIG_H 24 25 /* 26 * High Level Board Configuration Options 27 */ 28 #define CONFIG_CPU_PXA27X 1 /* Marvell PXA270 CPU */ 29 #define CONFIG_SYS_TEXT_BASE 0x0 30 31 /* 32 * Environment settings 33 */ 34 #define CONFIG_ENV_OVERWRITE 35 #define CONFIG_SYS_MALLOC_LEN (128 * 1024) 36 #define CONFIG_ARCH_CPU_INIT 37 #define CONFIG_BOOTCOMMAND \ 38 "if mmc init && fatload mmc 0 0xa0000000 uImage; then " \ 39 "bootm 0xa0000000; " \ 40 "fi; " \ 41 "if usb reset && fatload usb 0 0xa0000000 uImage; then " \ 42 "bootm 0xa0000000; " \ 43 "fi; " \ 44 "bootm 0x80000;" 45 #define CONFIG_BOOTARGS "console=tty0 console=ttyS0,115200" 46 #define CONFIG_TIMESTAMP 47 #define CONFIG_BOOTDELAY 2 /* Autoboot delay */ 48 #define CONFIG_CMDLINE_TAG 49 #define CONFIG_SETUP_MEMORY_TAGS 50 #define CONFIG_LZMA /* LZMA compression support */ 51 #define CONFIG_OF_LIBFDT 52 53 /* 54 * Serial Console Configuration 55 */ 56 #define CONFIG_PXA_SERIAL 57 #define CONFIG_FFUART 1 58 #define CONFIG_CONS_INDEX 3 59 #define CONFIG_BAUDRATE 115200 60 61 /* 62 * Bootloader Components Configuration 63 */ 64 #include <config_cmd_default.h> 65 66 #define CONFIG_CMD_NET 67 #define CONFIG_CMD_ENV 68 #undef CONFIG_CMD_IMLS 69 #define CONFIG_CMD_MMC 70 #define CONFIG_CMD_USB 71 #define CONFIG_CMD_FLASH 72 73 /* 74 * Networking Configuration 75 * chip on the Voipac PXA270 board 76 */ 77 #ifdef CONFIG_CMD_NET 78 #define CONFIG_CMD_PING 79 #define CONFIG_CMD_DHCP 80 81 #define CONFIG_DRIVER_DM9000 1 82 #define CONFIG_DM9000_BASE 0x08000000 83 #define DM9000_IO (CONFIG_DM9000_BASE) 84 #define DM9000_DATA (CONFIG_DM9000_BASE + 4) 85 #define CONFIG_NET_RETRY_COUNT 10 86 87 #define CONFIG_BOOTP_BOOTFILESIZE 88 #define CONFIG_BOOTP_BOOTPATH 89 #define CONFIG_BOOTP_GATEWAY 90 #define CONFIG_BOOTP_HOSTNAME 91 #endif 92 93 /* 94 * HUSH Shell Configuration 95 */ 96 #define CONFIG_SYS_HUSH_PARSER 1 97 98 #define CONFIG_SYS_LONGHELP 99 #ifdef CONFIG_SYS_HUSH_PARSER 100 #define CONFIG_SYS_PROMPT "$ " 101 #else 102 #define CONFIG_SYS_PROMPT "=> " 103 #endif 104 #define CONFIG_SYS_CBSIZE 256 105 #define CONFIG_SYS_PBSIZE \ 106 (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) 107 #define CONFIG_SYS_MAXARGS 16 108 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 109 #define CONFIG_SYS_DEVICE_NULLDEV 1 110 #define CONFIG_CMDLINE_EDITING 1 111 #define CONFIG_AUTO_COMPLETE 1 112 113 114 /* 115 * Clock Configuration 116 */ 117 #define CONFIG_SYS_HZ 1000 /* Timer @ 3250000 Hz */ 118 #define CONFIG_SYS_CPUSPEED 0x290 /* 520MHz */ 119 120 /* 121 * DRAM Map 122 */ 123 #define CONFIG_NR_DRAM_BANKS 1 /* We have 1 bank of DRAM */ 124 #define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */ 125 #define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */ 126 127 #define CONFIG_SYS_DRAM_BASE 0xa0000000 /* CS0 */ 128 #define CONFIG_SYS_DRAM_SIZE 0x04000000 /* 64 MB DRAM */ 129 130 #define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */ 131 #define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */ 132 133 #define CONFIG_SYS_LOAD_ADDR PHYS_SDRAM_1 134 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 135 #define CONFIG_SYS_INIT_SP_ADDR 0x5c010000 136 137 /* 138 * NOR FLASH 139 */ 140 #ifdef CONFIG_CMD_FLASH 141 #define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */ 142 #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 143 144 #define CONFIG_SYS_FLASH_CFI 145 #define CONFIG_FLASH_CFI_DRIVER 1 146 147 #define CONFIG_SYS_MAX_FLASH_SECT (4 + 255) 148 #define CONFIG_SYS_MAX_FLASH_BANKS 1 149 150 #define CONFIG_SYS_FLASH_ERASE_TOUT (25 * CONFIG_SYS_HZ) 151 #define CONFIG_SYS_FLASH_WRITE_TOUT (25 * CONFIG_SYS_HZ) 152 153 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 154 #define CONFIG_SYS_FLASH_PROTECTION 1 155 156 #define CONFIG_ENV_IS_IN_FLASH 1 157 158 #else /* No flash */ 159 #define CONFIG_SYS_NO_FLASH 160 #define CONFIG_SYS_ENV_IS_NOWHERE 161 #endif 162 163 #define CONFIG_SYS_MONITOR_BASE 0x0 164 #define CONFIG_SYS_MONITOR_LEN 0x80000 165 166 #define CONFIG_ENV_ADDR \ 167 (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) 168 #define CONFIG_ENV_SIZE 0x40000 169 #define CONFIG_ENV_SECT_SIZE 0x40000 170 #define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE) 171 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) 172 173 /* 174 * GPIO settings 175 */ 176 #define CONFIG_SYS_GPSR0_VAL 0x00000000 177 #define CONFIG_SYS_GPSR1_VAL 0x00020000 178 #define CONFIG_SYS_GPSR2_VAL 0x0002C000 179 #define CONFIG_SYS_GPSR3_VAL 0x00000000 180 181 #define CONFIG_SYS_GPCR0_VAL 0x00000000 182 #define CONFIG_SYS_GPCR1_VAL 0x00000000 183 #define CONFIG_SYS_GPCR2_VAL 0x00000000 184 #define CONFIG_SYS_GPCR3_VAL 0x00000000 185 186 #define CONFIG_SYS_GPDR0_VAL 0x08000000 187 #define CONFIG_SYS_GPDR1_VAL 0x0002A981 188 #define CONFIG_SYS_GPDR2_VAL 0x0202FC00 189 #define CONFIG_SYS_GPDR3_VAL 0x00000000 190 191 #define CONFIG_SYS_GAFR0_L_VAL 0x00100000 192 #define CONFIG_SYS_GAFR0_U_VAL 0x00C00010 193 #define CONFIG_SYS_GAFR1_L_VAL 0x999A901A 194 #define CONFIG_SYS_GAFR1_U_VAL 0xAAA00008 195 #define CONFIG_SYS_GAFR2_L_VAL 0xAAAAAAAA 196 #define CONFIG_SYS_GAFR2_U_VAL 0x0109A000 197 #define CONFIG_SYS_GAFR3_L_VAL 0x54000300 198 #define CONFIG_SYS_GAFR3_U_VAL 0x00024001 199 200 #define CONFIG_SYS_PSSR_VAL 0x30 201 202 /* 203 * Clock settings 204 */ 205 #define CONFIG_SYS_CKEN 0x00500240 206 #define CONFIG_SYS_CCCR 0x02000290 207 208 /* 209 * Memory settings 210 */ 211 #define CONFIG_SYS_MSC0_VAL 0x000095f2 212 #define CONFIG_SYS_MSC1_VAL 0x00007ff4 213 #define CONFIG_SYS_MSC2_VAL 0x00000000 214 #define CONFIG_SYS_MDCNFG_VAL 0x08000ac9 215 #define CONFIG_SYS_MDREFR_VAL 0x2013e01e 216 #define CONFIG_SYS_MDMRS_VAL 0x00320032 217 #define CONFIG_SYS_FLYCNFG_VAL 0x00000000 218 #define CONFIG_SYS_SXCNFG_VAL 0x40044004 219 220 /* 221 * PCMCIA and CF Interfaces 222 */ 223 #define CONFIG_SYS_MECR_VAL 0x00000001 224 #define CONFIG_SYS_MCMEM0_VAL 0x00014307 225 #define CONFIG_SYS_MCMEM1_VAL 0x00014307 226 #define CONFIG_SYS_MCATT0_VAL 0x0001c787 227 #define CONFIG_SYS_MCATT1_VAL 0x0001c787 228 #define CONFIG_SYS_MCIO0_VAL 0x0001430f 229 #define CONFIG_SYS_MCIO1_VAL 0x0001430f 230 231 #include "pxa-common.h" 232 233 #endif /* __CONFIG_H */ 234