1 /* 2 * Toradex Colibri PXA270 configuration file 3 * 4 * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com> 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License as 8 * published by the Free Software Foundation; either version 2 of 9 * the License, or (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 19 * MA 02111-1307 USA 20 */ 21 22 #ifndef __CONFIG_H 23 #define __CONFIG_H 24 25 /* 26 * High Level Board Configuration Options 27 */ 28 #define CONFIG_PXA27X 1 /* Marvell PXA270 CPU */ 29 #define CONFIG_VPAC270 1 /* Toradex Colibri PXA270 board */ 30 31 #undef BOARD_LATE_INIT 32 #undef CONFIG_SKIP_RELOCATE_UBOOT 33 #undef CONFIG_USE_IRQ 34 #undef CONFIG_SKIP_LOWLEVEL_INIT 35 36 /* 37 * Environment settings 38 */ 39 #define CONFIG_ENV_SIZE 0x4000 40 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) 41 #define CONFIG_SYS_GBL_DATA_SIZE 128 42 43 #define CONFIG_ENV_OVERWRITE /* override default environment */ 44 45 #define CONFIG_BOOTCOMMAND \ 46 "if mmc init && fatload mmc 0 0xa0000000 uImage; then " \ 47 "bootm 0xa0000000; " \ 48 "fi; " \ 49 "if usb reset && fatload usb 0 0xa0000000 uImage; then " \ 50 "bootm 0xa0000000; " \ 51 "fi; " \ 52 "bootm 0x80000;" 53 #define CONFIG_BOOTARGS "console=tty0 console=ttyS0,115200" 54 #define CONFIG_TIMESTAMP 55 #define CONFIG_BOOTDELAY 2 /* Autoboot delay */ 56 #define CONFIG_CMDLINE_TAG 57 #define CONFIG_SETUP_MEMORY_TAGS 58 59 #define CONFIG_LZMA /* LZMA compression support */ 60 61 /* 62 * Serial Console Configuration 63 */ 64 #define CONFIG_PXA_SERIAL 65 #define CONFIG_FFUART 1 66 #define CONFIG_BAUDRATE 115200 67 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } 68 69 /* 70 * Bootloader Components Configuration 71 */ 72 #include <config_cmd_default.h> 73 74 #define CONFIG_CMD_NET 75 #define CONFIG_CMD_ENV 76 #undef CONFIG_CMD_IMLS 77 #define CONFIG_CMD_MMC 78 #define CONFIG_CMD_USB 79 #define CONFIG_CMD_FLASH 80 81 /* 82 * Networking Configuration 83 * chip on the Voipac PXA270 board 84 */ 85 #ifdef CONFIG_CMD_NET 86 #define CONFIG_CMD_PING 87 #define CONFIG_CMD_DHCP 88 89 #define CONFIG_NET_MULTI 1 90 #define CONFIG_DRIVER_DM9000 1 91 #define CONFIG_DM9000_BASE 0x08000000 92 #define DM9000_IO (CONFIG_DM9000_BASE) 93 #define DM9000_DATA (CONFIG_DM9000_BASE + 4) 94 #define CONFIG_NET_RETRY_COUNT 10 95 96 #define CONFIG_BOOTP_BOOTFILESIZE 97 #define CONFIG_BOOTP_BOOTPATH 98 #define CONFIG_BOOTP_GATEWAY 99 #define CONFIG_BOOTP_HOSTNAME 100 #endif 101 102 /* 103 * MMC Card Configuration 104 */ 105 #ifdef CONFIG_CMD_MMC 106 #define CONFIG_MMC 107 #define CONFIG_PXA_MMC 108 #define CONFIG_SYS_MMC_BASE 0xF0000000 109 #define CONFIG_CMD_FAT 110 #define CONFIG_DOS_PARTITION 111 #endif 112 113 /* 114 * KGDB 115 */ 116 #ifdef CONFIG_CMD_KGDB 117 #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ 118 #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ 119 #endif 120 121 /* 122 * HUSH Shell Configuration 123 */ 124 #define CONFIG_SYS_HUSH_PARSER 1 125 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " 126 127 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 128 #ifdef CONFIG_SYS_HUSH_PARSER 129 #define CONFIG_SYS_PROMPT "$ " /* Monitor Command Prompt */ 130 #else 131 #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ 132 #endif 133 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 134 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ 135 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 136 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 137 #define CONFIG_SYS_DEVICE_NULLDEV 1 138 139 /* 140 * Clock Configuration 141 */ 142 #undef CONFIG_SYS_CLKS_IN_HZ 143 #define CONFIG_SYS_HZ 3250000 /* Timer @ 3250000 Hz */ 144 #define CONFIG_SYS_CPUSPEED 0x290 /* 520 MHz */ 145 146 /* 147 * Stack sizes 148 * 149 * The stack sizes are set up in start.S using the settings below 150 */ 151 #define CONFIG_STACKSIZE (128*1024) /* regular stack */ 152 #ifdef CONFIG_USE_IRQ 153 #define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ 154 #define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ 155 #endif 156 157 /* 158 * DRAM Map 159 */ 160 #define CONFIG_NR_DRAM_BANKS 1 /* We have 1 bank of DRAM */ 161 #define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */ 162 #define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */ 163 164 #define CONFIG_SYS_DRAM_BASE 0xa0000000 /* CS0 */ 165 #define CONFIG_SYS_DRAM_SIZE 0x04000000 /* 64 MB DRAM */ 166 167 #define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */ 168 #define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */ 169 170 #define CONFIG_SYS_LOAD_ADDR (0xa1000000) 171 172 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 173 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_GBL_DATA_SIZE + PHYS_SDRAM_1) 174 175 /* 176 * NOR FLASH 177 */ 178 #ifdef CONFIG_CMD_FLASH 179 #define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */ 180 #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 181 182 #define CONFIG_SYS_FLASH_CFI 183 #define CONFIG_FLASH_CFI_DRIVER 1 184 185 #define CONFIG_SYS_MAX_FLASH_SECT (4 + 255) 186 #define CONFIG_SYS_MAX_FLASH_BANKS 1 187 188 #define CONFIG_SYS_FLASH_ERASE_TOUT (25*CONFIG_SYS_HZ) 189 #define CONFIG_SYS_FLASH_WRITE_TOUT (25*CONFIG_SYS_HZ) 190 191 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 192 #define CONFIG_SYS_FLASH_PROTECTION 1 193 194 #define CONFIG_ENV_IS_IN_FLASH 1 195 196 #else /* No flash */ 197 #define CONFIG_SYS_NO_FLASH 198 #define CONFIG_SYS_ENV_IS_NOWHERE 199 #endif 200 201 #define CONFIG_SYS_MONITOR_BASE 0x000000 202 #define CONFIG_SYS_MONITOR_LEN 0x40000 203 204 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_LEN) 205 #define CONFIG_ENV_SECT_SIZE 0x40000 206 #define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE) 207 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) 208 209 210 /* 211 * GPIO settings 212 */ 213 #define CONFIG_SYS_GPSR0_VAL 0x00000000 214 #define CONFIG_SYS_GPSR1_VAL 0x00020000 215 #define CONFIG_SYS_GPSR2_VAL 0x0002C000 216 #define CONFIG_SYS_GPSR3_VAL 0x00000000 217 218 #define CONFIG_SYS_GPCR0_VAL 0x00000000 219 #define CONFIG_SYS_GPCR1_VAL 0x00000000 220 #define CONFIG_SYS_GPCR2_VAL 0x00000000 221 #define CONFIG_SYS_GPCR3_VAL 0x00000000 222 223 #define CONFIG_SYS_GPDR0_VAL 0x08000000 224 #define CONFIG_SYS_GPDR1_VAL 0x0002A981 225 #define CONFIG_SYS_GPDR2_VAL 0x0202FC00 226 #define CONFIG_SYS_GPDR3_VAL 0x00000000 227 228 #define CONFIG_SYS_GAFR0_L_VAL 0x00100000 229 #define CONFIG_SYS_GAFR0_U_VAL 0x00C00010 230 #define CONFIG_SYS_GAFR1_L_VAL 0x999A901A 231 #define CONFIG_SYS_GAFR1_U_VAL 0xAAA00008 232 #define CONFIG_SYS_GAFR2_L_VAL 0xAAAAAAAA 233 #define CONFIG_SYS_GAFR2_U_VAL 0x0109A000 234 #define CONFIG_SYS_GAFR3_L_VAL 0x54000300 235 #define CONFIG_SYS_GAFR3_U_VAL 0x00024001 236 237 #define CONFIG_SYS_PSSR_VAL 0x30 238 239 /* 240 * Clock settings 241 */ 242 #define CONFIG_SYS_CKEN 0x00500240 243 #define CONFIG_SYS_CCCR 0x02000290 244 245 /* 246 * Memory settings 247 */ 248 #define CONFIG_SYS_MSC0_VAL 0x000095f2 249 #define CONFIG_SYS_MSC1_VAL 0x00007ff4 250 #define CONFIG_SYS_MSC2_VAL 0x00000000 251 #define CONFIG_SYS_MDCNFG_VAL 0x08000ac9 252 #define CONFIG_SYS_MDREFR_VAL 0x2013e01e 253 #define CONFIG_SYS_MDMRS_VAL 0x00320032 254 #define CONFIG_SYS_FLYCNFG_VAL 0x00000000 255 #define CONFIG_SYS_SXCNFG_VAL 0x40044004 256 257 /* 258 * PCMCIA and CF Interfaces 259 */ 260 #define CONFIG_SYS_MECR_VAL 0x00000001 261 #define CONFIG_SYS_MCMEM0_VAL 0x00014307 262 #define CONFIG_SYS_MCMEM1_VAL 0x00014307 263 #define CONFIG_SYS_MCATT0_VAL 0x0001c787 264 #define CONFIG_SYS_MCATT1_VAL 0x0001c787 265 #define CONFIG_SYS_MCIO0_VAL 0x0001430f 266 #define CONFIG_SYS_MCIO1_VAL 0x0001430f 267 268 /* 269 * USB 270 */ 271 #ifdef CONFIG_CMD_USB 272 #define CONFIG_USB_OHCI_NEW 273 #define CONFIG_SYS_USB_OHCI_CPU_INIT 274 #define CONFIG_SYS_USB_OHCI_BOARD_INIT 275 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 276 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x4C000000 277 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "tdex270" 278 #define CONFIG_USB_STORAGE 279 #endif 280 281 #endif /* __CONFIG_H */ 282