1 /* 2 * Toradex Colibri PXA270 configuration file 3 * 4 * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com> 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License as 8 * published by the Free Software Foundation; either version 2 of 9 * the License, or (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 19 * MA 02111-1307 USA 20 */ 21 22 #ifndef __CONFIG_H 23 #define __CONFIG_H 24 25 /* 26 * High Level Board Configuration Options 27 */ 28 #define CONFIG_PXA27X 1 /* Marvell PXA270 CPU */ 29 #define CONFIG_VPAC270 1 /* Toradex Colibri PXA270 board */ 30 31 #undef CONFIG_BOARD_LATE_INIT 32 #undef CONFIG_USE_IRQ 33 #undef CONFIG_SKIP_LOWLEVEL_INIT 34 35 /* 36 * Environment settings 37 */ 38 #define CONFIG_ENV_SIZE 0x4000 39 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) 40 #define CONFIG_SYS_TEXT_BASE 0x0 41 #define CONFIG_ENV_OVERWRITE /* override default environment */ 42 43 #define CONFIG_BOOTCOMMAND \ 44 "if mmc init && fatload mmc 0 0xa0000000 uImage; then " \ 45 "bootm 0xa0000000; " \ 46 "fi; " \ 47 "if usb reset && fatload usb 0 0xa0000000 uImage; then " \ 48 "bootm 0xa0000000; " \ 49 "fi; " \ 50 "bootm 0x80000;" 51 #define CONFIG_BOOTARGS "console=tty0 console=ttyS0,115200" 52 #define CONFIG_TIMESTAMP 53 #define CONFIG_BOOTDELAY 2 /* Autoboot delay */ 54 #define CONFIG_CMDLINE_TAG 55 #define CONFIG_SETUP_MEMORY_TAGS 56 57 #define CONFIG_LZMA /* LZMA compression support */ 58 59 /* 60 * Serial Console Configuration 61 */ 62 #define CONFIG_PXA_SERIAL 63 #define CONFIG_FFUART 1 64 #define CONFIG_BAUDRATE 115200 65 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } 66 67 /* 68 * Bootloader Components Configuration 69 */ 70 #include <config_cmd_default.h> 71 72 #define CONFIG_CMD_NET 73 #define CONFIG_CMD_ENV 74 #undef CONFIG_CMD_IMLS 75 #define CONFIG_CMD_MMC 76 #define CONFIG_CMD_USB 77 #define CONFIG_CMD_FLASH 78 79 /* 80 * Networking Configuration 81 * chip on the Voipac PXA270 board 82 */ 83 #ifdef CONFIG_CMD_NET 84 #define CONFIG_CMD_PING 85 #define CONFIG_CMD_DHCP 86 87 #define CONFIG_DRIVER_DM9000 1 88 #define CONFIG_DM9000_BASE 0x08000000 89 #define DM9000_IO (CONFIG_DM9000_BASE) 90 #define DM9000_DATA (CONFIG_DM9000_BASE + 4) 91 #define CONFIG_NET_RETRY_COUNT 10 92 93 #define CONFIG_BOOTP_BOOTFILESIZE 94 #define CONFIG_BOOTP_BOOTPATH 95 #define CONFIG_BOOTP_GATEWAY 96 #define CONFIG_BOOTP_HOSTNAME 97 #endif 98 99 /* 100 * MMC Card Configuration 101 */ 102 #ifdef CONFIG_CMD_MMC 103 #define CONFIG_MMC 104 #define CONFIG_PXA_MMC 105 #define CONFIG_SYS_MMC_BASE 0xF0000000 106 #define CONFIG_CMD_FAT 107 #define CONFIG_DOS_PARTITION 108 #endif 109 110 /* 111 * KGDB 112 */ 113 #ifdef CONFIG_CMD_KGDB 114 #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ 115 #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ 116 #endif 117 118 /* 119 * HUSH Shell Configuration 120 */ 121 #define CONFIG_SYS_HUSH_PARSER 1 122 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " 123 124 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 125 #ifdef CONFIG_SYS_HUSH_PARSER 126 #define CONFIG_SYS_PROMPT "$ " /* Monitor Command Prompt */ 127 #else 128 #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ 129 #endif 130 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 131 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ 132 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 133 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 134 #define CONFIG_SYS_DEVICE_NULLDEV 1 135 136 /* 137 * Clock Configuration 138 */ 139 #undef CONFIG_SYS_CLKS_IN_HZ 140 #define CONFIG_SYS_HZ 3250000 /* Timer @ 3250000 Hz */ 141 #define CONFIG_SYS_CPUSPEED 0x290 /* 520 MHz */ 142 143 /* 144 * Stack sizes 145 * 146 * The stack sizes are set up in start.S using the settings below 147 */ 148 #define CONFIG_STACKSIZE (128*1024) /* regular stack */ 149 #ifdef CONFIG_USE_IRQ 150 #define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ 151 #define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ 152 #endif 153 154 /* 155 * DRAM Map 156 */ 157 #define CONFIG_NR_DRAM_BANKS 1 /* We have 1 bank of DRAM */ 158 #define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */ 159 #define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */ 160 161 #define CONFIG_SYS_DRAM_BASE 0xa0000000 /* CS0 */ 162 #define CONFIG_SYS_DRAM_SIZE 0x04000000 /* 64 MB DRAM */ 163 164 #define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */ 165 #define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */ 166 167 #define CONFIG_SYS_LOAD_ADDR (0xa1000000) 168 169 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 170 #define CONFIG_SYS_INIT_SP_ADDR (GENERATED_GBL_DATA_SIZE + PHYS_SDRAM_1) 171 172 /* 173 * NOR FLASH 174 */ 175 #ifdef CONFIG_CMD_FLASH 176 #define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */ 177 #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 178 179 #define CONFIG_SYS_FLASH_CFI 180 #define CONFIG_FLASH_CFI_DRIVER 1 181 182 #define CONFIG_SYS_MAX_FLASH_SECT (4 + 255) 183 #define CONFIG_SYS_MAX_FLASH_BANKS 1 184 185 #define CONFIG_SYS_FLASH_ERASE_TOUT (25*CONFIG_SYS_HZ) 186 #define CONFIG_SYS_FLASH_WRITE_TOUT (25*CONFIG_SYS_HZ) 187 188 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 189 #define CONFIG_SYS_FLASH_PROTECTION 1 190 191 #define CONFIG_ENV_IS_IN_FLASH 1 192 193 #else /* No flash */ 194 #define CONFIG_SYS_NO_FLASH 195 #define CONFIG_SYS_ENV_IS_NOWHERE 196 #endif 197 198 #define CONFIG_SYS_MONITOR_BASE 0x000000 199 #define CONFIG_SYS_MONITOR_LEN 0x40000 200 201 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_LEN) 202 #define CONFIG_ENV_SECT_SIZE 0x40000 203 #define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE) 204 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) 205 206 207 /* 208 * GPIO settings 209 */ 210 #define CONFIG_SYS_GPSR0_VAL 0x00000000 211 #define CONFIG_SYS_GPSR1_VAL 0x00020000 212 #define CONFIG_SYS_GPSR2_VAL 0x0002C000 213 #define CONFIG_SYS_GPSR3_VAL 0x00000000 214 215 #define CONFIG_SYS_GPCR0_VAL 0x00000000 216 #define CONFIG_SYS_GPCR1_VAL 0x00000000 217 #define CONFIG_SYS_GPCR2_VAL 0x00000000 218 #define CONFIG_SYS_GPCR3_VAL 0x00000000 219 220 #define CONFIG_SYS_GPDR0_VAL 0x08000000 221 #define CONFIG_SYS_GPDR1_VAL 0x0002A981 222 #define CONFIG_SYS_GPDR2_VAL 0x0202FC00 223 #define CONFIG_SYS_GPDR3_VAL 0x00000000 224 225 #define CONFIG_SYS_GAFR0_L_VAL 0x00100000 226 #define CONFIG_SYS_GAFR0_U_VAL 0x00C00010 227 #define CONFIG_SYS_GAFR1_L_VAL 0x999A901A 228 #define CONFIG_SYS_GAFR1_U_VAL 0xAAA00008 229 #define CONFIG_SYS_GAFR2_L_VAL 0xAAAAAAAA 230 #define CONFIG_SYS_GAFR2_U_VAL 0x0109A000 231 #define CONFIG_SYS_GAFR3_L_VAL 0x54000300 232 #define CONFIG_SYS_GAFR3_U_VAL 0x00024001 233 234 #define CONFIG_SYS_PSSR_VAL 0x30 235 236 /* 237 * Clock settings 238 */ 239 #define CONFIG_SYS_CKEN 0x00500240 240 #define CONFIG_SYS_CCCR 0x02000290 241 242 /* 243 * Memory settings 244 */ 245 #define CONFIG_SYS_MSC0_VAL 0x000095f2 246 #define CONFIG_SYS_MSC1_VAL 0x00007ff4 247 #define CONFIG_SYS_MSC2_VAL 0x00000000 248 #define CONFIG_SYS_MDCNFG_VAL 0x08000ac9 249 #define CONFIG_SYS_MDREFR_VAL 0x2013e01e 250 #define CONFIG_SYS_MDMRS_VAL 0x00320032 251 #define CONFIG_SYS_FLYCNFG_VAL 0x00000000 252 #define CONFIG_SYS_SXCNFG_VAL 0x40044004 253 254 /* 255 * PCMCIA and CF Interfaces 256 */ 257 #define CONFIG_SYS_MECR_VAL 0x00000001 258 #define CONFIG_SYS_MCMEM0_VAL 0x00014307 259 #define CONFIG_SYS_MCMEM1_VAL 0x00014307 260 #define CONFIG_SYS_MCATT0_VAL 0x0001c787 261 #define CONFIG_SYS_MCATT1_VAL 0x0001c787 262 #define CONFIG_SYS_MCIO0_VAL 0x0001430f 263 #define CONFIG_SYS_MCIO1_VAL 0x0001430f 264 265 /* 266 * USB 267 */ 268 #ifdef CONFIG_CMD_USB 269 #define CONFIG_USB_OHCI_NEW 270 #define CONFIG_SYS_USB_OHCI_CPU_INIT 271 #define CONFIG_SYS_USB_OHCI_BOARD_INIT 272 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 273 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x4C000000 274 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "tdex270" 275 #define CONFIG_USB_STORAGE 276 #endif 277 278 #endif /* __CONFIG_H */ 279