1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright 2016 Toradex AG 4 * 5 * Configuration settings for the Colibri iMX7 module. 6 * 7 * based on mx7dsabresd.h: 8 * Copyright (C) 2015 Freescale Semiconductor, Inc. 9 */ 10 11 #ifndef __COLIBRI_IMX7_CONFIG_H 12 #define __COLIBRI_IMX7_CONFIG_H 13 14 #include "mx7_common.h" 15 16 /*#define CONFIG_DBG_MONITOR*/ 17 #define PHYS_SDRAM_SIZE SZ_512M 18 19 /* Size of malloc() pool */ 20 #define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M) 21 22 /* Network */ 23 #define CONFIG_FEC_MXC 24 #define CONFIG_MII 25 #define CONFIG_FEC_XCV_TYPE RMII 26 #define CONFIG_ETHPRIME "FEC" 27 #define CONFIG_FEC_MXC_PHYADDR 0 28 29 #define CONFIG_IP_DEFRAG 30 #define CONFIG_TFTP_BLOCKSIZE 16352 31 #define CONFIG_TFTP_TSIZE 32 33 /* ENET1 */ 34 #define IMX_FEC_BASE ENET_IPS_BASE_ADDR 35 36 /* MMC Config*/ 37 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 38 #define CONFIG_SYS_FSL_USDHC_NUM 1 39 40 #undef CONFIG_BOOTM_PLAN9 41 #undef CONFIG_BOOTM_RTEMS 42 43 /* I2C configs */ 44 #define CONFIG_SYS_I2C_MXC 45 #define CONFIG_SYS_I2C_SPEED 100000 46 47 #define CONFIG_IPADDR 192.168.10.2 48 #define CONFIG_NETMASK 255.255.255.0 49 #define CONFIG_SERVERIP 192.168.10.1 50 51 #define MEM_LAYOUT_ENV_SETTINGS \ 52 "bootm_size=0x10000000\0" \ 53 "fdt_addr_r=0x82000000\0" \ 54 "fdt_high=0xffffffff\0" \ 55 "initrd_high=0xffffffff\0" \ 56 "kernel_addr_r=0x81000000\0" \ 57 "ramdisk_addr_r=0x82100000\0" 58 59 #define SD_BOOTCMD \ 60 "sdargs=root=/dev/mmcblk0p2 rw rootwait\0" \ 61 "sdboot=run setup; setenv bootargs ${defargs} ${sdargs} " \ 62 "${setupargs} ${vidargs}; echo Booting from MMC/SD card...; " \ 63 "run m4boot && " \ 64 "load mmc 0:1 ${kernel_addr_r} ${kernel_file} && " \ 65 "load mmc 0:1 ${fdt_addr_r} ${soc}-colibri-${fdt_board}.dtb && " \ 66 "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ 67 68 #define NFS_BOOTCMD \ 69 "nfsargs=ip=:::::eth0: root=/dev/nfs\0" \ 70 "nfsboot=run setup; " \ 71 "setenv bootargs ${defargs} ${nfsargs} " \ 72 "${setupargs} ${vidargs}; echo Booting from NFS...;" \ 73 "dhcp ${kernel_addr_r} && " \ 74 "tftp ${fdt_addr_r} ${soc}-colibri-${fdt_board}.dtb && " \ 75 "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ 76 77 #define UBI_BOOTCMD \ 78 "ubiargs=ubi.mtd=ubi root=ubi0:rootfs rootfstype=ubifs " \ 79 "ubi.fm_autoconvert=1\0" \ 80 "ubiboot=run setup; " \ 81 "setenv bootargs ${defargs} ${ubiargs} " \ 82 "${setupargs} ${vidargs}; echo Booting from NAND...; " \ 83 "ubi part ubi && run m4boot && " \ 84 "ubi read ${kernel_addr_r} kernel && " \ 85 "ubi read ${fdt_addr_r} dtb && " \ 86 "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ 87 88 #define CONFIG_BOOTCOMMAND "run ubiboot; run sdboot; run nfsboot" 89 90 #define CONFIG_EXTRA_ENV_SETTINGS \ 91 MEM_LAYOUT_ENV_SETTINGS \ 92 NFS_BOOTCMD \ 93 SD_BOOTCMD \ 94 UBI_BOOTCMD \ 95 "console=ttymxc0\0" \ 96 "defargs=\0" \ 97 "fdt_board=eval-v3\0" \ 98 "fdt_fixup=;\0" \ 99 "m4boot=;\0" \ 100 "ip_dyn=yes\0" \ 101 "kernel_file=zImage\0" \ 102 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ 103 "setethupdate=if env exists ethaddr; then; else setenv ethaddr " \ 104 "00:14:2d:00:00:00; fi; tftpboot ${loadaddr} " \ 105 "${board}/flash_eth.img && source ${loadaddr}\0" \ 106 "setsdupdate=mmc rescan && setenv interface mmc && " \ 107 "fatload ${interface} 0:1 ${loadaddr} " \ 108 "${board}/flash_blk.img && source ${loadaddr}\0" \ 109 "setup=setenv setupargs " \ 110 "console=tty1 console=${console}" \ 111 ",${baudrate}n8 ${memargs} consoleblank=0\0" \ 112 "setupdate=run setsdupdate || run setusbupdate || run setethupdate\0" \ 113 "setusbupdate=usb start && setenv interface usb && " \ 114 "fatload ${interface} 0:1 ${loadaddr} " \ 115 "${board}/flash_blk.img && source ${loadaddr}\0" \ 116 "splashpos=m,m\0" \ 117 "videomode=video=ctfb:x:640,y:480,depth:18,pclk:39722,le:48,ri:16,up:33,lo:10,hs:96,vs:2,sync:0,vmode:0\0" \ 118 "updlevel=2\0" 119 120 /* Miscellaneous configurable options */ 121 122 #define CONFIG_SYS_MEMTEST_START 0x80000000 123 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x0c000000) 124 125 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 126 #define CONFIG_SYS_HZ 1000 127 128 /* Physical Memory Map */ 129 #define CONFIG_NR_DRAM_BANKS 1 130 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 131 132 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 133 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 134 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 135 136 #define CONFIG_SYS_INIT_SP_OFFSET \ 137 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 138 #define CONFIG_SYS_INIT_SP_ADDR \ 139 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 140 141 /* environment organization */ 142 143 #if defined(CONFIG_ENV_IS_IN_MMC) 144 #define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC1 */ 145 #define CONFIG_SYS_MMC_ENV_PART 0 /* user area */ 146 #define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC1 */ 147 #define CONFIG_ENV_OFFSET (8 * SZ_64K) 148 #elif defined(CONFIG_ENV_IS_IN_NAND) 149 #define CONFIG_ENV_SECT_SIZE (128 * 1024) 150 #define CONFIG_ENV_OFFSET (28 * CONFIG_ENV_SECT_SIZE) 151 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE 152 #endif 153 154 /* NAND stuff */ 155 #define CONFIG_SYS_MAX_NAND_DEVICE 1 156 #define CONFIG_SYS_NAND_BASE 0x40000000 157 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 158 #define CONFIG_SYS_NAND_ONFI_DETECTION 159 #define CONFIG_SYS_NAND_MX7_GPMI_62_ECC_BYTES 160 161 /* Dynamic MTD partition support */ 162 163 /* DMA stuff, needed for GPMI/MXS NAND support */ 164 165 /* USB Configs */ 166 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 167 168 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 169 #define CONFIG_MXC_USB_FLAGS 0 170 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 171 172 #define CONFIG_IMX_THERMAL 173 174 #define CONFIG_USBD_HS 175 176 /* USB Device Firmware Update support */ 177 #define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_16M 178 #define DFU_DEFAULT_POLL_TIMEOUT 300 179 180 #ifdef CONFIG_VIDEO 181 #define CONFIG_VIDEO_MXS 182 #define CONFIG_VIDEO_LOGO 183 #define CONFIG_SPLASH_SCREEN 184 #define CONFIG_SPLASH_SCREEN_ALIGN 185 #define CONFIG_BMP_16BPP 186 #define CONFIG_VIDEO_BMP_RLE8 187 #define CONFIG_VIDEO_BMP_LOGO 188 #endif 189 190 #endif 191