xref: /openbmc/u-boot/include/configs/cobra5272.h (revision f40a7f3e)
1 /*
2  * Configuation settings for the Sentec Cobra Board.
3  *
4  * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
5  *
6  * See file CREDITS for list of people who contributed to this
7  * project.
8  *
9  * This program is free software; you can redistribute it and/or
10  * modify it under the terms of the GNU General Public License as
11  * published by the Free Software Foundation; either version 2 of
12  * the License, or (at your option) any later version.
13  *
14  * This program is distributed in the hope that it will be useful,
15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
17  * GNU General Public License for more details.
18  *
19  * You should have received a copy of the GNU General Public License
20  * along with this program; if not, write to the Free Software
21  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22  * MA 02111-1307 USA
23  */
24 
25 /* ---
26  * Version: U-boot 1.0.0 - initial release for Sentec COBRA5272 board
27  * Date: 2004-03-29
28  * Author: Florian Schlote
29  *
30  * For a description of configuration options please refer also to the
31  * general u-boot-1.x.x/README file
32  * ---
33  */
34 
35 /* ---
36  * board/config.h - configuration options, board specific
37  * ---
38  */
39 
40 #ifndef _CONFIG_COBRA5272_H
41 #define _CONFIG_COBRA5272_H
42 
43 /* ---
44  * Define processor
45  * possible values for Sentec board: only Coldfire M5272 processor supported
46  * (please do not change)
47  * ---
48  */
49 
50 #define CONFIG_MCF52x2			/* define processor family */
51 #define CONFIG_M5272			/* define processor type */
52 
53 /* ---
54  * Defines processor clock - important for correct timings concerning serial
55  * interface etc.
56  * CFG_HZ gives unit: 1000 -> 1 Hz ^= 1000 ms
57  * ---
58  */
59 
60 #define CFG_HZ			1000
61 #define CFG_CLK			66000000
62 #define CFG_SDRAM_SIZE		16		/* SDRAM size in MB */
63 
64 /* ---
65  * Enable use of Ethernet
66  * ---
67  */
68 
69 #define FEC_ENET
70 
71 /* ---
72  * Define baudrate for UART1 (console output, tftp, ...)
73  * default value of CONFIG_BAUDRATE for Sentec board: 19200 baud
74  * CFG_BAUDRATE_TABLE defines values that can be selected in u-boot command
75  * interface
76  * ---
77  */
78 
79 #define CONFIG_BAUDRATE		19200
80 #define CFG_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
81 
82 /* ---
83  * set "#if 0" to "#if 1" if (Hardware)-WATCHDOG should be enabled & change
84  * timeout acc. to your needs
85  * #define CONFIG_WATCHDOG_TIMEOUT x , x is timeout in milliseconds, e. g. 10000
86  * for 10 sec
87  * ---
88  */
89 
90 #if 0
91 #define CONFIG_WATCHDOG
92 #define CONFIG_WATCHDOG_TIMEOUT 10000	/* timeout in milliseconds */
93 #endif
94 
95 /* ---
96  * CONFIG_MONITOR_IS_IN_RAM defines if u-boot is started from a different
97  * bootloader residing in flash ('chainloading'); if you want to use
98  * chainloading or want to compile a u-boot binary that can be loaded into
99  * RAM via BDM set
100  * 	"#if 0" to "#if 1"
101  * You will need a first stage bootloader then, e. g. colilo or a working BDM
102  * cable (Background Debug Mode)
103  *
104  * Setting #if 0: u-boot will start from flash and relocate itself to RAM
105  *
106  * Please do not forget to modify the setting of TEXT_BASE
107  * in board/cobra5272/config.mk accordingly (#if 0: 0xffe00000; #if 1: 0x20000)
108  *
109  * ---
110  */
111 
112 #if 0
113 #define CONFIG_MONITOR_IS_IN_RAM /* monitor is started from a preloader */
114 #endif
115 
116 /* ---
117  * Configuration for environment
118  * Environment is embedded in u-boot in the second sector of the flash
119  * ---
120  */
121 
122 #ifndef CONFIG_MONITOR_IS_IN_RAM
123 #define CFG_ENV_OFFSET		0x4000
124 #define CFG_ENV_SECT_SIZE	0x2000
125 #define CFG_ENV_IS_IN_FLASH	1
126 #define CFG_ENV_IS_EMBEDDED	1
127 #else
128 #define CFG_ENV_ADDR		0xffe04000
129 #define CFG_ENV_SECT_SIZE	0x2000
130 #define CFG_ENV_IS_IN_FLASH	1
131 #endif
132 
133 
134 /*
135  * BOOTP options
136  */
137 #define CONFIG_BOOTP_BOOTFILESIZE
138 #define CONFIG_BOOTP_BOOTPATH
139 #define CONFIG_BOOTP_GATEWAY
140 #define CONFIG_BOOTP_HOSTNAME
141 
142 
143 /*
144  * Command line configuration.
145  */
146 #include <config_cmd_default.h>
147 
148 #define CONFIG_CMD_PING
149 
150 #undef CONFIG_CMD_LOADS
151 #undef CONFIG_CMD_LOADB
152 #undef CONFIG_CMD_MII
153 
154 
155 /*
156  *-----------------------------------------------------------------------------
157  * Define user parameters that have to be customized most likely
158  *-----------------------------------------------------------------------------
159  */
160 
161 /*AUTOBOOT settings - booting images automatically by u-boot after power on*/
162 
163 #define CONFIG_BOOTDELAY	5		/* used for autoboot, delay in
164 seconds u-boot will wait before starting defined (auto-)boot command, setting
165 to -1 disables delay, setting to 0 will too prevent access to u-boot command
166 interface: u-boot then has to reflashed */
167 
168 
169 /* The following settings will be contained in the environment block ; if you
170 want to use a neutral environment all those settings can be manually set in
171 u-boot: 'set' command */
172 
173 #if 0
174 
175 #define CONFIG_BOOTCOMMAND	"bootm 0xffe80000"	/*Autoboto command, please
176 enter a valid image address in flash */
177 
178 #define CONFIG_BOOTARGS		" "			/* default bootargs that are
179 considered during boot */
180 
181 /* User network settings */
182 
183 #define CONFIG_ETHADDR 00:00:00:00:00:09	/* default ethernet MAC addr. */
184 #define CONFIG_IPADDR 192.168.100.2		/* default board IP address */
185 #define CONFIG_SERVERIP 192.168.100.1	/* default tftp server IP address */
186 
187 #endif
188 
189 #define CFG_PROMPT		"COBRA > "	/* Layout of u-boot prompt*/
190 
191 #define CFG_LOAD_ADDR		0x20000		/*Defines default RAM address
192 from which user programs will be started */
193 
194 /*---*/
195 
196 #define CFG_LONGHELP				/* undef to save memory		*/
197 
198 #if defined(CONFIG_CMD_KGDB)
199 #define CFG_CBSIZE		1024		/* Console I/O Buffer Size	*/
200 #else
201 #define CFG_CBSIZE		256		/* Console I/O Buffer Size	*/
202 #endif
203 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
204 #define CFG_MAXARGS		16		/* max number of command args	*/
205 #define CFG_BARGSIZE		CFG_CBSIZE	/* Boot Argument Buffer Size	*/
206 
207 /*
208  *-----------------------------------------------------------------------------
209  * End of user parameters to be customized
210  *-----------------------------------------------------------------------------
211  */
212 
213 /* ---
214  * Defines memory range for test
215  * ---
216  */
217 
218 #define CFG_MEMTEST_START	0x400
219 #define CFG_MEMTEST_END		0x380000
220 
221 /* ---
222  * Low Level Configuration Settings
223  * (address mappings, register initial values, etc.)
224  * You should know what you are doing if you make changes here.
225  * ---
226  */
227 
228 /* ---
229  * Base register address
230  * ---
231  */
232 
233 #define CFG_MBAR		0x10000000	/* Register Base Addrs */
234 
235 /* ---
236  * System Conf. Reg. & System Protection Reg.
237  * ---
238  */
239 
240 #define CFG_SCR			0x0003;
241 #define CFG_SPR			0xffff;
242 
243 /* ---
244  * Ethernet settings
245  * ---
246  */
247 
248 #define CFG_DISCOVER_PHY
249 #define CFG_ENET_BD_BASE	0x780000
250 
251 /*-----------------------------------------------------------------------
252  * Definitions for initial stack pointer and data area (in internal SRAM)
253  */
254 #define CFG_INIT_RAM_ADDR	0x20000000
255 #define CFG_INIT_RAM_END	0x1000	/* End of used area in internal SRAM	*/
256 #define CFG_GBL_DATA_SIZE	64	/* size in bytes reserved for initial data */
257 #define CFG_GBL_DATA_OFFSET	(CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
258 #define CFG_INIT_SP_OFFSET	CFG_GBL_DATA_OFFSET
259 
260 /*-----------------------------------------------------------------------
261  * Start addresses for the final memory configuration
262  * (Set up by the startup code)
263  * Please note that CFG_SDRAM_BASE _must_ start at 0
264  */
265 #define CFG_SDRAM_BASE		0x00000000
266 
267 /*
268  *-------------------------------------------------------------------------
269  * RAM SIZE (is defined above)
270  *-----------------------------------------------------------------------
271  */
272 
273 /* #define CFG_SDRAM_SIZE		16 */
274 
275 /*
276  *-----------------------------------------------------------------------
277  */
278 
279 #define CFG_FLASH_BASE		0xffe00000
280 
281 #ifdef	CONFIG_MONITOR_IS_IN_RAM
282 #define CFG_MONITOR_BASE	0x20000
283 #else
284 #define CFG_MONITOR_BASE	(CFG_FLASH_BASE + 0x400)
285 #endif
286 
287 #define CFG_MONITOR_LEN		0x20000
288 #define CFG_MALLOC_LEN		(256 << 10)
289 #define CFG_BOOTPARAMS_LEN	64*1024
290 
291 /*
292  * For booting Linux, the board info and command line data
293  * have to be in the first 8 MB of memory, since this is
294  * the maximum mapped by the Linux kernel during initialization ??
295  */
296 #define CFG_BOOTMAPSZ		(8 << 20)	/* Initial Memory map for Linux */
297 
298 /*-----------------------------------------------------------------------
299  * FLASH organization
300  */
301 #define CFG_MAX_FLASH_BANKS	1	/* max number of memory banks		*/
302 #define CFG_MAX_FLASH_SECT	11	/* max number of sectors on one chip	*/
303 #define CFG_FLASH_ERASE_TOUT	1000	/* flash timeout */
304 
305 /*-----------------------------------------------------------------------
306  * Cache Configuration
307  */
308 #define CFG_CACHELINE_SIZE	16
309 
310 /*-----------------------------------------------------------------------
311  * Memory bank definitions
312  *
313  * Please refer also to Motorola Coldfire user manual - Chapter XXX
314  * <http://e-www.motorola.com/files/dsp/doc/ref_manual/MCF5272UM.pdf>
315  */
316 #define CFG_BR0_PRELIM		0xFFE00201
317 #define CFG_OR0_PRELIM		0xFFE00014
318 
319 #define CFG_BR1_PRELIM		0
320 #define CFG_OR1_PRELIM		0
321 
322 #define CFG_BR2_PRELIM		0
323 #define CFG_OR2_PRELIM		0
324 
325 #define CFG_BR3_PRELIM		0
326 #define CFG_OR3_PRELIM		0
327 
328 #define CFG_BR4_PRELIM		0
329 #define CFG_OR4_PRELIM		0
330 
331 #define CFG_BR5_PRELIM		0
332 #define CFG_OR5_PRELIM		0
333 
334 #define CFG_BR6_PRELIM		0
335 #define CFG_OR6_PRELIM		0
336 
337 #define CFG_BR7_PRELIM		0x00000701
338 #define CFG_OR7_PRELIM		0xFF00007C
339 
340 /*-----------------------------------------------------------------------
341  * LED config
342  */
343 #define	LED_STAT_0	0xffff /*all LEDs off*/
344 #define	LED_STAT_1	0xfffe
345 #define	LED_STAT_2	0xfffd
346 #define	LED_STAT_3	0xfffb
347 #define	LED_STAT_4	0xfff7
348 #define	LED_STAT_5	0xffef
349 #define	LED_STAT_6	0xffdf
350 #define	LED_STAT_7	0xff00 /*all LEDs on*/
351 
352 /*-----------------------------------------------------------------------
353  * Port configuration (GPIO)
354  */
355 #define CFG_PACNT		0x00000000		/* PortA control reg.: All pins are external
356 GPIO*/
357 #define CFG_PADDR		0x00FF			/* PortA direction reg.: PA7 to PA0 are outputs
358 (1^=output, 0^=input) */
359 #define CFG_PADAT		LED_STAT_0		/* PortA value reg.: Turn all LED off */
360 #define CFG_PBCNT		0x55554155		/* PortB control reg.: Ethernet/UART
361 configuration */
362 #define CFG_PBDDR		0x0000			/* PortB direction: All pins configured as inputs */
363 #define CFG_PBDAT		0x0000			/* PortB value reg. */
364 #define CFG_PDCNT		0x00000000		/* PortD control reg. */
365 
366 #endif	/* _CONFIG_COBRA5272_H */
367