1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Configuation settings for the Sentec Cobra Board. 4 * 5 * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de> 6 */ 7 8 /* --- 9 * Version: U-Boot 1.0.0 - initial release for Sentec COBRA5272 board 10 * Date: 2004-03-29 11 * Author: Florian Schlote 12 * 13 * For a description of configuration options please refer also to the 14 * general u-boot-1.x.x/README file 15 * --- 16 */ 17 18 /* --- 19 * board/config.h - configuration options, board specific 20 * --- 21 */ 22 23 #ifndef _CONFIG_COBRA5272_H 24 #define _CONFIG_COBRA5272_H 25 26 /* --- 27 * Defines processor clock - important for correct timings concerning serial 28 * interface etc. 29 * --- 30 */ 31 32 #define CONFIG_SYS_CLK 66000000 33 #define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */ 34 35 /* --- 36 * Enable use of Ethernet 37 * --- 38 */ 39 #define CONFIG_MCFFEC 40 41 /* Enable Dma Timer */ 42 #define CONFIG_MCFTMR 43 44 /* --- 45 * Define baudrate for UART1 (console output, tftp, ...) 46 * default value of CONFIG_BAUDRATE for Sentec board: 19200 baud 47 * CONFIG_SYS_BAUDRATE_TABLE defines values that can be selected in u-boot command 48 * interface 49 * --- 50 */ 51 52 #define CONFIG_MCFUART 53 #define CONFIG_SYS_UART_PORT (0) 54 55 /* --- 56 * set "#if 0" to "#if 1" if (Hardware)-WATCHDOG should be enabled & change 57 * timeout acc. to your needs 58 * #define CONFIG_WATCHDOG_TIMEOUT x , x is timeout in milliseconds, e. g. 10000 59 * for 10 sec 60 * --- 61 */ 62 63 #if 0 64 #define CONFIG_WATCHDOG 65 #define CONFIG_WATCHDOG_TIMEOUT 10000 /* timeout in milliseconds */ 66 #endif 67 68 /* --- 69 * CONFIG_MONITOR_IS_IN_RAM defines if u-boot is started from a different 70 * bootloader residing in flash ('chainloading'); if you want to use 71 * chainloading or want to compile a u-boot binary that can be loaded into 72 * RAM via BDM set 73 * "#if 0" to "#if 1" 74 * You will need a first stage bootloader then, e. g. colilo or a working BDM 75 * cable (Background Debug Mode) 76 * 77 * Setting #if 0: u-boot will start from flash and relocate itself to RAM 78 * 79 * Please do not forget to modify the setting of CONFIG_SYS_TEXT_BASE 80 * in board/cobra5272/config.mk accordingly (#if 0: 0xffe00000; #if 1: 0x20000) 81 * 82 * --- 83 */ 84 85 #if 0 86 #define CONFIG_MONITOR_IS_IN_RAM /* monitor is started from a preloader */ 87 #endif 88 89 /* --- 90 * Configuration for environment 91 * Environment is embedded in u-boot in the second sector of the flash 92 * --- 93 */ 94 95 #ifndef CONFIG_MONITOR_IS_IN_RAM 96 #define CONFIG_ENV_OFFSET 0x4000 97 #define CONFIG_ENV_SECT_SIZE 0x2000 98 #else 99 #define CONFIG_ENV_ADDR 0xffe04000 100 #define CONFIG_ENV_SECT_SIZE 0x2000 101 #endif 102 103 #define LDS_BOARD_TEXT \ 104 . = DEFINED(env_offset) ? env_offset : .; \ 105 env/embedded.o(.text); 106 107 /* 108 * BOOTP options 109 */ 110 #define CONFIG_BOOTP_BOOTFILESIZE 111 112 /* 113 * Command line configuration. 114 */ 115 116 #ifdef CONFIG_MCFFEC 117 # define CONFIG_MII_INIT 1 118 # define CONFIG_SYS_DISCOVER_PHY 119 # define CONFIG_SYS_RX_ETH_BUFFER 8 120 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 121 122 # define CONFIG_SYS_FEC0_PINMUX 0 123 # define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE 124 # define MCFFEC_TOUT_LOOP 50000 125 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ 126 # ifndef CONFIG_SYS_DISCOVER_PHY 127 # define FECDUPLEX FULL 128 # define FECSPEED _100BASET 129 # else 130 # ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN 131 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 132 # endif 133 # endif /* CONFIG_SYS_DISCOVER_PHY */ 134 #endif 135 136 /* 137 *----------------------------------------------------------------------------- 138 * Define user parameters that have to be customized most likely 139 *----------------------------------------------------------------------------- 140 */ 141 142 /*AUTOBOOT settings - booting images automatically by u-boot after power on*/ 143 144 /* The following settings will be contained in the environment block ; if you 145 want to use a neutral environment all those settings can be manually set in 146 u-boot: 'set' command */ 147 148 #if 0 149 150 #define CONFIG_BOOTCOMMAND "bootm 0xffe80000" /*Autoboto command, please 151 enter a valid image address in flash */ 152 153 /* User network settings */ 154 155 #define CONFIG_IPADDR 192.168.100.2 /* default board IP address */ 156 #define CONFIG_SERVERIP 192.168.100.1 /* default tftp server IP address */ 157 158 #endif 159 160 #define CONFIG_SYS_LOAD_ADDR 0x20000 /*Defines default RAM address 161 from which user programs will be started */ 162 163 /*---*/ 164 165 /* 166 *----------------------------------------------------------------------------- 167 * End of user parameters to be customized 168 *----------------------------------------------------------------------------- 169 */ 170 171 /* --- 172 * Defines memory range for test 173 * --- 174 */ 175 176 #define CONFIG_SYS_MEMTEST_START 0x400 177 #define CONFIG_SYS_MEMTEST_END 0x380000 178 179 /* --- 180 * Low Level Configuration Settings 181 * (address mappings, register initial values, etc.) 182 * You should know what you are doing if you make changes here. 183 * --- 184 */ 185 186 /* --- 187 * Base register address 188 * --- 189 */ 190 191 #define CONFIG_SYS_MBAR 0x10000000 /* Register Base Addrs */ 192 193 /* --- 194 * System Conf. Reg. & System Protection Reg. 195 * --- 196 */ 197 198 #define CONFIG_SYS_SCR 0x0003 199 #define CONFIG_SYS_SPR 0xffff 200 201 /* --- 202 * Ethernet settings 203 * --- 204 */ 205 206 #define CONFIG_SYS_DISCOVER_PHY 207 #define CONFIG_SYS_ENET_BD_BASE 0x780000 208 209 /*----------------------------------------------------------------------- 210 * Definitions for initial stack pointer and data area (in internal SRAM) 211 */ 212 #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 213 #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in internal SRAM */ 214 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 215 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET 216 217 /*----------------------------------------------------------------------- 218 * Start addresses for the final memory configuration 219 * (Set up by the startup code) 220 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 221 */ 222 #define CONFIG_SYS_SDRAM_BASE 0x00000000 223 224 /* 225 *------------------------------------------------------------------------- 226 * RAM SIZE (is defined above) 227 *----------------------------------------------------------------------- 228 */ 229 230 /* #define CONFIG_SYS_SDRAM_SIZE 16 */ 231 232 /* 233 *----------------------------------------------------------------------- 234 */ 235 236 #define CONFIG_SYS_FLASH_BASE 0xffe00000 237 238 #ifdef CONFIG_MONITOR_IS_IN_RAM 239 #define CONFIG_SYS_MONITOR_BASE 0x20000 240 #else 241 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) 242 #endif 243 244 #define CONFIG_SYS_MONITOR_LEN 0x20000 245 #define CONFIG_SYS_MALLOC_LEN (256 << 10) 246 #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024 247 248 /* 249 * For booting Linux, the board info and command line data 250 * have to be in the first 8 MB of memory, since this is 251 * the maximum mapped by the Linux kernel during initialization ?? 252 */ 253 #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ 254 255 /*----------------------------------------------------------------------- 256 * FLASH organization 257 */ 258 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ 259 #define CONFIG_SYS_MAX_FLASH_SECT 11 /* max number of sectors on one chip */ 260 #define CONFIG_SYS_FLASH_ERASE_TOUT 1000 /* flash timeout */ 261 262 /*----------------------------------------------------------------------- 263 * Cache Configuration 264 */ 265 #define CONFIG_SYS_CACHELINE_SIZE 16 266 267 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ 268 CONFIG_SYS_INIT_RAM_SIZE - 8) 269 #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ 270 CONFIG_SYS_INIT_RAM_SIZE - 4) 271 #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI) 272 #define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \ 273 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \ 274 CF_ACR_EN | CF_ACR_SM_ALL) 275 #define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \ 276 CF_CACR_DISD | CF_CACR_INVI | \ 277 CF_CACR_CEIB | CF_CACR_DCM | \ 278 CF_CACR_EUSP) 279 280 /*----------------------------------------------------------------------- 281 * Memory bank definitions 282 * 283 * Please refer also to Motorola Coldfire user manual - Chapter XXX 284 * <http://e-www.motorola.com/files/dsp/doc/ref_manual/MCF5272UM.pdf> 285 */ 286 #define CONFIG_SYS_BR0_PRELIM 0xFFE00201 287 #define CONFIG_SYS_OR0_PRELIM 0xFFE00014 288 289 #define CONFIG_SYS_BR1_PRELIM 0 290 #define CONFIG_SYS_OR1_PRELIM 0 291 292 #define CONFIG_SYS_BR2_PRELIM 0 293 #define CONFIG_SYS_OR2_PRELIM 0 294 295 #define CONFIG_SYS_BR3_PRELIM 0 296 #define CONFIG_SYS_OR3_PRELIM 0 297 298 #define CONFIG_SYS_BR4_PRELIM 0 299 #define CONFIG_SYS_OR4_PRELIM 0 300 301 #define CONFIG_SYS_BR5_PRELIM 0 302 #define CONFIG_SYS_OR5_PRELIM 0 303 304 #define CONFIG_SYS_BR6_PRELIM 0 305 #define CONFIG_SYS_OR6_PRELIM 0 306 307 #define CONFIG_SYS_BR7_PRELIM 0x00000701 308 #define CONFIG_SYS_OR7_PRELIM 0xFF00007C 309 310 /*----------------------------------------------------------------------- 311 * LED config 312 */ 313 #define LED_STAT_0 0xffff /*all LEDs off*/ 314 #define LED_STAT_1 0xfffe 315 #define LED_STAT_2 0xfffd 316 #define LED_STAT_3 0xfffb 317 #define LED_STAT_4 0xfff7 318 #define LED_STAT_5 0xffef 319 #define LED_STAT_6 0xffdf 320 #define LED_STAT_7 0xff00 /*all LEDs on*/ 321 322 /*----------------------------------------------------------------------- 323 * Port configuration (GPIO) 324 */ 325 #define CONFIG_SYS_PACNT 0x00000000 /* PortA control reg.: All pins are external 326 GPIO*/ 327 #define CONFIG_SYS_PADDR 0x00FF /* PortA direction reg.: PA7 to PA0 are outputs 328 (1^=output, 0^=input) */ 329 #define CONFIG_SYS_PADAT LED_STAT_0 /* PortA value reg.: Turn all LED off */ 330 #define CONFIG_SYS_PBCNT 0x55554155 /* PortB control reg.: Ethernet/UART 331 configuration */ 332 #define CONFIG_SYS_PBDDR 0x0000 /* PortB direction: All pins configured as inputs */ 333 #define CONFIG_SYS_PBDAT 0x0000 /* PortB value reg. */ 334 #define CONFIG_SYS_PDCNT 0x00000000 /* PortD control reg. */ 335 336 #endif /* _CONFIG_COBRA5272_H */ 337