xref: /openbmc/u-boot/include/configs/cobra5272.h (revision 9702ec00)
1 /*
2  * Configuation settings for the Sentec Cobra Board.
3  *
4  * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 /* ---
10  * Version: U-Boot 1.0.0 - initial release for Sentec COBRA5272 board
11  * Date: 2004-03-29
12  * Author: Florian Schlote
13  *
14  * For a description of configuration options please refer also to the
15  * general u-boot-1.x.x/README file
16  * ---
17  */
18 
19 /* ---
20  * board/config.h - configuration options, board specific
21  * ---
22  */
23 
24 #ifndef _CONFIG_COBRA5272_H
25 #define _CONFIG_COBRA5272_H
26 
27 /* ---
28  * Defines processor clock - important for correct timings concerning serial
29  * interface etc.
30  * ---
31  */
32 
33 #define CONFIG_SYS_CLK			66000000
34 #define CONFIG_SYS_SDRAM_SIZE		16		/* SDRAM size in MB */
35 
36 /* ---
37  * Enable use of Ethernet
38  * ---
39  */
40 #define CONFIG_MCFFEC
41 
42 /* Enable Dma Timer */
43 #define CONFIG_MCFTMR
44 
45 /* ---
46  * Define baudrate for UART1 (console output, tftp, ...)
47  * default value of CONFIG_BAUDRATE for Sentec board: 19200 baud
48  * CONFIG_SYS_BAUDRATE_TABLE defines values that can be selected in u-boot command
49  * interface
50  * ---
51  */
52 
53 #define CONFIG_MCFUART
54 #define CONFIG_SYS_UART_PORT		(0)
55 #define CONFIG_BAUDRATE		19200
56 
57 /* ---
58  * set "#if 0" to "#if 1" if (Hardware)-WATCHDOG should be enabled & change
59  * timeout acc. to your needs
60  * #define CONFIG_WATCHDOG_TIMEOUT x , x is timeout in milliseconds, e. g. 10000
61  * for 10 sec
62  * ---
63  */
64 
65 #if 0
66 #define CONFIG_WATCHDOG
67 #define CONFIG_WATCHDOG_TIMEOUT 10000	/* timeout in milliseconds */
68 #endif
69 
70 /* ---
71  * CONFIG_MONITOR_IS_IN_RAM defines if u-boot is started from a different
72  * bootloader residing in flash ('chainloading'); if you want to use
73  * chainloading or want to compile a u-boot binary that can be loaded into
74  * RAM via BDM set
75  *	"#if 0" to "#if 1"
76  * You will need a first stage bootloader then, e. g. colilo or a working BDM
77  * cable (Background Debug Mode)
78  *
79  * Setting #if 0: u-boot will start from flash and relocate itself to RAM
80  *
81  * Please do not forget to modify the setting of CONFIG_SYS_TEXT_BASE
82  * in board/cobra5272/config.mk accordingly (#if 0: 0xffe00000; #if 1: 0x20000)
83  *
84  * ---
85  */
86 
87 #if 0
88 #define CONFIG_MONITOR_IS_IN_RAM /* monitor is started from a preloader */
89 #endif
90 
91 /* ---
92  * Configuration for environment
93  * Environment is embedded in u-boot in the second sector of the flash
94  * ---
95  */
96 
97 #ifndef CONFIG_MONITOR_IS_IN_RAM
98 #define CONFIG_ENV_OFFSET		0x4000
99 #define CONFIG_ENV_SECT_SIZE	0x2000
100 #define CONFIG_ENV_IS_IN_FLASH	1
101 #else
102 #define CONFIG_ENV_ADDR		0xffe04000
103 #define CONFIG_ENV_SECT_SIZE	0x2000
104 #define CONFIG_ENV_IS_IN_FLASH	1
105 #endif
106 
107 #define LDS_BOARD_TEXT \
108         . = DEFINED(env_offset) ? env_offset : .; \
109         common/env_embedded.o (.text);
110 
111 /*
112  * BOOTP options
113  */
114 #define CONFIG_BOOTP_BOOTFILESIZE
115 #define CONFIG_BOOTP_BOOTPATH
116 #define CONFIG_BOOTP_GATEWAY
117 #define CONFIG_BOOTP_HOSTNAME
118 
119 /*
120  * Command line configuration.
121  */
122 
123 #ifdef CONFIG_MCFFEC
124 #	define CONFIG_MII		1
125 #	define CONFIG_MII_INIT		1
126 #	define CONFIG_SYS_DISCOVER_PHY
127 #	define CONFIG_SYS_RX_ETH_BUFFER	8
128 #	define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
129 
130 #	define CONFIG_SYS_FEC0_PINMUX		0
131 #	define CONFIG_SYS_FEC0_MIIBASE		CONFIG_SYS_FEC0_IOBASE
132 #	define MCFFEC_TOUT_LOOP		50000
133 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
134 #	ifndef CONFIG_SYS_DISCOVER_PHY
135 #		define FECDUPLEX	FULL
136 #		define FECSPEED		_100BASET
137 #	else
138 #		ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
139 #			define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
140 #		endif
141 #	endif			/* CONFIG_SYS_DISCOVER_PHY */
142 #endif
143 
144 /*
145  *-----------------------------------------------------------------------------
146  * Define user parameters that have to be customized most likely
147  *-----------------------------------------------------------------------------
148  */
149 
150 /*AUTOBOOT settings - booting images automatically by u-boot after power on*/
151 
152 seconds u-boot will wait before starting defined (auto-)boot command, setting
153 to -1 disables delay, setting to 0 will too prevent access to u-boot command
154 interface: u-boot then has to reflashed */
155 
156 /* The following settings will be contained in the environment block ; if you
157 want to use a neutral environment all those settings can be manually set in
158 u-boot: 'set' command */
159 
160 #if 0
161 
162 #define CONFIG_BOOTCOMMAND	"bootm 0xffe80000"	/*Autoboto command, please
163 enter a valid image address in flash */
164 
165 #define CONFIG_BOOTARGS		" "			/* default bootargs that are
166 considered during boot */
167 
168 /* User network settings */
169 
170 #define CONFIG_IPADDR 192.168.100.2		/* default board IP address */
171 #define CONFIG_SERVERIP 192.168.100.1	/* default tftp server IP address */
172 
173 #endif
174 
175 #define CONFIG_SYS_LOAD_ADDR		0x20000		/*Defines default RAM address
176 from which user programs will be started */
177 
178 /*---*/
179 
180 #define CONFIG_SYS_LONGHELP				/* undef to save memory		*/
181 
182 #if defined(CONFIG_CMD_KGDB)
183 #define CONFIG_SYS_CBSIZE		1024		/* Console I/O Buffer Size	*/
184 #else
185 #define CONFIG_SYS_CBSIZE		256		/* Console I/O Buffer Size	*/
186 #endif
187 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
188 #define CONFIG_SYS_MAXARGS		16		/* max number of command args	*/
189 #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE	/* Boot Argument Buffer Size	*/
190 
191 /*
192  *-----------------------------------------------------------------------------
193  * End of user parameters to be customized
194  *-----------------------------------------------------------------------------
195  */
196 
197 /* ---
198  * Defines memory range for test
199  * ---
200  */
201 
202 #define CONFIG_SYS_MEMTEST_START	0x400
203 #define CONFIG_SYS_MEMTEST_END		0x380000
204 
205 /* ---
206  * Low Level Configuration Settings
207  * (address mappings, register initial values, etc.)
208  * You should know what you are doing if you make changes here.
209  * ---
210  */
211 
212 /* ---
213  * Base register address
214  * ---
215  */
216 
217 #define CONFIG_SYS_MBAR		0x10000000	/* Register Base Addrs */
218 
219 /* ---
220  * System Conf. Reg. & System Protection Reg.
221  * ---
222  */
223 
224 #define CONFIG_SYS_SCR			0x0003
225 #define CONFIG_SYS_SPR			0xffff
226 
227 /* ---
228  * Ethernet settings
229  * ---
230  */
231 
232 #define CONFIG_SYS_DISCOVER_PHY
233 #define CONFIG_SYS_ENET_BD_BASE	0x780000
234 
235 /*-----------------------------------------------------------------------
236  * Definitions for initial stack pointer and data area (in internal SRAM)
237  */
238 #define CONFIG_SYS_INIT_RAM_ADDR	0x20000000
239 #define CONFIG_SYS_INIT_RAM_SIZE	0x1000	/* Size of used area in internal SRAM	*/
240 #define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
241 #define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
242 
243 /*-----------------------------------------------------------------------
244  * Start addresses for the final memory configuration
245  * (Set up by the startup code)
246  * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
247  */
248 #define CONFIG_SYS_SDRAM_BASE		0x00000000
249 
250 /*
251  *-------------------------------------------------------------------------
252  * RAM SIZE (is defined above)
253  *-----------------------------------------------------------------------
254  */
255 
256 /* #define CONFIG_SYS_SDRAM_SIZE		16 */
257 
258 /*
259  *-----------------------------------------------------------------------
260  */
261 
262 #define CONFIG_SYS_FLASH_BASE		0xffe00000
263 
264 #ifdef	CONFIG_MONITOR_IS_IN_RAM
265 #define CONFIG_SYS_MONITOR_BASE	0x20000
266 #else
267 #define CONFIG_SYS_MONITOR_BASE	(CONFIG_SYS_FLASH_BASE + 0x400)
268 #endif
269 
270 #define CONFIG_SYS_MONITOR_LEN		0x20000
271 #define CONFIG_SYS_MALLOC_LEN		(256 << 10)
272 #define CONFIG_SYS_BOOTPARAMS_LEN	64*1024
273 
274 /*
275  * For booting Linux, the board info and command line data
276  * have to be in the first 8 MB of memory, since this is
277  * the maximum mapped by the Linux kernel during initialization ??
278  */
279 #define CONFIG_SYS_BOOTMAPSZ		(8 << 20)	/* Initial Memory map for Linux */
280 
281 /*-----------------------------------------------------------------------
282  * FLASH organization
283  */
284 #define CONFIG_SYS_MAX_FLASH_BANKS	1	/* max number of memory banks		*/
285 #define CONFIG_SYS_MAX_FLASH_SECT	11	/* max number of sectors on one chip	*/
286 #define CONFIG_SYS_FLASH_ERASE_TOUT	1000	/* flash timeout */
287 
288 /*-----------------------------------------------------------------------
289  * Cache Configuration
290  */
291 #define CONFIG_SYS_CACHELINE_SIZE	16
292 
293 #define ICACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
294 					 CONFIG_SYS_INIT_RAM_SIZE - 8)
295 #define DCACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
296 					 CONFIG_SYS_INIT_RAM_SIZE - 4)
297 #define CONFIG_SYS_ICACHE_INV		(CF_CACR_CINV | CF_CACR_INVI)
298 #define CONFIG_SYS_CACHE_ACR0		(CONFIG_SYS_SDRAM_BASE | \
299 					 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
300 					 CF_ACR_EN | CF_ACR_SM_ALL)
301 #define CONFIG_SYS_CACHE_ICACR		(CF_CACR_CENB | CF_CACR_CINV | \
302 					 CF_CACR_DISD | CF_CACR_INVI | \
303 					 CF_CACR_CEIB | CF_CACR_DCM | \
304 					 CF_CACR_EUSP)
305 
306 /*-----------------------------------------------------------------------
307  * Memory bank definitions
308  *
309  * Please refer also to Motorola Coldfire user manual - Chapter XXX
310  * <http://e-www.motorola.com/files/dsp/doc/ref_manual/MCF5272UM.pdf>
311  */
312 #define CONFIG_SYS_BR0_PRELIM		0xFFE00201
313 #define CONFIG_SYS_OR0_PRELIM		0xFFE00014
314 
315 #define CONFIG_SYS_BR1_PRELIM		0
316 #define CONFIG_SYS_OR1_PRELIM		0
317 
318 #define CONFIG_SYS_BR2_PRELIM		0
319 #define CONFIG_SYS_OR2_PRELIM		0
320 
321 #define CONFIG_SYS_BR3_PRELIM		0
322 #define CONFIG_SYS_OR3_PRELIM		0
323 
324 #define CONFIG_SYS_BR4_PRELIM		0
325 #define CONFIG_SYS_OR4_PRELIM		0
326 
327 #define CONFIG_SYS_BR5_PRELIM		0
328 #define CONFIG_SYS_OR5_PRELIM		0
329 
330 #define CONFIG_SYS_BR6_PRELIM		0
331 #define CONFIG_SYS_OR6_PRELIM		0
332 
333 #define CONFIG_SYS_BR7_PRELIM		0x00000701
334 #define CONFIG_SYS_OR7_PRELIM		0xFF00007C
335 
336 /*-----------------------------------------------------------------------
337  * LED config
338  */
339 #define	LED_STAT_0	0xffff /*all LEDs off*/
340 #define	LED_STAT_1	0xfffe
341 #define	LED_STAT_2	0xfffd
342 #define	LED_STAT_3	0xfffb
343 #define	LED_STAT_4	0xfff7
344 #define	LED_STAT_5	0xffef
345 #define	LED_STAT_6	0xffdf
346 #define	LED_STAT_7	0xff00 /*all LEDs on*/
347 
348 /*-----------------------------------------------------------------------
349  * Port configuration (GPIO)
350  */
351 #define CONFIG_SYS_PACNT		0x00000000		/* PortA control reg.: All pins are external
352 GPIO*/
353 #define CONFIG_SYS_PADDR		0x00FF			/* PortA direction reg.: PA7 to PA0 are outputs
354 (1^=output, 0^=input) */
355 #define CONFIG_SYS_PADAT		LED_STAT_0		/* PortA value reg.: Turn all LED off */
356 #define CONFIG_SYS_PBCNT		0x55554155		/* PortB control reg.: Ethernet/UART
357 configuration */
358 #define CONFIG_SYS_PBDDR		0x0000			/* PortB direction: All pins configured as inputs */
359 #define CONFIG_SYS_PBDAT		0x0000			/* PortB value reg. */
360 #define CONFIG_SYS_PDCNT		0x00000000		/* PortD control reg. */
361 
362 #endif	/* _CONFIG_COBRA5272_H */
363