1*a562e1bdSwdenk /* 2*a562e1bdSwdenk * Configuation settings for the Sentec Cobra Board. 3*a562e1bdSwdenk * 4*a562e1bdSwdenk * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de> 5*a562e1bdSwdenk * 6*a562e1bdSwdenk * See file CREDITS for list of people who contributed to this 7*a562e1bdSwdenk * project. 8*a562e1bdSwdenk * 9*a562e1bdSwdenk * This program is free software; you can redistribute it and/or 10*a562e1bdSwdenk * modify it under the terms of the GNU General Public License as 11*a562e1bdSwdenk * published by the Free Software Foundation; either version 2 of 12*a562e1bdSwdenk * the License, or (at your option) any later version. 13*a562e1bdSwdenk * 14*a562e1bdSwdenk * This program is distributed in the hope that it will be useful, 15*a562e1bdSwdenk * but WITHOUT ANY WARRANTY; without even the implied warranty of 16*a562e1bdSwdenk * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17*a562e1bdSwdenk * GNU General Public License for more details. 18*a562e1bdSwdenk * 19*a562e1bdSwdenk * You should have received a copy of the GNU General Public License 20*a562e1bdSwdenk * along with this program; if not, write to the Free Software 21*a562e1bdSwdenk * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 22*a562e1bdSwdenk * MA 02111-1307 USA 23*a562e1bdSwdenk */ 24*a562e1bdSwdenk 25*a562e1bdSwdenk /* --- 26*a562e1bdSwdenk * Version: U-boot 1.0.0 - initial release for Sentec COBRA5272 board 27*a562e1bdSwdenk * Date: 2004-03-29 28*a562e1bdSwdenk * Author: Florian Schlote 29*a562e1bdSwdenk * 30*a562e1bdSwdenk * For a description of configuration options please refer also to the 31*a562e1bdSwdenk * general u-boot-1.x.x/README file 32*a562e1bdSwdenk * --- 33*a562e1bdSwdenk */ 34*a562e1bdSwdenk 35*a562e1bdSwdenk /* --- 36*a562e1bdSwdenk * board/config.h - configuration options, board specific 37*a562e1bdSwdenk * --- 38*a562e1bdSwdenk */ 39*a562e1bdSwdenk 40*a562e1bdSwdenk #ifndef _CONFIG_COBRA5272_H 41*a562e1bdSwdenk #define _CONFIG_COBRA5272_H 42*a562e1bdSwdenk 43*a562e1bdSwdenk /* --- 44*a562e1bdSwdenk * Define processor 45*a562e1bdSwdenk * possible values for Sentec board: only Coldfire M5272 processor supported 46*a562e1bdSwdenk * (please do not change) 47*a562e1bdSwdenk * --- 48*a562e1bdSwdenk */ 49*a562e1bdSwdenk 50*a562e1bdSwdenk #define CONFIG_MCF52x2 /* define processor family */ 51*a562e1bdSwdenk #define CONFIG_M5272 /* define processor type */ 52*a562e1bdSwdenk 53*a562e1bdSwdenk /* --- 54*a562e1bdSwdenk * Defines processor clock - important for correct timings concerning serial 55*a562e1bdSwdenk * interface etc. 56*a562e1bdSwdenk * CFG_HZ gives unit: 1000 -> 1 Hz ^= 1000 ms 57*a562e1bdSwdenk * --- 58*a562e1bdSwdenk */ 59*a562e1bdSwdenk 60*a562e1bdSwdenk #define CFG_HZ 1000 61*a562e1bdSwdenk #define CFG_CLK 66000000 62*a562e1bdSwdenk #define CFG_SDRAM_SIZE 16 /* SDRAM size in MB */ 63*a562e1bdSwdenk 64*a562e1bdSwdenk /* --- 65*a562e1bdSwdenk * Enable use of Ethernet 66*a562e1bdSwdenk * --- 67*a562e1bdSwdenk */ 68*a562e1bdSwdenk 69*a562e1bdSwdenk #define FEC_ENET 70*a562e1bdSwdenk 71*a562e1bdSwdenk /* --- 72*a562e1bdSwdenk * Define baudrate for UART1 (console output, tftp, ...) 73*a562e1bdSwdenk * default value of CONFIG_BAUDRATE for Sentec board: 19200 baud 74*a562e1bdSwdenk * CFG_BAUDRATE_TABLE defines values that can be selected in u-boot command 75*a562e1bdSwdenk * interface 76*a562e1bdSwdenk * --- 77*a562e1bdSwdenk */ 78*a562e1bdSwdenk 79*a562e1bdSwdenk #define CONFIG_BAUDRATE 19200 80*a562e1bdSwdenk #define CFG_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 } 81*a562e1bdSwdenk 82*a562e1bdSwdenk /* --- 83*a562e1bdSwdenk * set "#if 0" to "#if 1" if (Hardware)-WATCHDOG should be enabled & change 84*a562e1bdSwdenk * timeout acc. to your needs 85*a562e1bdSwdenk * #define CONFIG_WATCHDOG_TIMEOUT x , x is timeout in milliseconds, e. g. 10000 86*a562e1bdSwdenk * for 10 sec 87*a562e1bdSwdenk * --- 88*a562e1bdSwdenk */ 89*a562e1bdSwdenk 90*a562e1bdSwdenk #if 0 91*a562e1bdSwdenk #define CONFIG_WATCHDOG 92*a562e1bdSwdenk #define CONFIG_WATCHDOG_TIMEOUT 10000 /* timeout in milliseconds */ 93*a562e1bdSwdenk #endif 94*a562e1bdSwdenk 95*a562e1bdSwdenk /* --- 96*a562e1bdSwdenk * CONFIG_MONITOR_IS_IN_RAM defines if u-boot is started from a different 97*a562e1bdSwdenk * bootloader residing in flash ('chainloading'); if you want to use 98*a562e1bdSwdenk * chainloading or want to compile a u-boot binary that can be loaded into 99*a562e1bdSwdenk * RAM via BDM set 100*a562e1bdSwdenk * "#if 0" to "#if 1" 101*a562e1bdSwdenk * You will need a first stage bootloader then, e. g. colilo or a working BDM 102*a562e1bdSwdenk * cable (Background Debug Mode) 103*a562e1bdSwdenk * 104*a562e1bdSwdenk * Setting #if 0: u-boot will start from flash and relocate itself to RAM 105*a562e1bdSwdenk * 106*a562e1bdSwdenk * Please do not forget to modify the setting of TEXT_BASE 107*a562e1bdSwdenk * in board/cobra5272/config.mk accordingly (#if 0: 0xffe00000; #if 1: 0x20000) 108*a562e1bdSwdenk * 109*a562e1bdSwdenk * --- 110*a562e1bdSwdenk */ 111*a562e1bdSwdenk 112*a562e1bdSwdenk #if 0 113*a562e1bdSwdenk #define CONFIG_MONITOR_IS_IN_RAM /* monitor is started from a preloader */ 114*a562e1bdSwdenk #endif 115*a562e1bdSwdenk 116*a562e1bdSwdenk /* --- 117*a562e1bdSwdenk * Configuration for environment 118*a562e1bdSwdenk * Environment is embedded in u-boot in the second sector of the flash 119*a562e1bdSwdenk * --- 120*a562e1bdSwdenk */ 121*a562e1bdSwdenk 122*a562e1bdSwdenk #ifndef CONFIG_MONITOR_IS_IN_RAM 123*a562e1bdSwdenk #define CFG_ENV_OFFSET 0x4000 124*a562e1bdSwdenk #define CFG_ENV_SECT_SIZE 0x2000 125*a562e1bdSwdenk #define CFG_ENV_IS_IN_FLASH 1 126*a562e1bdSwdenk #define CFG_ENV_IS_EMBEDDED 1 127*a562e1bdSwdenk #else 128*a562e1bdSwdenk #define CFG_ENV_ADDR 0xffe04000 129*a562e1bdSwdenk #define CFG_ENV_SECT_SIZE 0x2000 130*a562e1bdSwdenk #define CFG_ENV_IS_IN_FLASH 1 131*a562e1bdSwdenk #endif 132*a562e1bdSwdenk 133*a562e1bdSwdenk /* --- 134*a562e1bdSwdenk * Define which commmands should be available at u-boot command prompt 135*a562e1bdSwdenk * --- 136*a562e1bdSwdenk */ 137*a562e1bdSwdenk 138*a562e1bdSwdenk #define CONFIG_COMMANDS ( CONFIG_CMD_DFL | CFG_CMD_PING & ~(CFG_CMD_LOADS | \ 139*a562e1bdSwdenk CFG_CMD_LOADB) | CFG_CMD_MII) 140*a562e1bdSwdenk 141*a562e1bdSwdenk /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ 142*a562e1bdSwdenk #include <cmd_confdefs.h> 143*a562e1bdSwdenk 144*a562e1bdSwdenk /* 145*a562e1bdSwdenk *----------------------------------------------------------------------------- 146*a562e1bdSwdenk * Define user parameters that have to be customized most likely 147*a562e1bdSwdenk *----------------------------------------------------------------------------- 148*a562e1bdSwdenk */ 149*a562e1bdSwdenk 150*a562e1bdSwdenk /*AUTOBOOT settings - booting images automatically by u-boot after power on*/ 151*a562e1bdSwdenk 152*a562e1bdSwdenk #define CONFIG_BOOTDELAY 5 /* used for autoboot, delay in 153*a562e1bdSwdenk seconds u-boot will wait before starting defined (auto-)boot command, setting 154*a562e1bdSwdenk to -1 disables delay, setting to 0 will too prevent access to u-boot command 155*a562e1bdSwdenk interface: u-boot then has to reflashed */ 156*a562e1bdSwdenk 157*a562e1bdSwdenk 158*a562e1bdSwdenk /* The following settings will be contained in the environment block ; if you 159*a562e1bdSwdenk want to use a neutral environment all those settings can be manually set in 160*a562e1bdSwdenk u-boot: 'set' command */ 161*a562e1bdSwdenk 162*a562e1bdSwdenk #if 0 163*a562e1bdSwdenk 164*a562e1bdSwdenk #define CONFIG_BOOTCOMMAND "bootm 0xffe80000" /*Autoboto command, please 165*a562e1bdSwdenk enter a valid image address in flash */ 166*a562e1bdSwdenk 167*a562e1bdSwdenk #define CONFIG_BOOTARGS " " /* default bootargs that are 168*a562e1bdSwdenk considered during boot */ 169*a562e1bdSwdenk 170*a562e1bdSwdenk /* User network settings */ 171*a562e1bdSwdenk 172*a562e1bdSwdenk #define CONFIG_ETHADDR 00:00:00:00:00:09 /* default ethernet MAC addr. */ 173*a562e1bdSwdenk #define CONFIG_IPADDR 192.168.100.2 /* default board IP address */ 174*a562e1bdSwdenk #define CONFIG_SERVERIP 192.168.100.1 /* default tftp server IP address */ 175*a562e1bdSwdenk 176*a562e1bdSwdenk #endif 177*a562e1bdSwdenk 178*a562e1bdSwdenk #define CFG_PROMPT "COBRA > " /* Layout of u-boot prompt*/ 179*a562e1bdSwdenk 180*a562e1bdSwdenk #define CFG_LOAD_ADDR 0x20000 /*Defines default RAM address 181*a562e1bdSwdenk from which user programs will be started */ 182*a562e1bdSwdenk 183*a562e1bdSwdenk /*---*/ 184*a562e1bdSwdenk 185*a562e1bdSwdenk #define CFG_LONGHELP /* undef to save memory */ 186*a562e1bdSwdenk 187*a562e1bdSwdenk #if (CONFIG_COMMANDS & CFG_CMD_KGDB) 188*a562e1bdSwdenk #define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ 189*a562e1bdSwdenk #else 190*a562e1bdSwdenk #define CFG_CBSIZE 256 /* Console I/O Buffer Size */ 191*a562e1bdSwdenk #endif 192*a562e1bdSwdenk #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ 193*a562e1bdSwdenk #define CFG_MAXARGS 16 /* max number of command args */ 194*a562e1bdSwdenk #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ 195*a562e1bdSwdenk 196*a562e1bdSwdenk /* 197*a562e1bdSwdenk *----------------------------------------------------------------------------- 198*a562e1bdSwdenk * End of user parameters to be customized 199*a562e1bdSwdenk *----------------------------------------------------------------------------- 200*a562e1bdSwdenk */ 201*a562e1bdSwdenk 202*a562e1bdSwdenk /* --- 203*a562e1bdSwdenk * Defines memory range for test 204*a562e1bdSwdenk * --- 205*a562e1bdSwdenk */ 206*a562e1bdSwdenk 207*a562e1bdSwdenk #define CFG_MEMTEST_START 0x400 208*a562e1bdSwdenk #define CFG_MEMTEST_END 0x380000 209*a562e1bdSwdenk 210*a562e1bdSwdenk /* --- 211*a562e1bdSwdenk * Low Level Configuration Settings 212*a562e1bdSwdenk * (address mappings, register initial values, etc.) 213*a562e1bdSwdenk * You should know what you are doing if you make changes here. 214*a562e1bdSwdenk * --- 215*a562e1bdSwdenk */ 216*a562e1bdSwdenk 217*a562e1bdSwdenk /* --- 218*a562e1bdSwdenk * Base register address 219*a562e1bdSwdenk * --- 220*a562e1bdSwdenk */ 221*a562e1bdSwdenk 222*a562e1bdSwdenk #define CFG_MBAR 0x10000000 /* Register Base Addrs */ 223*a562e1bdSwdenk 224*a562e1bdSwdenk /* --- 225*a562e1bdSwdenk * System Conf. Reg. & System Protection Reg. 226*a562e1bdSwdenk * --- 227*a562e1bdSwdenk */ 228*a562e1bdSwdenk 229*a562e1bdSwdenk #define CFG_SCR 0x0003; 230*a562e1bdSwdenk #define CFG_SPR 0xffff; 231*a562e1bdSwdenk 232*a562e1bdSwdenk /* --- 233*a562e1bdSwdenk * Ethernet settings 234*a562e1bdSwdenk * --- 235*a562e1bdSwdenk */ 236*a562e1bdSwdenk 237*a562e1bdSwdenk #define CFG_DISCOVER_PHY 238*a562e1bdSwdenk #define CFG_ENET_BD_BASE 0x780000 239*a562e1bdSwdenk 240*a562e1bdSwdenk /*----------------------------------------------------------------------- 241*a562e1bdSwdenk * Definitions for initial stack pointer and data area (in internal SRAM) 242*a562e1bdSwdenk */ 243*a562e1bdSwdenk #define CFG_INIT_RAM_ADDR 0x20000000 244*a562e1bdSwdenk #define CFG_INIT_RAM_END 0x1000 /* End of used area in internal SRAM */ 245*a562e1bdSwdenk #define CFG_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */ 246*a562e1bdSwdenk #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) 247*a562e1bdSwdenk #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET 248*a562e1bdSwdenk 249*a562e1bdSwdenk /*----------------------------------------------------------------------- 250*a562e1bdSwdenk * Start addresses for the final memory configuration 251*a562e1bdSwdenk * (Set up by the startup code) 252*a562e1bdSwdenk * Please note that CFG_SDRAM_BASE _must_ start at 0 253*a562e1bdSwdenk */ 254*a562e1bdSwdenk #define CFG_SDRAM_BASE 0x00000000 255*a562e1bdSwdenk 256*a562e1bdSwdenk /* 257*a562e1bdSwdenk *------------------------------------------------------------------------- 258*a562e1bdSwdenk * RAM SIZE (is defined above) 259*a562e1bdSwdenk *----------------------------------------------------------------------- 260*a562e1bdSwdenk */ 261*a562e1bdSwdenk 262*a562e1bdSwdenk /* #define CFG_SDRAM_SIZE 16 */ 263*a562e1bdSwdenk 264*a562e1bdSwdenk /* 265*a562e1bdSwdenk *----------------------------------------------------------------------- 266*a562e1bdSwdenk */ 267*a562e1bdSwdenk 268*a562e1bdSwdenk #define CFG_FLASH_BASE 0xffe00000 269*a562e1bdSwdenk 270*a562e1bdSwdenk #ifdef CONFIG_MONITOR_IS_IN_RAM 271*a562e1bdSwdenk #define CFG_MONITOR_BASE 0x20000 272*a562e1bdSwdenk #else 273*a562e1bdSwdenk #define CFG_MONITOR_BASE (CFG_FLASH_BASE + 0x400) 274*a562e1bdSwdenk #endif 275*a562e1bdSwdenk 276*a562e1bdSwdenk #define CFG_MONITOR_LEN 0x20000 277*a562e1bdSwdenk #define CFG_MALLOC_LEN (256 << 10) 278*a562e1bdSwdenk #define CFG_BOOTPARAMS_LEN 64*1024 279*a562e1bdSwdenk 280*a562e1bdSwdenk /* 281*a562e1bdSwdenk * For booting Linux, the board info and command line data 282*a562e1bdSwdenk * have to be in the first 8 MB of memory, since this is 283*a562e1bdSwdenk * the maximum mapped by the Linux kernel during initialization ?? 284*a562e1bdSwdenk */ 285*a562e1bdSwdenk #define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ 286*a562e1bdSwdenk 287*a562e1bdSwdenk /*----------------------------------------------------------------------- 288*a562e1bdSwdenk * FLASH organization 289*a562e1bdSwdenk */ 290*a562e1bdSwdenk #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ 291*a562e1bdSwdenk #define CFG_MAX_FLASH_SECT 11 /* max number of sectors on one chip */ 292*a562e1bdSwdenk #define CFG_FLASH_ERASE_TOUT 1000 /* flash timeout */ 293*a562e1bdSwdenk 294*a562e1bdSwdenk /*----------------------------------------------------------------------- 295*a562e1bdSwdenk * Cache Configuration 296*a562e1bdSwdenk */ 297*a562e1bdSwdenk #define CFG_CACHELINE_SIZE 16 298*a562e1bdSwdenk 299*a562e1bdSwdenk /*----------------------------------------------------------------------- 300*a562e1bdSwdenk * Memory bank definitions 301*a562e1bdSwdenk * 302*a562e1bdSwdenk * Please refer also to Motorola Coldfire user manual - Chapter XXX 303*a562e1bdSwdenk * <http://e-www.motorola.com/files/dsp/doc/ref_manual/MCF5272UM.pdf> 304*a562e1bdSwdenk */ 305*a562e1bdSwdenk #define CFG_BR0_PRELIM 0xFFE00201 306*a562e1bdSwdenk #define CFG_OR0_PRELIM 0xFFE00014 307*a562e1bdSwdenk 308*a562e1bdSwdenk #define CFG_BR1_PRELIM 0 309*a562e1bdSwdenk #define CFG_OR1_PRELIM 0 310*a562e1bdSwdenk 311*a562e1bdSwdenk #define CFG_BR2_PRELIM 0 312*a562e1bdSwdenk #define CFG_OR2_PRELIM 0 313*a562e1bdSwdenk 314*a562e1bdSwdenk #define CFG_BR3_PRELIM 0 315*a562e1bdSwdenk #define CFG_OR3_PRELIM 0 316*a562e1bdSwdenk 317*a562e1bdSwdenk #define CFG_BR4_PRELIM 0 318*a562e1bdSwdenk #define CFG_OR4_PRELIM 0 319*a562e1bdSwdenk 320*a562e1bdSwdenk #define CFG_BR5_PRELIM 0 321*a562e1bdSwdenk #define CFG_OR5_PRELIM 0 322*a562e1bdSwdenk 323*a562e1bdSwdenk #define CFG_BR6_PRELIM 0 324*a562e1bdSwdenk #define CFG_OR6_PRELIM 0 325*a562e1bdSwdenk 326*a562e1bdSwdenk #define CFG_BR7_PRELIM 0x00000701 327*a562e1bdSwdenk #define CFG_OR7_PRELIM 0xFF00007C 328*a562e1bdSwdenk 329*a562e1bdSwdenk /*----------------------------------------------------------------------- 330*a562e1bdSwdenk * LED config 331*a562e1bdSwdenk */ 332*a562e1bdSwdenk #define LED_STAT_0 0xffff /*all LEDs off*/ 333*a562e1bdSwdenk #define LED_STAT_1 0xfffe 334*a562e1bdSwdenk #define LED_STAT_2 0xfffd 335*a562e1bdSwdenk #define LED_STAT_3 0xfffb 336*a562e1bdSwdenk #define LED_STAT_4 0xfff7 337*a562e1bdSwdenk #define LED_STAT_5 0xffef 338*a562e1bdSwdenk #define LED_STAT_6 0xffdf 339*a562e1bdSwdenk #define LED_STAT_7 0xff00 /*all LEDs on*/ 340*a562e1bdSwdenk 341*a562e1bdSwdenk /*----------------------------------------------------------------------- 342*a562e1bdSwdenk * Port configuration (GPIO) 343*a562e1bdSwdenk */ 344*a562e1bdSwdenk #define CFG_PACNT 0x00000000 /* PortA control reg.: All pins are external 345*a562e1bdSwdenk GPIO*/ 346*a562e1bdSwdenk #define CFG_PADDR 0x00FF /* PortA direction reg.: PA7 to PA0 are outputs 347*a562e1bdSwdenk (1^=output, 0^=input) */ 348*a562e1bdSwdenk #define CFG_PADAT LED_STAT_0 /* PortA value reg.: Turn all LED off */ 349*a562e1bdSwdenk #define CFG_PBCNT 0x55554155 /* PortB control reg.: Ethernet/UART 350*a562e1bdSwdenk configuration */ 351*a562e1bdSwdenk #define CFG_PBDDR 0x0000 /* PortB direction: All pins configured as inputs */ 352*a562e1bdSwdenk #define CFG_PBDAT 0x0000 /* PortB value reg. */ 353*a562e1bdSwdenk #define CFG_PDCNT 0x00000000 /* PortD control reg. */ 354*a562e1bdSwdenk 355*a562e1bdSwdenk #endif /* _CONFIG_COBRA5272_H */ 356