xref: /openbmc/u-boot/include/configs/cobra5272.h (revision a187559e)
1a562e1bdSwdenk /*
2a562e1bdSwdenk  * Configuation settings for the Sentec Cobra Board.
3a562e1bdSwdenk  *
4a562e1bdSwdenk  * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
5a562e1bdSwdenk  *
61a459660SWolfgang Denk  * SPDX-License-Identifier:	GPL-2.0+
7a562e1bdSwdenk  */
8a562e1bdSwdenk 
9a562e1bdSwdenk /* ---
10*a187559eSBin Meng  * Version: U-Boot 1.0.0 - initial release for Sentec COBRA5272 board
11a562e1bdSwdenk  * Date: 2004-03-29
12a562e1bdSwdenk  * Author: Florian Schlote
13a562e1bdSwdenk  *
14a562e1bdSwdenk  * For a description of configuration options please refer also to the
15a562e1bdSwdenk  * general u-boot-1.x.x/README file
16a562e1bdSwdenk  * ---
17a562e1bdSwdenk  */
18a562e1bdSwdenk 
19a562e1bdSwdenk /* ---
20a562e1bdSwdenk  * board/config.h - configuration options, board specific
21a562e1bdSwdenk  * ---
22a562e1bdSwdenk  */
23a562e1bdSwdenk 
24a562e1bdSwdenk #ifndef _CONFIG_COBRA5272_H
25a562e1bdSwdenk #define _CONFIG_COBRA5272_H
26a562e1bdSwdenk 
27a562e1bdSwdenk /* ---
28a562e1bdSwdenk  * Defines processor clock - important for correct timings concerning serial
29a562e1bdSwdenk  * interface etc.
30a562e1bdSwdenk  * ---
31a562e1bdSwdenk  */
32a562e1bdSwdenk 
336d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_CLK			66000000
346d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_SDRAM_SIZE		16		/* SDRAM size in MB */
35a562e1bdSwdenk 
36a562e1bdSwdenk /* ---
37a562e1bdSwdenk  * Enable use of Ethernet
38a562e1bdSwdenk  * ---
39a562e1bdSwdenk  */
406706424dSTsiChungLiew #define CONFIG_MCFFEC
41a562e1bdSwdenk 
426706424dSTsiChungLiew /* Enable Dma Timer */
436706424dSTsiChungLiew #define CONFIG_MCFTMR
44a562e1bdSwdenk 
45a562e1bdSwdenk /* ---
46a562e1bdSwdenk  * Define baudrate for UART1 (console output, tftp, ...)
47a562e1bdSwdenk  * default value of CONFIG_BAUDRATE for Sentec board: 19200 baud
486d0f6bcfSJean-Christophe PLAGNIOL-VILLARD  * CONFIG_SYS_BAUDRATE_TABLE defines values that can be selected in u-boot command
49a562e1bdSwdenk  * interface
50a562e1bdSwdenk  * ---
51a562e1bdSwdenk  */
52a562e1bdSwdenk 
536706424dSTsiChungLiew #define CONFIG_MCFUART
546d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_UART_PORT		(0)
55a562e1bdSwdenk #define CONFIG_BAUDRATE		19200
56a562e1bdSwdenk 
57a562e1bdSwdenk /* ---
58a562e1bdSwdenk  * set "#if 0" to "#if 1" if (Hardware)-WATCHDOG should be enabled & change
59a562e1bdSwdenk  * timeout acc. to your needs
60a562e1bdSwdenk  * #define CONFIG_WATCHDOG_TIMEOUT x , x is timeout in milliseconds, e. g. 10000
61a562e1bdSwdenk  * for 10 sec
62a562e1bdSwdenk  * ---
63a562e1bdSwdenk  */
64a562e1bdSwdenk 
65a562e1bdSwdenk #if 0
66a562e1bdSwdenk #define CONFIG_WATCHDOG
67a562e1bdSwdenk #define CONFIG_WATCHDOG_TIMEOUT 10000	/* timeout in milliseconds */
68a562e1bdSwdenk #endif
69a562e1bdSwdenk 
70a562e1bdSwdenk /* ---
71a562e1bdSwdenk  * CONFIG_MONITOR_IS_IN_RAM defines if u-boot is started from a different
72a562e1bdSwdenk  * bootloader residing in flash ('chainloading'); if you want to use
73a562e1bdSwdenk  * chainloading or want to compile a u-boot binary that can be loaded into
74a562e1bdSwdenk  * RAM via BDM set
75a562e1bdSwdenk  *	"#if 0" to "#if 1"
76a562e1bdSwdenk  * You will need a first stage bootloader then, e. g. colilo or a working BDM
77a562e1bdSwdenk  * cable (Background Debug Mode)
78a562e1bdSwdenk  *
79a562e1bdSwdenk  * Setting #if 0: u-boot will start from flash and relocate itself to RAM
80a562e1bdSwdenk  *
8114d0a02aSWolfgang Denk  * Please do not forget to modify the setting of CONFIG_SYS_TEXT_BASE
82a562e1bdSwdenk  * in board/cobra5272/config.mk accordingly (#if 0: 0xffe00000; #if 1: 0x20000)
83a562e1bdSwdenk  *
84a562e1bdSwdenk  * ---
85a562e1bdSwdenk  */
86a562e1bdSwdenk 
87a562e1bdSwdenk #if 0
88a562e1bdSwdenk #define CONFIG_MONITOR_IS_IN_RAM /* monitor is started from a preloader */
89a562e1bdSwdenk #endif
90a562e1bdSwdenk 
91a562e1bdSwdenk /* ---
92a562e1bdSwdenk  * Configuration for environment
93a562e1bdSwdenk  * Environment is embedded in u-boot in the second sector of the flash
94a562e1bdSwdenk  * ---
95a562e1bdSwdenk  */
96a562e1bdSwdenk 
97a562e1bdSwdenk #ifndef CONFIG_MONITOR_IS_IN_RAM
980e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_OFFSET		0x4000
990e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_SECT_SIZE	0x2000
1005a1aceb0SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_IS_IN_FLASH	1
101a562e1bdSwdenk #else
1020e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_ADDR		0xffe04000
1030e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_SECT_SIZE	0x2000
1045a1aceb0SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_IS_IN_FLASH	1
105a562e1bdSwdenk #endif
106a562e1bdSwdenk 
1075296cb1dSangelo@sysam.it #define LDS_BOARD_TEXT \
1085296cb1dSangelo@sysam.it         . = DEFINED(env_offset) ? env_offset : .; \
1095296cb1dSangelo@sysam.it         common/env_embedded.o (.text);
11037e4f24bSJon Loeliger 
11137e4f24bSJon Loeliger /*
11280ff4f99SJon Loeliger  * BOOTP options
11380ff4f99SJon Loeliger  */
11480ff4f99SJon Loeliger #define CONFIG_BOOTP_BOOTFILESIZE
11580ff4f99SJon Loeliger #define CONFIG_BOOTP_BOOTPATH
11680ff4f99SJon Loeliger #define CONFIG_BOOTP_GATEWAY
11780ff4f99SJon Loeliger #define CONFIG_BOOTP_HOSTNAME
11880ff4f99SJon Loeliger 
11980ff4f99SJon Loeliger 
12080ff4f99SJon Loeliger /*
12137e4f24bSJon Loeliger  * Command line configuration.
122a562e1bdSwdenk  */
12337e4f24bSJon Loeliger #define CONFIG_CMD_PING
124a562e1bdSwdenk 
12537e4f24bSJon Loeliger #undef CONFIG_CMD_MII
12637e4f24bSJon Loeliger 
1276706424dSTsiChungLiew #ifdef CONFIG_MCFFEC
1286706424dSTsiChungLiew #	define CONFIG_MII		1
1290f3ba7e9STsiChung Liew #	define CONFIG_MII_INIT		1
1306d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #	define CONFIG_SYS_DISCOVER_PHY
1316d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #	define CONFIG_SYS_RX_ETH_BUFFER	8
1326d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #	define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
1336706424dSTsiChungLiew 
1346d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #	define CONFIG_SYS_FEC0_PINMUX		0
1356d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #	define CONFIG_SYS_FEC0_MIIBASE		CONFIG_SYS_FEC0_IOBASE
1366706424dSTsiChungLiew #	define MCFFEC_TOUT_LOOP		50000
1376d0f6bcfSJean-Christophe PLAGNIOL-VILLARD /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
1386d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #	ifndef CONFIG_SYS_DISCOVER_PHY
1396706424dSTsiChungLiew #		define FECDUPLEX	FULL
1406706424dSTsiChungLiew #		define FECSPEED		_100BASET
1416706424dSTsiChungLiew #	else
1426d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #		ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
1436d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #			define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
1446706424dSTsiChungLiew #		endif
1456d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #	endif			/* CONFIG_SYS_DISCOVER_PHY */
1466706424dSTsiChungLiew #endif
147a562e1bdSwdenk 
148a562e1bdSwdenk /*
149a562e1bdSwdenk  *-----------------------------------------------------------------------------
150a562e1bdSwdenk  * Define user parameters that have to be customized most likely
151a562e1bdSwdenk  *-----------------------------------------------------------------------------
152a562e1bdSwdenk  */
153a562e1bdSwdenk 
154a562e1bdSwdenk /*AUTOBOOT settings - booting images automatically by u-boot after power on*/
155a562e1bdSwdenk 
156a562e1bdSwdenk #define CONFIG_BOOTDELAY	5		/* used for autoboot, delay in
157a562e1bdSwdenk seconds u-boot will wait before starting defined (auto-)boot command, setting
158a562e1bdSwdenk to -1 disables delay, setting to 0 will too prevent access to u-boot command
159a562e1bdSwdenk interface: u-boot then has to reflashed */
160a562e1bdSwdenk 
161a562e1bdSwdenk 
162a562e1bdSwdenk /* The following settings will be contained in the environment block ; if you
163a562e1bdSwdenk want to use a neutral environment all those settings can be manually set in
164a562e1bdSwdenk u-boot: 'set' command */
165a562e1bdSwdenk 
166a562e1bdSwdenk #if 0
167a562e1bdSwdenk 
168a562e1bdSwdenk #define CONFIG_BOOTCOMMAND	"bootm 0xffe80000"	/*Autoboto command, please
169a562e1bdSwdenk enter a valid image address in flash */
170a562e1bdSwdenk 
171a562e1bdSwdenk #define CONFIG_BOOTARGS		" "			/* default bootargs that are
172a562e1bdSwdenk considered during boot */
173a562e1bdSwdenk 
174a562e1bdSwdenk /* User network settings */
175a562e1bdSwdenk 
176a562e1bdSwdenk #define CONFIG_IPADDR 192.168.100.2		/* default board IP address */
177a562e1bdSwdenk #define CONFIG_SERVERIP 192.168.100.1	/* default tftp server IP address */
178a562e1bdSwdenk 
179a562e1bdSwdenk #endif
180a562e1bdSwdenk 
1816d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_LOAD_ADDR		0x20000		/*Defines default RAM address
182a562e1bdSwdenk from which user programs will be started */
183a562e1bdSwdenk 
184a562e1bdSwdenk /*---*/
185a562e1bdSwdenk 
1866d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_LONGHELP				/* undef to save memory		*/
187a562e1bdSwdenk 
18837e4f24bSJon Loeliger #if defined(CONFIG_CMD_KGDB)
1896d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_CBSIZE		1024		/* Console I/O Buffer Size	*/
190a562e1bdSwdenk #else
1916d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_CBSIZE		256		/* Console I/O Buffer Size	*/
192a562e1bdSwdenk #endif
1936d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
1946d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAXARGS		16		/* max number of command args	*/
1956d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE	/* Boot Argument Buffer Size	*/
196a562e1bdSwdenk 
197a562e1bdSwdenk /*
198a562e1bdSwdenk  *-----------------------------------------------------------------------------
199a562e1bdSwdenk  * End of user parameters to be customized
200a562e1bdSwdenk  *-----------------------------------------------------------------------------
201a562e1bdSwdenk  */
202a562e1bdSwdenk 
203a562e1bdSwdenk /* ---
204a562e1bdSwdenk  * Defines memory range for test
205a562e1bdSwdenk  * ---
206a562e1bdSwdenk  */
207a562e1bdSwdenk 
2086d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MEMTEST_START	0x400
2096d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MEMTEST_END		0x380000
210a562e1bdSwdenk 
211a562e1bdSwdenk /* ---
212a562e1bdSwdenk  * Low Level Configuration Settings
213a562e1bdSwdenk  * (address mappings, register initial values, etc.)
214a562e1bdSwdenk  * You should know what you are doing if you make changes here.
215a562e1bdSwdenk  * ---
216a562e1bdSwdenk  */
217a562e1bdSwdenk 
218a562e1bdSwdenk /* ---
219a562e1bdSwdenk  * Base register address
220a562e1bdSwdenk  * ---
221a562e1bdSwdenk  */
222a562e1bdSwdenk 
2236d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MBAR		0x10000000	/* Register Base Addrs */
224a562e1bdSwdenk 
225a562e1bdSwdenk /* ---
226a562e1bdSwdenk  * System Conf. Reg. & System Protection Reg.
227a562e1bdSwdenk  * ---
228a562e1bdSwdenk  */
229a562e1bdSwdenk 
2306d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_SCR			0x0003
2316d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_SPR			0xffff
232a562e1bdSwdenk 
233a562e1bdSwdenk /* ---
234a562e1bdSwdenk  * Ethernet settings
235a562e1bdSwdenk  * ---
236a562e1bdSwdenk  */
237a562e1bdSwdenk 
2386d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_DISCOVER_PHY
2396d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_ENET_BD_BASE	0x780000
240a562e1bdSwdenk 
241a562e1bdSwdenk /*-----------------------------------------------------------------------
242a562e1bdSwdenk  * Definitions for initial stack pointer and data area (in internal SRAM)
243a562e1bdSwdenk  */
2446d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_INIT_RAM_ADDR	0x20000000
245553f0982SWolfgang Denk #define CONFIG_SYS_INIT_RAM_SIZE	0x1000	/* Size of used area in internal SRAM	*/
24625ddd1fbSWolfgang Denk #define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
2476d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
248a562e1bdSwdenk 
249a562e1bdSwdenk /*-----------------------------------------------------------------------
250a562e1bdSwdenk  * Start addresses for the final memory configuration
251a562e1bdSwdenk  * (Set up by the startup code)
2526d0f6bcfSJean-Christophe PLAGNIOL-VILLARD  * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
253a562e1bdSwdenk  */
2546d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_SDRAM_BASE		0x00000000
255a562e1bdSwdenk 
256a562e1bdSwdenk /*
257a562e1bdSwdenk  *-------------------------------------------------------------------------
258a562e1bdSwdenk  * RAM SIZE (is defined above)
259a562e1bdSwdenk  *-----------------------------------------------------------------------
260a562e1bdSwdenk  */
261a562e1bdSwdenk 
2626d0f6bcfSJean-Christophe PLAGNIOL-VILLARD /* #define CONFIG_SYS_SDRAM_SIZE		16 */
263a562e1bdSwdenk 
264a562e1bdSwdenk /*
265a562e1bdSwdenk  *-----------------------------------------------------------------------
266a562e1bdSwdenk  */
267a562e1bdSwdenk 
2686d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_FLASH_BASE		0xffe00000
269a562e1bdSwdenk 
270a562e1bdSwdenk #ifdef	CONFIG_MONITOR_IS_IN_RAM
2716d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MONITOR_BASE	0x20000
272a562e1bdSwdenk #else
2736d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MONITOR_BASE	(CONFIG_SYS_FLASH_BASE + 0x400)
274a562e1bdSwdenk #endif
275a562e1bdSwdenk 
2766d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MONITOR_LEN		0x20000
2776d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MALLOC_LEN		(256 << 10)
2786d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_BOOTPARAMS_LEN	64*1024
279a562e1bdSwdenk 
280a562e1bdSwdenk /*
281a562e1bdSwdenk  * For booting Linux, the board info and command line data
282a562e1bdSwdenk  * have to be in the first 8 MB of memory, since this is
283a562e1bdSwdenk  * the maximum mapped by the Linux kernel during initialization ??
284a562e1bdSwdenk  */
2856d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_BOOTMAPSZ		(8 << 20)	/* Initial Memory map for Linux */
286a562e1bdSwdenk 
287a562e1bdSwdenk /*-----------------------------------------------------------------------
288a562e1bdSwdenk  * FLASH organization
289a562e1bdSwdenk  */
2906d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAX_FLASH_BANKS	1	/* max number of memory banks		*/
2916d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAX_FLASH_SECT	11	/* max number of sectors on one chip	*/
2926d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_FLASH_ERASE_TOUT	1000	/* flash timeout */
293a562e1bdSwdenk 
294a562e1bdSwdenk /*-----------------------------------------------------------------------
295a562e1bdSwdenk  * Cache Configuration
296a562e1bdSwdenk  */
2976d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_CACHELINE_SIZE	16
298a562e1bdSwdenk 
299dd9f054eSTsiChung Liew #define ICACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
300553f0982SWolfgang Denk 					 CONFIG_SYS_INIT_RAM_SIZE - 8)
301dd9f054eSTsiChung Liew #define DCACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
302553f0982SWolfgang Denk 					 CONFIG_SYS_INIT_RAM_SIZE - 4)
303dd9f054eSTsiChung Liew #define CONFIG_SYS_ICACHE_INV		(CF_CACR_CINV | CF_CACR_INVI)
304dd9f054eSTsiChung Liew #define CONFIG_SYS_CACHE_ACR0		(CONFIG_SYS_SDRAM_BASE | \
305dd9f054eSTsiChung Liew 					 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
306dd9f054eSTsiChung Liew 					 CF_ACR_EN | CF_ACR_SM_ALL)
307dd9f054eSTsiChung Liew #define CONFIG_SYS_CACHE_ICACR		(CF_CACR_CENB | CF_CACR_CINV | \
308dd9f054eSTsiChung Liew 					 CF_CACR_DISD | CF_CACR_INVI | \
309dd9f054eSTsiChung Liew 					 CF_CACR_CEIB | CF_CACR_DCM | \
310dd9f054eSTsiChung Liew 					 CF_CACR_EUSP)
311dd9f054eSTsiChung Liew 
312a562e1bdSwdenk /*-----------------------------------------------------------------------
313a562e1bdSwdenk  * Memory bank definitions
314a562e1bdSwdenk  *
315a562e1bdSwdenk  * Please refer also to Motorola Coldfire user manual - Chapter XXX
316a562e1bdSwdenk  * <http://e-www.motorola.com/files/dsp/doc/ref_manual/MCF5272UM.pdf>
317a562e1bdSwdenk  */
3186d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_BR0_PRELIM		0xFFE00201
3196d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_OR0_PRELIM		0xFFE00014
320a562e1bdSwdenk 
3216d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_BR1_PRELIM		0
3226d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_OR1_PRELIM		0
323a562e1bdSwdenk 
3246d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_BR2_PRELIM		0
3256d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_OR2_PRELIM		0
326a562e1bdSwdenk 
3276d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_BR3_PRELIM		0
3286d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_OR3_PRELIM		0
329a562e1bdSwdenk 
3306d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_BR4_PRELIM		0
3316d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_OR4_PRELIM		0
332a562e1bdSwdenk 
3336d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_BR5_PRELIM		0
3346d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_OR5_PRELIM		0
335a562e1bdSwdenk 
3366d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_BR6_PRELIM		0
3376d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_OR6_PRELIM		0
338a562e1bdSwdenk 
3396d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_BR7_PRELIM		0x00000701
3406d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_OR7_PRELIM		0xFF00007C
341a562e1bdSwdenk 
342a562e1bdSwdenk /*-----------------------------------------------------------------------
343a562e1bdSwdenk  * LED config
344a562e1bdSwdenk  */
345a562e1bdSwdenk #define	LED_STAT_0	0xffff /*all LEDs off*/
346a562e1bdSwdenk #define	LED_STAT_1	0xfffe
347a562e1bdSwdenk #define	LED_STAT_2	0xfffd
348a562e1bdSwdenk #define	LED_STAT_3	0xfffb
349a562e1bdSwdenk #define	LED_STAT_4	0xfff7
350a562e1bdSwdenk #define	LED_STAT_5	0xffef
351a562e1bdSwdenk #define	LED_STAT_6	0xffdf
352a562e1bdSwdenk #define	LED_STAT_7	0xff00 /*all LEDs on*/
353a562e1bdSwdenk 
354a562e1bdSwdenk /*-----------------------------------------------------------------------
355a562e1bdSwdenk  * Port configuration (GPIO)
356a562e1bdSwdenk  */
3576d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_PACNT		0x00000000		/* PortA control reg.: All pins are external
358a562e1bdSwdenk GPIO*/
3596d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_PADDR		0x00FF			/* PortA direction reg.: PA7 to PA0 are outputs
360a562e1bdSwdenk (1^=output, 0^=input) */
3616d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_PADAT		LED_STAT_0		/* PortA value reg.: Turn all LED off */
3626d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_PBCNT		0x55554155		/* PortB control reg.: Ethernet/UART
363a562e1bdSwdenk configuration */
3646d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_PBDDR		0x0000			/* PortB direction: All pins configured as inputs */
3656d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_PBDAT		0x0000			/* PortB value reg. */
3666d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_PDCNT		0x00000000		/* PortD control reg. */
367a562e1bdSwdenk 
368a562e1bdSwdenk #endif	/* _CONFIG_COBRA5272_H */
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