1a562e1bdSwdenk /* 2a562e1bdSwdenk * Configuation settings for the Sentec Cobra Board. 3a562e1bdSwdenk * 4a562e1bdSwdenk * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de> 5a562e1bdSwdenk * 6a562e1bdSwdenk * See file CREDITS for list of people who contributed to this 7a562e1bdSwdenk * project. 8a562e1bdSwdenk * 9a562e1bdSwdenk * This program is free software; you can redistribute it and/or 10a562e1bdSwdenk * modify it under the terms of the GNU General Public License as 11a562e1bdSwdenk * published by the Free Software Foundation; either version 2 of 12a562e1bdSwdenk * the License, or (at your option) any later version. 13a562e1bdSwdenk * 14a562e1bdSwdenk * This program is distributed in the hope that it will be useful, 15a562e1bdSwdenk * but WITHOUT ANY WARRANTY; without even the implied warranty of 16a562e1bdSwdenk * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17a562e1bdSwdenk * GNU General Public License for more details. 18a562e1bdSwdenk * 19a562e1bdSwdenk * You should have received a copy of the GNU General Public License 20a562e1bdSwdenk * along with this program; if not, write to the Free Software 21a562e1bdSwdenk * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 22a562e1bdSwdenk * MA 02111-1307 USA 23a562e1bdSwdenk */ 24a562e1bdSwdenk 25a562e1bdSwdenk /* --- 26a562e1bdSwdenk * Version: U-boot 1.0.0 - initial release for Sentec COBRA5272 board 27a562e1bdSwdenk * Date: 2004-03-29 28a562e1bdSwdenk * Author: Florian Schlote 29a562e1bdSwdenk * 30a562e1bdSwdenk * For a description of configuration options please refer also to the 31a562e1bdSwdenk * general u-boot-1.x.x/README file 32a562e1bdSwdenk * --- 33a562e1bdSwdenk */ 34a562e1bdSwdenk 35a562e1bdSwdenk /* --- 36a562e1bdSwdenk * board/config.h - configuration options, board specific 37a562e1bdSwdenk * --- 38a562e1bdSwdenk */ 39a562e1bdSwdenk 40a562e1bdSwdenk #ifndef _CONFIG_COBRA5272_H 41a562e1bdSwdenk #define _CONFIG_COBRA5272_H 42a562e1bdSwdenk 43a562e1bdSwdenk /* --- 44a562e1bdSwdenk * Define processor 45a562e1bdSwdenk * possible values for Sentec board: only Coldfire M5272 processor supported 46a562e1bdSwdenk * (please do not change) 47a562e1bdSwdenk * --- 48a562e1bdSwdenk */ 49a562e1bdSwdenk 50a562e1bdSwdenk #define CONFIG_MCF52x2 /* define processor family */ 51a562e1bdSwdenk #define CONFIG_M5272 /* define processor type */ 52a562e1bdSwdenk 53a562e1bdSwdenk /* --- 54a562e1bdSwdenk * Defines processor clock - important for correct timings concerning serial 55a562e1bdSwdenk * interface etc. 56*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD * CONFIG_SYS_HZ gives unit: 1000 -> 1 Hz ^= 1000 ms 57a562e1bdSwdenk * --- 58a562e1bdSwdenk */ 59a562e1bdSwdenk 60*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_HZ 1000 61*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_CLK 66000000 62*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */ 63a562e1bdSwdenk 64a562e1bdSwdenk /* --- 65a562e1bdSwdenk * Enable use of Ethernet 66a562e1bdSwdenk * --- 67a562e1bdSwdenk */ 686706424dSTsiChungLiew #define CONFIG_MCFFEC 69a562e1bdSwdenk 706706424dSTsiChungLiew /* Enable Dma Timer */ 716706424dSTsiChungLiew #define CONFIG_MCFTMR 72a562e1bdSwdenk 73a562e1bdSwdenk /* --- 74a562e1bdSwdenk * Define baudrate for UART1 (console output, tftp, ...) 75a562e1bdSwdenk * default value of CONFIG_BAUDRATE for Sentec board: 19200 baud 76*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD * CONFIG_SYS_BAUDRATE_TABLE defines values that can be selected in u-boot command 77a562e1bdSwdenk * interface 78a562e1bdSwdenk * --- 79a562e1bdSwdenk */ 80a562e1bdSwdenk 816706424dSTsiChungLiew #define CONFIG_MCFUART 82*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_UART_PORT (0) 83a562e1bdSwdenk #define CONFIG_BAUDRATE 19200 84*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 } 85a562e1bdSwdenk 86a562e1bdSwdenk /* --- 87a562e1bdSwdenk * set "#if 0" to "#if 1" if (Hardware)-WATCHDOG should be enabled & change 88a562e1bdSwdenk * timeout acc. to your needs 89a562e1bdSwdenk * #define CONFIG_WATCHDOG_TIMEOUT x , x is timeout in milliseconds, e. g. 10000 90a562e1bdSwdenk * for 10 sec 91a562e1bdSwdenk * --- 92a562e1bdSwdenk */ 93a562e1bdSwdenk 94a562e1bdSwdenk #if 0 95a562e1bdSwdenk #define CONFIG_WATCHDOG 96a562e1bdSwdenk #define CONFIG_WATCHDOG_TIMEOUT 10000 /* timeout in milliseconds */ 97a562e1bdSwdenk #endif 98a562e1bdSwdenk 99a562e1bdSwdenk /* --- 100a562e1bdSwdenk * CONFIG_MONITOR_IS_IN_RAM defines if u-boot is started from a different 101a562e1bdSwdenk * bootloader residing in flash ('chainloading'); if you want to use 102a562e1bdSwdenk * chainloading or want to compile a u-boot binary that can be loaded into 103a562e1bdSwdenk * RAM via BDM set 104a562e1bdSwdenk * "#if 0" to "#if 1" 105a562e1bdSwdenk * You will need a first stage bootloader then, e. g. colilo or a working BDM 106a562e1bdSwdenk * cable (Background Debug Mode) 107a562e1bdSwdenk * 108a562e1bdSwdenk * Setting #if 0: u-boot will start from flash and relocate itself to RAM 109a562e1bdSwdenk * 110a562e1bdSwdenk * Please do not forget to modify the setting of TEXT_BASE 111a562e1bdSwdenk * in board/cobra5272/config.mk accordingly (#if 0: 0xffe00000; #if 1: 0x20000) 112a562e1bdSwdenk * 113a562e1bdSwdenk * --- 114a562e1bdSwdenk */ 115a562e1bdSwdenk 116a562e1bdSwdenk #if 0 117a562e1bdSwdenk #define CONFIG_MONITOR_IS_IN_RAM /* monitor is started from a preloader */ 118a562e1bdSwdenk #endif 119a562e1bdSwdenk 120a562e1bdSwdenk /* --- 121a562e1bdSwdenk * Configuration for environment 122a562e1bdSwdenk * Environment is embedded in u-boot in the second sector of the flash 123a562e1bdSwdenk * --- 124a562e1bdSwdenk */ 125a562e1bdSwdenk 126a562e1bdSwdenk #ifndef CONFIG_MONITOR_IS_IN_RAM 1270e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_OFFSET 0x4000 1280e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_SECT_SIZE 0x2000 1295a1aceb0SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_IS_IN_FLASH 1 1300e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_IS_EMBEDDED 1 131a562e1bdSwdenk #else 1320e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_ADDR 0xffe04000 1330e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_SECT_SIZE 0x2000 1345a1aceb0SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_IS_IN_FLASH 1 135a562e1bdSwdenk #endif 136a562e1bdSwdenk 13737e4f24bSJon Loeliger 13837e4f24bSJon Loeliger /* 13980ff4f99SJon Loeliger * BOOTP options 14080ff4f99SJon Loeliger */ 14180ff4f99SJon Loeliger #define CONFIG_BOOTP_BOOTFILESIZE 14280ff4f99SJon Loeliger #define CONFIG_BOOTP_BOOTPATH 14380ff4f99SJon Loeliger #define CONFIG_BOOTP_GATEWAY 14480ff4f99SJon Loeliger #define CONFIG_BOOTP_HOSTNAME 14580ff4f99SJon Loeliger 14680ff4f99SJon Loeliger 14780ff4f99SJon Loeliger /* 14837e4f24bSJon Loeliger * Command line configuration. 149a562e1bdSwdenk */ 15037e4f24bSJon Loeliger #include <config_cmd_default.h> 151a562e1bdSwdenk 15237e4f24bSJon Loeliger #define CONFIG_CMD_PING 153a562e1bdSwdenk 15437e4f24bSJon Loeliger #undef CONFIG_CMD_LOADS 15537e4f24bSJon Loeliger #undef CONFIG_CMD_LOADB 15637e4f24bSJon Loeliger #undef CONFIG_CMD_MII 15737e4f24bSJon Loeliger 1586706424dSTsiChungLiew #ifdef CONFIG_MCFFEC 1596706424dSTsiChungLiew # define CONFIG_NET_MULTI 1 1606706424dSTsiChungLiew # define CONFIG_MII 1 1610f3ba7e9STsiChung Liew # define CONFIG_MII_INIT 1 162*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD # define CONFIG_SYS_DISCOVER_PHY 163*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD # define CONFIG_SYS_RX_ETH_BUFFER 8 164*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 1656706424dSTsiChungLiew 166*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD # define CONFIG_SYS_FEC0_PINMUX 0 167*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD # define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE 1686706424dSTsiChungLiew # define MCFFEC_TOUT_LOOP 50000 169*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ 170*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD # ifndef CONFIG_SYS_DISCOVER_PHY 1716706424dSTsiChungLiew # define FECDUPLEX FULL 1726706424dSTsiChungLiew # define FECSPEED _100BASET 1736706424dSTsiChungLiew # else 174*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD # ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN 175*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 1766706424dSTsiChungLiew # endif 177*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD # endif /* CONFIG_SYS_DISCOVER_PHY */ 1786706424dSTsiChungLiew #endif 179a562e1bdSwdenk 180a562e1bdSwdenk /* 181a562e1bdSwdenk *----------------------------------------------------------------------------- 182a562e1bdSwdenk * Define user parameters that have to be customized most likely 183a562e1bdSwdenk *----------------------------------------------------------------------------- 184a562e1bdSwdenk */ 185a562e1bdSwdenk 186a562e1bdSwdenk /*AUTOBOOT settings - booting images automatically by u-boot after power on*/ 187a562e1bdSwdenk 188a562e1bdSwdenk #define CONFIG_BOOTDELAY 5 /* used for autoboot, delay in 189a562e1bdSwdenk seconds u-boot will wait before starting defined (auto-)boot command, setting 190a562e1bdSwdenk to -1 disables delay, setting to 0 will too prevent access to u-boot command 191a562e1bdSwdenk interface: u-boot then has to reflashed */ 192a562e1bdSwdenk 193a562e1bdSwdenk 194a562e1bdSwdenk /* The following settings will be contained in the environment block ; if you 195a562e1bdSwdenk want to use a neutral environment all those settings can be manually set in 196a562e1bdSwdenk u-boot: 'set' command */ 197a562e1bdSwdenk 198a562e1bdSwdenk #if 0 199a562e1bdSwdenk 200a562e1bdSwdenk #define CONFIG_BOOTCOMMAND "bootm 0xffe80000" /*Autoboto command, please 201a562e1bdSwdenk enter a valid image address in flash */ 202a562e1bdSwdenk 203a562e1bdSwdenk #define CONFIG_BOOTARGS " " /* default bootargs that are 204a562e1bdSwdenk considered during boot */ 205a562e1bdSwdenk 206a562e1bdSwdenk /* User network settings */ 207a562e1bdSwdenk 208a562e1bdSwdenk #define CONFIG_ETHADDR 00:00:00:00:00:09 /* default ethernet MAC addr. */ 209a562e1bdSwdenk #define CONFIG_IPADDR 192.168.100.2 /* default board IP address */ 210a562e1bdSwdenk #define CONFIG_SERVERIP 192.168.100.1 /* default tftp server IP address */ 211a562e1bdSwdenk 212a562e1bdSwdenk #endif 213a562e1bdSwdenk 214*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_PROMPT "COBRA > " /* Layout of u-boot prompt*/ 215a562e1bdSwdenk 216*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_LOAD_ADDR 0x20000 /*Defines default RAM address 217a562e1bdSwdenk from which user programs will be started */ 218a562e1bdSwdenk 219a562e1bdSwdenk /*---*/ 220a562e1bdSwdenk 221*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_LONGHELP /* undef to save memory */ 222a562e1bdSwdenk 22337e4f24bSJon Loeliger #if defined(CONFIG_CMD_KGDB) 224*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 225a562e1bdSwdenk #else 226*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 227a562e1bdSwdenk #endif 228*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ 229*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 230*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 231a562e1bdSwdenk 232a562e1bdSwdenk /* 233a562e1bdSwdenk *----------------------------------------------------------------------------- 234a562e1bdSwdenk * End of user parameters to be customized 235a562e1bdSwdenk *----------------------------------------------------------------------------- 236a562e1bdSwdenk */ 237a562e1bdSwdenk 238a562e1bdSwdenk /* --- 239a562e1bdSwdenk * Defines memory range for test 240a562e1bdSwdenk * --- 241a562e1bdSwdenk */ 242a562e1bdSwdenk 243*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MEMTEST_START 0x400 244*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MEMTEST_END 0x380000 245a562e1bdSwdenk 246a562e1bdSwdenk /* --- 247a562e1bdSwdenk * Low Level Configuration Settings 248a562e1bdSwdenk * (address mappings, register initial values, etc.) 249a562e1bdSwdenk * You should know what you are doing if you make changes here. 250a562e1bdSwdenk * --- 251a562e1bdSwdenk */ 252a562e1bdSwdenk 253a562e1bdSwdenk /* --- 254a562e1bdSwdenk * Base register address 255a562e1bdSwdenk * --- 256a562e1bdSwdenk */ 257a562e1bdSwdenk 258*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MBAR 0x10000000 /* Register Base Addrs */ 259a562e1bdSwdenk 260a562e1bdSwdenk /* --- 261a562e1bdSwdenk * System Conf. Reg. & System Protection Reg. 262a562e1bdSwdenk * --- 263a562e1bdSwdenk */ 264a562e1bdSwdenk 265*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_SCR 0x0003 266*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_SPR 0xffff 267a562e1bdSwdenk 268a562e1bdSwdenk /* --- 269a562e1bdSwdenk * Ethernet settings 270a562e1bdSwdenk * --- 271a562e1bdSwdenk */ 272a562e1bdSwdenk 273*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_DISCOVER_PHY 274*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_ENET_BD_BASE 0x780000 275a562e1bdSwdenk 276a562e1bdSwdenk /*----------------------------------------------------------------------- 277a562e1bdSwdenk * Definitions for initial stack pointer and data area (in internal SRAM) 278a562e1bdSwdenk */ 279*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 280*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_INIT_RAM_END 0x1000 /* End of used area in internal SRAM */ 281*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */ 282*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) 283*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET 284a562e1bdSwdenk 285a562e1bdSwdenk /*----------------------------------------------------------------------- 286a562e1bdSwdenk * Start addresses for the final memory configuration 287a562e1bdSwdenk * (Set up by the startup code) 288*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 289a562e1bdSwdenk */ 290*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_SDRAM_BASE 0x00000000 291a562e1bdSwdenk 292a562e1bdSwdenk /* 293a562e1bdSwdenk *------------------------------------------------------------------------- 294a562e1bdSwdenk * RAM SIZE (is defined above) 295a562e1bdSwdenk *----------------------------------------------------------------------- 296a562e1bdSwdenk */ 297a562e1bdSwdenk 298*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD /* #define CONFIG_SYS_SDRAM_SIZE 16 */ 299a562e1bdSwdenk 300a562e1bdSwdenk /* 301a562e1bdSwdenk *----------------------------------------------------------------------- 302a562e1bdSwdenk */ 303a562e1bdSwdenk 304*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_FLASH_BASE 0xffe00000 305a562e1bdSwdenk 306a562e1bdSwdenk #ifdef CONFIG_MONITOR_IS_IN_RAM 307*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MONITOR_BASE 0x20000 308a562e1bdSwdenk #else 309*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) 310a562e1bdSwdenk #endif 311a562e1bdSwdenk 312*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MONITOR_LEN 0x20000 313*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MALLOC_LEN (256 << 10) 314*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024 315a562e1bdSwdenk 316a562e1bdSwdenk /* 317a562e1bdSwdenk * For booting Linux, the board info and command line data 318a562e1bdSwdenk * have to be in the first 8 MB of memory, since this is 319a562e1bdSwdenk * the maximum mapped by the Linux kernel during initialization ?? 320a562e1bdSwdenk */ 321*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ 322a562e1bdSwdenk 323a562e1bdSwdenk /*----------------------------------------------------------------------- 324a562e1bdSwdenk * FLASH organization 325a562e1bdSwdenk */ 326*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ 327*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAX_FLASH_SECT 11 /* max number of sectors on one chip */ 328*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_FLASH_ERASE_TOUT 1000 /* flash timeout */ 329a562e1bdSwdenk 330a562e1bdSwdenk /*----------------------------------------------------------------------- 331a562e1bdSwdenk * Cache Configuration 332a562e1bdSwdenk */ 333*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_CACHELINE_SIZE 16 334a562e1bdSwdenk 335a562e1bdSwdenk /*----------------------------------------------------------------------- 336a562e1bdSwdenk * Memory bank definitions 337a562e1bdSwdenk * 338a562e1bdSwdenk * Please refer also to Motorola Coldfire user manual - Chapter XXX 339a562e1bdSwdenk * <http://e-www.motorola.com/files/dsp/doc/ref_manual/MCF5272UM.pdf> 340a562e1bdSwdenk */ 341*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_BR0_PRELIM 0xFFE00201 342*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_OR0_PRELIM 0xFFE00014 343a562e1bdSwdenk 344*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_BR1_PRELIM 0 345*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_OR1_PRELIM 0 346a562e1bdSwdenk 347*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_BR2_PRELIM 0 348*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_OR2_PRELIM 0 349a562e1bdSwdenk 350*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_BR3_PRELIM 0 351*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_OR3_PRELIM 0 352a562e1bdSwdenk 353*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_BR4_PRELIM 0 354*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_OR4_PRELIM 0 355a562e1bdSwdenk 356*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_BR5_PRELIM 0 357*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_OR5_PRELIM 0 358a562e1bdSwdenk 359*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_BR6_PRELIM 0 360*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_OR6_PRELIM 0 361a562e1bdSwdenk 362*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_BR7_PRELIM 0x00000701 363*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_OR7_PRELIM 0xFF00007C 364a562e1bdSwdenk 365a562e1bdSwdenk /*----------------------------------------------------------------------- 366a562e1bdSwdenk * LED config 367a562e1bdSwdenk */ 368a562e1bdSwdenk #define LED_STAT_0 0xffff /*all LEDs off*/ 369a562e1bdSwdenk #define LED_STAT_1 0xfffe 370a562e1bdSwdenk #define LED_STAT_2 0xfffd 371a562e1bdSwdenk #define LED_STAT_3 0xfffb 372a562e1bdSwdenk #define LED_STAT_4 0xfff7 373a562e1bdSwdenk #define LED_STAT_5 0xffef 374a562e1bdSwdenk #define LED_STAT_6 0xffdf 375a562e1bdSwdenk #define LED_STAT_7 0xff00 /*all LEDs on*/ 376a562e1bdSwdenk 377a562e1bdSwdenk /*----------------------------------------------------------------------- 378a562e1bdSwdenk * Port configuration (GPIO) 379a562e1bdSwdenk */ 380*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_PACNT 0x00000000 /* PortA control reg.: All pins are external 381a562e1bdSwdenk GPIO*/ 382*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_PADDR 0x00FF /* PortA direction reg.: PA7 to PA0 are outputs 383a562e1bdSwdenk (1^=output, 0^=input) */ 384*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_PADAT LED_STAT_0 /* PortA value reg.: Turn all LED off */ 385*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_PBCNT 0x55554155 /* PortB control reg.: Ethernet/UART 386a562e1bdSwdenk configuration */ 387*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_PBDDR 0x0000 /* PortB direction: All pins configured as inputs */ 388*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_PBDAT 0x0000 /* PortB value reg. */ 389*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_PDCNT 0x00000000 /* PortD control reg. */ 390a562e1bdSwdenk 391a562e1bdSwdenk #endif /* _CONFIG_COBRA5272_H */ 392