1a562e1bdSwdenk /* 2a562e1bdSwdenk * Configuation settings for the Sentec Cobra Board. 3a562e1bdSwdenk * 4a562e1bdSwdenk * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de> 5a562e1bdSwdenk * 6a562e1bdSwdenk * See file CREDITS for list of people who contributed to this 7a562e1bdSwdenk * project. 8a562e1bdSwdenk * 9a562e1bdSwdenk * This program is free software; you can redistribute it and/or 10a562e1bdSwdenk * modify it under the terms of the GNU General Public License as 11a562e1bdSwdenk * published by the Free Software Foundation; either version 2 of 12a562e1bdSwdenk * the License, or (at your option) any later version. 13a562e1bdSwdenk * 14a562e1bdSwdenk * This program is distributed in the hope that it will be useful, 15a562e1bdSwdenk * but WITHOUT ANY WARRANTY; without even the implied warranty of 16a562e1bdSwdenk * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17a562e1bdSwdenk * GNU General Public License for more details. 18a562e1bdSwdenk * 19a562e1bdSwdenk * You should have received a copy of the GNU General Public License 20a562e1bdSwdenk * along with this program; if not, write to the Free Software 21a562e1bdSwdenk * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 22a562e1bdSwdenk * MA 02111-1307 USA 23a562e1bdSwdenk */ 24a562e1bdSwdenk 25a562e1bdSwdenk /* --- 26a562e1bdSwdenk * Version: U-boot 1.0.0 - initial release for Sentec COBRA5272 board 27a562e1bdSwdenk * Date: 2004-03-29 28a562e1bdSwdenk * Author: Florian Schlote 29a562e1bdSwdenk * 30a562e1bdSwdenk * For a description of configuration options please refer also to the 31a562e1bdSwdenk * general u-boot-1.x.x/README file 32a562e1bdSwdenk * --- 33a562e1bdSwdenk */ 34a562e1bdSwdenk 35a562e1bdSwdenk /* --- 36a562e1bdSwdenk * board/config.h - configuration options, board specific 37a562e1bdSwdenk * --- 38a562e1bdSwdenk */ 39a562e1bdSwdenk 40a562e1bdSwdenk #ifndef _CONFIG_COBRA5272_H 41a562e1bdSwdenk #define _CONFIG_COBRA5272_H 42a562e1bdSwdenk 43a562e1bdSwdenk /* --- 44a562e1bdSwdenk * Define processor 45a562e1bdSwdenk * possible values for Sentec board: only Coldfire M5272 processor supported 46a562e1bdSwdenk * (please do not change) 47a562e1bdSwdenk * --- 48a562e1bdSwdenk */ 49a562e1bdSwdenk 50a562e1bdSwdenk #define CONFIG_MCF52x2 /* define processor family */ 51a562e1bdSwdenk #define CONFIG_M5272 /* define processor type */ 52a562e1bdSwdenk 53a562e1bdSwdenk /* --- 54a562e1bdSwdenk * Defines processor clock - important for correct timings concerning serial 55a562e1bdSwdenk * interface etc. 56a562e1bdSwdenk * CFG_HZ gives unit: 1000 -> 1 Hz ^= 1000 ms 57a562e1bdSwdenk * --- 58a562e1bdSwdenk */ 59a562e1bdSwdenk 60a562e1bdSwdenk #define CFG_HZ 1000 61a562e1bdSwdenk #define CFG_CLK 66000000 62a562e1bdSwdenk #define CFG_SDRAM_SIZE 16 /* SDRAM size in MB */ 63a562e1bdSwdenk 64a562e1bdSwdenk /* --- 65a562e1bdSwdenk * Enable use of Ethernet 66a562e1bdSwdenk * --- 67a562e1bdSwdenk */ 68a562e1bdSwdenk 69a562e1bdSwdenk #define FEC_ENET 70a562e1bdSwdenk 71a562e1bdSwdenk /* --- 72a562e1bdSwdenk * Define baudrate for UART1 (console output, tftp, ...) 73a562e1bdSwdenk * default value of CONFIG_BAUDRATE for Sentec board: 19200 baud 74a562e1bdSwdenk * CFG_BAUDRATE_TABLE defines values that can be selected in u-boot command 75a562e1bdSwdenk * interface 76a562e1bdSwdenk * --- 77a562e1bdSwdenk */ 78a562e1bdSwdenk 79a562e1bdSwdenk #define CONFIG_BAUDRATE 19200 80a562e1bdSwdenk #define CFG_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 } 81a562e1bdSwdenk 82a562e1bdSwdenk /* --- 83a562e1bdSwdenk * set "#if 0" to "#if 1" if (Hardware)-WATCHDOG should be enabled & change 84a562e1bdSwdenk * timeout acc. to your needs 85a562e1bdSwdenk * #define CONFIG_WATCHDOG_TIMEOUT x , x is timeout in milliseconds, e. g. 10000 86a562e1bdSwdenk * for 10 sec 87a562e1bdSwdenk * --- 88a562e1bdSwdenk */ 89a562e1bdSwdenk 90a562e1bdSwdenk #if 0 91a562e1bdSwdenk #define CONFIG_WATCHDOG 92a562e1bdSwdenk #define CONFIG_WATCHDOG_TIMEOUT 10000 /* timeout in milliseconds */ 93a562e1bdSwdenk #endif 94a562e1bdSwdenk 95a562e1bdSwdenk /* --- 96a562e1bdSwdenk * CONFIG_MONITOR_IS_IN_RAM defines if u-boot is started from a different 97a562e1bdSwdenk * bootloader residing in flash ('chainloading'); if you want to use 98a562e1bdSwdenk * chainloading or want to compile a u-boot binary that can be loaded into 99a562e1bdSwdenk * RAM via BDM set 100a562e1bdSwdenk * "#if 0" to "#if 1" 101a562e1bdSwdenk * You will need a first stage bootloader then, e. g. colilo or a working BDM 102a562e1bdSwdenk * cable (Background Debug Mode) 103a562e1bdSwdenk * 104a562e1bdSwdenk * Setting #if 0: u-boot will start from flash and relocate itself to RAM 105a562e1bdSwdenk * 106a562e1bdSwdenk * Please do not forget to modify the setting of TEXT_BASE 107a562e1bdSwdenk * in board/cobra5272/config.mk accordingly (#if 0: 0xffe00000; #if 1: 0x20000) 108a562e1bdSwdenk * 109a562e1bdSwdenk * --- 110a562e1bdSwdenk */ 111a562e1bdSwdenk 112a562e1bdSwdenk #if 0 113a562e1bdSwdenk #define CONFIG_MONITOR_IS_IN_RAM /* monitor is started from a preloader */ 114a562e1bdSwdenk #endif 115a562e1bdSwdenk 116a562e1bdSwdenk /* --- 117a562e1bdSwdenk * Configuration for environment 118a562e1bdSwdenk * Environment is embedded in u-boot in the second sector of the flash 119a562e1bdSwdenk * --- 120a562e1bdSwdenk */ 121a562e1bdSwdenk 122a562e1bdSwdenk #ifndef CONFIG_MONITOR_IS_IN_RAM 123a562e1bdSwdenk #define CFG_ENV_OFFSET 0x4000 124a562e1bdSwdenk #define CFG_ENV_SECT_SIZE 0x2000 125a562e1bdSwdenk #define CFG_ENV_IS_IN_FLASH 1 126a562e1bdSwdenk #define CFG_ENV_IS_EMBEDDED 1 127a562e1bdSwdenk #else 128a562e1bdSwdenk #define CFG_ENV_ADDR 0xffe04000 129a562e1bdSwdenk #define CFG_ENV_SECT_SIZE 0x2000 130a562e1bdSwdenk #define CFG_ENV_IS_IN_FLASH 1 131a562e1bdSwdenk #endif 132a562e1bdSwdenk 133*37e4f24bSJon Loeliger 134*37e4f24bSJon Loeliger /* 135*37e4f24bSJon Loeliger * Command line configuration. 136a562e1bdSwdenk */ 137*37e4f24bSJon Loeliger #include <config_cmd_default.h> 138a562e1bdSwdenk 139*37e4f24bSJon Loeliger #define CONFIG_CMD_PING 140a562e1bdSwdenk 141*37e4f24bSJon Loeliger #undef CONFIG_CMD_LOADS 142*37e4f24bSJon Loeliger #undef CONFIG_CMD_LOADB 143*37e4f24bSJon Loeliger #undef CONFIG_CMD_MII 144*37e4f24bSJon Loeliger 145a562e1bdSwdenk 146a562e1bdSwdenk /* 147a562e1bdSwdenk *----------------------------------------------------------------------------- 148a562e1bdSwdenk * Define user parameters that have to be customized most likely 149a562e1bdSwdenk *----------------------------------------------------------------------------- 150a562e1bdSwdenk */ 151a562e1bdSwdenk 152a562e1bdSwdenk /*AUTOBOOT settings - booting images automatically by u-boot after power on*/ 153a562e1bdSwdenk 154a562e1bdSwdenk #define CONFIG_BOOTDELAY 5 /* used for autoboot, delay in 155a562e1bdSwdenk seconds u-boot will wait before starting defined (auto-)boot command, setting 156a562e1bdSwdenk to -1 disables delay, setting to 0 will too prevent access to u-boot command 157a562e1bdSwdenk interface: u-boot then has to reflashed */ 158a562e1bdSwdenk 159a562e1bdSwdenk 160a562e1bdSwdenk /* The following settings will be contained in the environment block ; if you 161a562e1bdSwdenk want to use a neutral environment all those settings can be manually set in 162a562e1bdSwdenk u-boot: 'set' command */ 163a562e1bdSwdenk 164a562e1bdSwdenk #if 0 165a562e1bdSwdenk 166a562e1bdSwdenk #define CONFIG_BOOTCOMMAND "bootm 0xffe80000" /*Autoboto command, please 167a562e1bdSwdenk enter a valid image address in flash */ 168a562e1bdSwdenk 169a562e1bdSwdenk #define CONFIG_BOOTARGS " " /* default bootargs that are 170a562e1bdSwdenk considered during boot */ 171a562e1bdSwdenk 172a562e1bdSwdenk /* User network settings */ 173a562e1bdSwdenk 174a562e1bdSwdenk #define CONFIG_ETHADDR 00:00:00:00:00:09 /* default ethernet MAC addr. */ 175a562e1bdSwdenk #define CONFIG_IPADDR 192.168.100.2 /* default board IP address */ 176a562e1bdSwdenk #define CONFIG_SERVERIP 192.168.100.1 /* default tftp server IP address */ 177a562e1bdSwdenk 178a562e1bdSwdenk #endif 179a562e1bdSwdenk 180a562e1bdSwdenk #define CFG_PROMPT "COBRA > " /* Layout of u-boot prompt*/ 181a562e1bdSwdenk 182a562e1bdSwdenk #define CFG_LOAD_ADDR 0x20000 /*Defines default RAM address 183a562e1bdSwdenk from which user programs will be started */ 184a562e1bdSwdenk 185a562e1bdSwdenk /*---*/ 186a562e1bdSwdenk 187a562e1bdSwdenk #define CFG_LONGHELP /* undef to save memory */ 188a562e1bdSwdenk 189*37e4f24bSJon Loeliger #if defined(CONFIG_CMD_KGDB) 190a562e1bdSwdenk #define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ 191a562e1bdSwdenk #else 192a562e1bdSwdenk #define CFG_CBSIZE 256 /* Console I/O Buffer Size */ 193a562e1bdSwdenk #endif 194a562e1bdSwdenk #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ 195a562e1bdSwdenk #define CFG_MAXARGS 16 /* max number of command args */ 196a562e1bdSwdenk #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ 197a562e1bdSwdenk 198a562e1bdSwdenk /* 199a562e1bdSwdenk *----------------------------------------------------------------------------- 200a562e1bdSwdenk * End of user parameters to be customized 201a562e1bdSwdenk *----------------------------------------------------------------------------- 202a562e1bdSwdenk */ 203a562e1bdSwdenk 204a562e1bdSwdenk /* --- 205a562e1bdSwdenk * Defines memory range for test 206a562e1bdSwdenk * --- 207a562e1bdSwdenk */ 208a562e1bdSwdenk 209a562e1bdSwdenk #define CFG_MEMTEST_START 0x400 210a562e1bdSwdenk #define CFG_MEMTEST_END 0x380000 211a562e1bdSwdenk 212a562e1bdSwdenk /* --- 213a562e1bdSwdenk * Low Level Configuration Settings 214a562e1bdSwdenk * (address mappings, register initial values, etc.) 215a562e1bdSwdenk * You should know what you are doing if you make changes here. 216a562e1bdSwdenk * --- 217a562e1bdSwdenk */ 218a562e1bdSwdenk 219a562e1bdSwdenk /* --- 220a562e1bdSwdenk * Base register address 221a562e1bdSwdenk * --- 222a562e1bdSwdenk */ 223a562e1bdSwdenk 224a562e1bdSwdenk #define CFG_MBAR 0x10000000 /* Register Base Addrs */ 225a562e1bdSwdenk 226a562e1bdSwdenk /* --- 227a562e1bdSwdenk * System Conf. Reg. & System Protection Reg. 228a562e1bdSwdenk * --- 229a562e1bdSwdenk */ 230a562e1bdSwdenk 231a562e1bdSwdenk #define CFG_SCR 0x0003; 232a562e1bdSwdenk #define CFG_SPR 0xffff; 233a562e1bdSwdenk 234a562e1bdSwdenk /* --- 235a562e1bdSwdenk * Ethernet settings 236a562e1bdSwdenk * --- 237a562e1bdSwdenk */ 238a562e1bdSwdenk 239a562e1bdSwdenk #define CFG_DISCOVER_PHY 240a562e1bdSwdenk #define CFG_ENET_BD_BASE 0x780000 241a562e1bdSwdenk 242a562e1bdSwdenk /*----------------------------------------------------------------------- 243a562e1bdSwdenk * Definitions for initial stack pointer and data area (in internal SRAM) 244a562e1bdSwdenk */ 245a562e1bdSwdenk #define CFG_INIT_RAM_ADDR 0x20000000 246a562e1bdSwdenk #define CFG_INIT_RAM_END 0x1000 /* End of used area in internal SRAM */ 247a562e1bdSwdenk #define CFG_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */ 248a562e1bdSwdenk #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) 249a562e1bdSwdenk #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET 250a562e1bdSwdenk 251a562e1bdSwdenk /*----------------------------------------------------------------------- 252a562e1bdSwdenk * Start addresses for the final memory configuration 253a562e1bdSwdenk * (Set up by the startup code) 254a562e1bdSwdenk * Please note that CFG_SDRAM_BASE _must_ start at 0 255a562e1bdSwdenk */ 256a562e1bdSwdenk #define CFG_SDRAM_BASE 0x00000000 257a562e1bdSwdenk 258a562e1bdSwdenk /* 259a562e1bdSwdenk *------------------------------------------------------------------------- 260a562e1bdSwdenk * RAM SIZE (is defined above) 261a562e1bdSwdenk *----------------------------------------------------------------------- 262a562e1bdSwdenk */ 263a562e1bdSwdenk 264a562e1bdSwdenk /* #define CFG_SDRAM_SIZE 16 */ 265a562e1bdSwdenk 266a562e1bdSwdenk /* 267a562e1bdSwdenk *----------------------------------------------------------------------- 268a562e1bdSwdenk */ 269a562e1bdSwdenk 270a562e1bdSwdenk #define CFG_FLASH_BASE 0xffe00000 271a562e1bdSwdenk 272a562e1bdSwdenk #ifdef CONFIG_MONITOR_IS_IN_RAM 273a562e1bdSwdenk #define CFG_MONITOR_BASE 0x20000 274a562e1bdSwdenk #else 275a562e1bdSwdenk #define CFG_MONITOR_BASE (CFG_FLASH_BASE + 0x400) 276a562e1bdSwdenk #endif 277a562e1bdSwdenk 278a562e1bdSwdenk #define CFG_MONITOR_LEN 0x20000 279a562e1bdSwdenk #define CFG_MALLOC_LEN (256 << 10) 280a562e1bdSwdenk #define CFG_BOOTPARAMS_LEN 64*1024 281a562e1bdSwdenk 282a562e1bdSwdenk /* 283a562e1bdSwdenk * For booting Linux, the board info and command line data 284a562e1bdSwdenk * have to be in the first 8 MB of memory, since this is 285a562e1bdSwdenk * the maximum mapped by the Linux kernel during initialization ?? 286a562e1bdSwdenk */ 287a562e1bdSwdenk #define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ 288a562e1bdSwdenk 289a562e1bdSwdenk /*----------------------------------------------------------------------- 290a562e1bdSwdenk * FLASH organization 291a562e1bdSwdenk */ 292a562e1bdSwdenk #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ 293a562e1bdSwdenk #define CFG_MAX_FLASH_SECT 11 /* max number of sectors on one chip */ 294a562e1bdSwdenk #define CFG_FLASH_ERASE_TOUT 1000 /* flash timeout */ 295a562e1bdSwdenk 296a562e1bdSwdenk /*----------------------------------------------------------------------- 297a562e1bdSwdenk * Cache Configuration 298a562e1bdSwdenk */ 299a562e1bdSwdenk #define CFG_CACHELINE_SIZE 16 300a562e1bdSwdenk 301a562e1bdSwdenk /*----------------------------------------------------------------------- 302a562e1bdSwdenk * Memory bank definitions 303a562e1bdSwdenk * 304a562e1bdSwdenk * Please refer also to Motorola Coldfire user manual - Chapter XXX 305a562e1bdSwdenk * <http://e-www.motorola.com/files/dsp/doc/ref_manual/MCF5272UM.pdf> 306a562e1bdSwdenk */ 307a562e1bdSwdenk #define CFG_BR0_PRELIM 0xFFE00201 308a562e1bdSwdenk #define CFG_OR0_PRELIM 0xFFE00014 309a562e1bdSwdenk 310a562e1bdSwdenk #define CFG_BR1_PRELIM 0 311a562e1bdSwdenk #define CFG_OR1_PRELIM 0 312a562e1bdSwdenk 313a562e1bdSwdenk #define CFG_BR2_PRELIM 0 314a562e1bdSwdenk #define CFG_OR2_PRELIM 0 315a562e1bdSwdenk 316a562e1bdSwdenk #define CFG_BR3_PRELIM 0 317a562e1bdSwdenk #define CFG_OR3_PRELIM 0 318a562e1bdSwdenk 319a562e1bdSwdenk #define CFG_BR4_PRELIM 0 320a562e1bdSwdenk #define CFG_OR4_PRELIM 0 321a562e1bdSwdenk 322a562e1bdSwdenk #define CFG_BR5_PRELIM 0 323a562e1bdSwdenk #define CFG_OR5_PRELIM 0 324a562e1bdSwdenk 325a562e1bdSwdenk #define CFG_BR6_PRELIM 0 326a562e1bdSwdenk #define CFG_OR6_PRELIM 0 327a562e1bdSwdenk 328a562e1bdSwdenk #define CFG_BR7_PRELIM 0x00000701 329a562e1bdSwdenk #define CFG_OR7_PRELIM 0xFF00007C 330a562e1bdSwdenk 331a562e1bdSwdenk /*----------------------------------------------------------------------- 332a562e1bdSwdenk * LED config 333a562e1bdSwdenk */ 334a562e1bdSwdenk #define LED_STAT_0 0xffff /*all LEDs off*/ 335a562e1bdSwdenk #define LED_STAT_1 0xfffe 336a562e1bdSwdenk #define LED_STAT_2 0xfffd 337a562e1bdSwdenk #define LED_STAT_3 0xfffb 338a562e1bdSwdenk #define LED_STAT_4 0xfff7 339a562e1bdSwdenk #define LED_STAT_5 0xffef 340a562e1bdSwdenk #define LED_STAT_6 0xffdf 341a562e1bdSwdenk #define LED_STAT_7 0xff00 /*all LEDs on*/ 342a562e1bdSwdenk 343a562e1bdSwdenk /*----------------------------------------------------------------------- 344a562e1bdSwdenk * Port configuration (GPIO) 345a562e1bdSwdenk */ 346a562e1bdSwdenk #define CFG_PACNT 0x00000000 /* PortA control reg.: All pins are external 347a562e1bdSwdenk GPIO*/ 348a562e1bdSwdenk #define CFG_PADDR 0x00FF /* PortA direction reg.: PA7 to PA0 are outputs 349a562e1bdSwdenk (1^=output, 0^=input) */ 350a562e1bdSwdenk #define CFG_PADAT LED_STAT_0 /* PortA value reg.: Turn all LED off */ 351a562e1bdSwdenk #define CFG_PBCNT 0x55554155 /* PortB control reg.: Ethernet/UART 352a562e1bdSwdenk configuration */ 353a562e1bdSwdenk #define CFG_PBDDR 0x0000 /* PortB direction: All pins configured as inputs */ 354a562e1bdSwdenk #define CFG_PBDAT 0x0000 /* PortB value reg. */ 355a562e1bdSwdenk #define CFG_PDCNT 0x00000000 /* PortD control reg. */ 356a562e1bdSwdenk 357a562e1bdSwdenk #endif /* _CONFIG_COBRA5272_H */ 358