xref: /openbmc/u-boot/include/configs/cobra5272.h (revision 25ddd1fb)
1a562e1bdSwdenk /*
2a562e1bdSwdenk  * Configuation settings for the Sentec Cobra Board.
3a562e1bdSwdenk  *
4a562e1bdSwdenk  * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
5a562e1bdSwdenk  *
6a562e1bdSwdenk  * See file CREDITS for list of people who contributed to this
7a562e1bdSwdenk  * project.
8a562e1bdSwdenk  *
9a562e1bdSwdenk  * This program is free software; you can redistribute it and/or
10a562e1bdSwdenk  * modify it under the terms of the GNU General Public License as
11a562e1bdSwdenk  * published by the Free Software Foundation; either version 2 of
12a562e1bdSwdenk  * the License, or (at your option) any later version.
13a562e1bdSwdenk  *
14a562e1bdSwdenk  * This program is distributed in the hope that it will be useful,
15a562e1bdSwdenk  * but WITHOUT ANY WARRANTY; without even the implied warranty of
16a562e1bdSwdenk  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
17a562e1bdSwdenk  * GNU General Public License for more details.
18a562e1bdSwdenk  *
19a562e1bdSwdenk  * You should have received a copy of the GNU General Public License
20a562e1bdSwdenk  * along with this program; if not, write to the Free Software
21a562e1bdSwdenk  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22a562e1bdSwdenk  * MA 02111-1307 USA
23a562e1bdSwdenk  */
24a562e1bdSwdenk 
25a562e1bdSwdenk /* ---
26a562e1bdSwdenk  * Version: U-boot 1.0.0 - initial release for Sentec COBRA5272 board
27a562e1bdSwdenk  * Date: 2004-03-29
28a562e1bdSwdenk  * Author: Florian Schlote
29a562e1bdSwdenk  *
30a562e1bdSwdenk  * For a description of configuration options please refer also to the
31a562e1bdSwdenk  * general u-boot-1.x.x/README file
32a562e1bdSwdenk  * ---
33a562e1bdSwdenk  */
34a562e1bdSwdenk 
35a562e1bdSwdenk /* ---
36a562e1bdSwdenk  * board/config.h - configuration options, board specific
37a562e1bdSwdenk  * ---
38a562e1bdSwdenk  */
39a562e1bdSwdenk 
40a562e1bdSwdenk #ifndef _CONFIG_COBRA5272_H
41a562e1bdSwdenk #define _CONFIG_COBRA5272_H
42a562e1bdSwdenk 
43a562e1bdSwdenk /* ---
44a562e1bdSwdenk  * Define processor
45a562e1bdSwdenk  * possible values for Sentec board: only Coldfire M5272 processor supported
46a562e1bdSwdenk  * (please do not change)
47a562e1bdSwdenk  * ---
48a562e1bdSwdenk  */
49a562e1bdSwdenk 
50a562e1bdSwdenk #define CONFIG_MCF52x2			/* define processor family */
51a562e1bdSwdenk #define CONFIG_M5272			/* define processor type */
52a562e1bdSwdenk 
53a562e1bdSwdenk /* ---
54a562e1bdSwdenk  * Defines processor clock - important for correct timings concerning serial
55a562e1bdSwdenk  * interface etc.
566d0f6bcfSJean-Christophe PLAGNIOL-VILLARD  * CONFIG_SYS_HZ gives unit: 1000 -> 1 Hz ^= 1000 ms
57a562e1bdSwdenk  * ---
58a562e1bdSwdenk  */
59a562e1bdSwdenk 
606d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_HZ			1000
616d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_CLK			66000000
626d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_SDRAM_SIZE		16		/* SDRAM size in MB */
63a562e1bdSwdenk 
64a562e1bdSwdenk /* ---
65a562e1bdSwdenk  * Enable use of Ethernet
66a562e1bdSwdenk  * ---
67a562e1bdSwdenk  */
686706424dSTsiChungLiew #define CONFIG_MCFFEC
69a562e1bdSwdenk 
706706424dSTsiChungLiew /* Enable Dma Timer */
716706424dSTsiChungLiew #define CONFIG_MCFTMR
72a562e1bdSwdenk 
73a562e1bdSwdenk /* ---
74a562e1bdSwdenk  * Define baudrate for UART1 (console output, tftp, ...)
75a562e1bdSwdenk  * default value of CONFIG_BAUDRATE for Sentec board: 19200 baud
766d0f6bcfSJean-Christophe PLAGNIOL-VILLARD  * CONFIG_SYS_BAUDRATE_TABLE defines values that can be selected in u-boot command
77a562e1bdSwdenk  * interface
78a562e1bdSwdenk  * ---
79a562e1bdSwdenk  */
80a562e1bdSwdenk 
816706424dSTsiChungLiew #define CONFIG_MCFUART
826d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_UART_PORT		(0)
83a562e1bdSwdenk #define CONFIG_BAUDRATE		19200
846d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
85a562e1bdSwdenk 
86a562e1bdSwdenk /* ---
87a562e1bdSwdenk  * set "#if 0" to "#if 1" if (Hardware)-WATCHDOG should be enabled & change
88a562e1bdSwdenk  * timeout acc. to your needs
89a562e1bdSwdenk  * #define CONFIG_WATCHDOG_TIMEOUT x , x is timeout in milliseconds, e. g. 10000
90a562e1bdSwdenk  * for 10 sec
91a562e1bdSwdenk  * ---
92a562e1bdSwdenk  */
93a562e1bdSwdenk 
94a562e1bdSwdenk #if 0
95a562e1bdSwdenk #define CONFIG_WATCHDOG
96a562e1bdSwdenk #define CONFIG_WATCHDOG_TIMEOUT 10000	/* timeout in milliseconds */
97a562e1bdSwdenk #endif
98a562e1bdSwdenk 
99a562e1bdSwdenk /* ---
100a562e1bdSwdenk  * CONFIG_MONITOR_IS_IN_RAM defines if u-boot is started from a different
101a562e1bdSwdenk  * bootloader residing in flash ('chainloading'); if you want to use
102a562e1bdSwdenk  * chainloading or want to compile a u-boot binary that can be loaded into
103a562e1bdSwdenk  * RAM via BDM set
104a562e1bdSwdenk  *	"#if 0" to "#if 1"
105a562e1bdSwdenk  * You will need a first stage bootloader then, e. g. colilo or a working BDM
106a562e1bdSwdenk  * cable (Background Debug Mode)
107a562e1bdSwdenk  *
108a562e1bdSwdenk  * Setting #if 0: u-boot will start from flash and relocate itself to RAM
109a562e1bdSwdenk  *
11014d0a02aSWolfgang Denk  * Please do not forget to modify the setting of CONFIG_SYS_TEXT_BASE
111a562e1bdSwdenk  * in board/cobra5272/config.mk accordingly (#if 0: 0xffe00000; #if 1: 0x20000)
112a562e1bdSwdenk  *
113a562e1bdSwdenk  * ---
114a562e1bdSwdenk  */
115a562e1bdSwdenk 
116a562e1bdSwdenk #if 0
117a562e1bdSwdenk #define CONFIG_MONITOR_IS_IN_RAM /* monitor is started from a preloader */
118a562e1bdSwdenk #endif
119a562e1bdSwdenk 
120a562e1bdSwdenk /* ---
121a562e1bdSwdenk  * Configuration for environment
122a562e1bdSwdenk  * Environment is embedded in u-boot in the second sector of the flash
123a562e1bdSwdenk  * ---
124a562e1bdSwdenk  */
125a562e1bdSwdenk 
126a562e1bdSwdenk #ifndef CONFIG_MONITOR_IS_IN_RAM
1270e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_OFFSET		0x4000
1280e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_SECT_SIZE	0x2000
1295a1aceb0SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_IS_IN_FLASH	1
130a562e1bdSwdenk #else
1310e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_ADDR		0xffe04000
1320e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_SECT_SIZE	0x2000
1335a1aceb0SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_IS_IN_FLASH	1
134a562e1bdSwdenk #endif
135a562e1bdSwdenk 
13637e4f24bSJon Loeliger 
13737e4f24bSJon Loeliger /*
13880ff4f99SJon Loeliger  * BOOTP options
13980ff4f99SJon Loeliger  */
14080ff4f99SJon Loeliger #define CONFIG_BOOTP_BOOTFILESIZE
14180ff4f99SJon Loeliger #define CONFIG_BOOTP_BOOTPATH
14280ff4f99SJon Loeliger #define CONFIG_BOOTP_GATEWAY
14380ff4f99SJon Loeliger #define CONFIG_BOOTP_HOSTNAME
14480ff4f99SJon Loeliger 
14580ff4f99SJon Loeliger 
14680ff4f99SJon Loeliger /*
14737e4f24bSJon Loeliger  * Command line configuration.
148a562e1bdSwdenk  */
14937e4f24bSJon Loeliger #include <config_cmd_default.h>
150a562e1bdSwdenk 
15137e4f24bSJon Loeliger #define CONFIG_CMD_PING
152a562e1bdSwdenk 
15337e4f24bSJon Loeliger #undef CONFIG_CMD_LOADS
15437e4f24bSJon Loeliger #undef CONFIG_CMD_LOADB
15537e4f24bSJon Loeliger #undef CONFIG_CMD_MII
15637e4f24bSJon Loeliger 
1576706424dSTsiChungLiew #ifdef CONFIG_MCFFEC
1586706424dSTsiChungLiew #	define CONFIG_NET_MULTI		1
1596706424dSTsiChungLiew #	define CONFIG_MII		1
1600f3ba7e9STsiChung Liew #	define CONFIG_MII_INIT		1
1616d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #	define CONFIG_SYS_DISCOVER_PHY
1626d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #	define CONFIG_SYS_RX_ETH_BUFFER	8
1636d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #	define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
1646706424dSTsiChungLiew 
1656d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #	define CONFIG_SYS_FEC0_PINMUX		0
1666d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #	define CONFIG_SYS_FEC0_MIIBASE		CONFIG_SYS_FEC0_IOBASE
1676706424dSTsiChungLiew #	define MCFFEC_TOUT_LOOP		50000
1686d0f6bcfSJean-Christophe PLAGNIOL-VILLARD /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
1696d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #	ifndef CONFIG_SYS_DISCOVER_PHY
1706706424dSTsiChungLiew #		define FECDUPLEX	FULL
1716706424dSTsiChungLiew #		define FECSPEED		_100BASET
1726706424dSTsiChungLiew #	else
1736d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #		ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
1746d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #			define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
1756706424dSTsiChungLiew #		endif
1766d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #	endif			/* CONFIG_SYS_DISCOVER_PHY */
1776706424dSTsiChungLiew #endif
178a562e1bdSwdenk 
179a562e1bdSwdenk /*
180a562e1bdSwdenk  *-----------------------------------------------------------------------------
181a562e1bdSwdenk  * Define user parameters that have to be customized most likely
182a562e1bdSwdenk  *-----------------------------------------------------------------------------
183a562e1bdSwdenk  */
184a562e1bdSwdenk 
185a562e1bdSwdenk /*AUTOBOOT settings - booting images automatically by u-boot after power on*/
186a562e1bdSwdenk 
187a562e1bdSwdenk #define CONFIG_BOOTDELAY	5		/* used for autoboot, delay in
188a562e1bdSwdenk seconds u-boot will wait before starting defined (auto-)boot command, setting
189a562e1bdSwdenk to -1 disables delay, setting to 0 will too prevent access to u-boot command
190a562e1bdSwdenk interface: u-boot then has to reflashed */
191a562e1bdSwdenk 
192a562e1bdSwdenk 
193a562e1bdSwdenk /* The following settings will be contained in the environment block ; if you
194a562e1bdSwdenk want to use a neutral environment all those settings can be manually set in
195a562e1bdSwdenk u-boot: 'set' command */
196a562e1bdSwdenk 
197a562e1bdSwdenk #if 0
198a562e1bdSwdenk 
199a562e1bdSwdenk #define CONFIG_BOOTCOMMAND	"bootm 0xffe80000"	/*Autoboto command, please
200a562e1bdSwdenk enter a valid image address in flash */
201a562e1bdSwdenk 
202a562e1bdSwdenk #define CONFIG_BOOTARGS		" "			/* default bootargs that are
203a562e1bdSwdenk considered during boot */
204a562e1bdSwdenk 
205a562e1bdSwdenk /* User network settings */
206a562e1bdSwdenk 
207a562e1bdSwdenk #define CONFIG_ETHADDR 00:00:00:00:00:09	/* default ethernet MAC addr. */
208a562e1bdSwdenk #define CONFIG_IPADDR 192.168.100.2		/* default board IP address */
209a562e1bdSwdenk #define CONFIG_SERVERIP 192.168.100.1	/* default tftp server IP address */
210a562e1bdSwdenk 
211a562e1bdSwdenk #endif
212a562e1bdSwdenk 
2136d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_PROMPT		"COBRA > "	/* Layout of u-boot prompt*/
214a562e1bdSwdenk 
2156d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_LOAD_ADDR		0x20000		/*Defines default RAM address
216a562e1bdSwdenk from which user programs will be started */
217a562e1bdSwdenk 
218a562e1bdSwdenk /*---*/
219a562e1bdSwdenk 
2206d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_LONGHELP				/* undef to save memory		*/
221a562e1bdSwdenk 
22237e4f24bSJon Loeliger #if defined(CONFIG_CMD_KGDB)
2236d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_CBSIZE		1024		/* Console I/O Buffer Size	*/
224a562e1bdSwdenk #else
2256d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_CBSIZE		256		/* Console I/O Buffer Size	*/
226a562e1bdSwdenk #endif
2276d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
2286d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAXARGS		16		/* max number of command args	*/
2296d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE	/* Boot Argument Buffer Size	*/
230a562e1bdSwdenk 
231a562e1bdSwdenk /*
232a562e1bdSwdenk  *-----------------------------------------------------------------------------
233a562e1bdSwdenk  * End of user parameters to be customized
234a562e1bdSwdenk  *-----------------------------------------------------------------------------
235a562e1bdSwdenk  */
236a562e1bdSwdenk 
237a562e1bdSwdenk /* ---
238a562e1bdSwdenk  * Defines memory range for test
239a562e1bdSwdenk  * ---
240a562e1bdSwdenk  */
241a562e1bdSwdenk 
2426d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MEMTEST_START	0x400
2436d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MEMTEST_END		0x380000
244a562e1bdSwdenk 
245a562e1bdSwdenk /* ---
246a562e1bdSwdenk  * Low Level Configuration Settings
247a562e1bdSwdenk  * (address mappings, register initial values, etc.)
248a562e1bdSwdenk  * You should know what you are doing if you make changes here.
249a562e1bdSwdenk  * ---
250a562e1bdSwdenk  */
251a562e1bdSwdenk 
252a562e1bdSwdenk /* ---
253a562e1bdSwdenk  * Base register address
254a562e1bdSwdenk  * ---
255a562e1bdSwdenk  */
256a562e1bdSwdenk 
2576d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MBAR		0x10000000	/* Register Base Addrs */
258a562e1bdSwdenk 
259a562e1bdSwdenk /* ---
260a562e1bdSwdenk  * System Conf. Reg. & System Protection Reg.
261a562e1bdSwdenk  * ---
262a562e1bdSwdenk  */
263a562e1bdSwdenk 
2646d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_SCR			0x0003
2656d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_SPR			0xffff
266a562e1bdSwdenk 
267a562e1bdSwdenk /* ---
268a562e1bdSwdenk  * Ethernet settings
269a562e1bdSwdenk  * ---
270a562e1bdSwdenk  */
271a562e1bdSwdenk 
2726d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_DISCOVER_PHY
2736d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_ENET_BD_BASE	0x780000
274a562e1bdSwdenk 
275a562e1bdSwdenk /*-----------------------------------------------------------------------
276a562e1bdSwdenk  * Definitions for initial stack pointer and data area (in internal SRAM)
277a562e1bdSwdenk  */
2786d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_INIT_RAM_ADDR	0x20000000
279553f0982SWolfgang Denk #define CONFIG_SYS_INIT_RAM_SIZE	0x1000	/* Size of used area in internal SRAM	*/
280*25ddd1fbSWolfgang Denk #define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
2816d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
282a562e1bdSwdenk 
283a562e1bdSwdenk /*-----------------------------------------------------------------------
284a562e1bdSwdenk  * Start addresses for the final memory configuration
285a562e1bdSwdenk  * (Set up by the startup code)
2866d0f6bcfSJean-Christophe PLAGNIOL-VILLARD  * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
287a562e1bdSwdenk  */
2886d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_SDRAM_BASE		0x00000000
289a562e1bdSwdenk 
290a562e1bdSwdenk /*
291a562e1bdSwdenk  *-------------------------------------------------------------------------
292a562e1bdSwdenk  * RAM SIZE (is defined above)
293a562e1bdSwdenk  *-----------------------------------------------------------------------
294a562e1bdSwdenk  */
295a562e1bdSwdenk 
2966d0f6bcfSJean-Christophe PLAGNIOL-VILLARD /* #define CONFIG_SYS_SDRAM_SIZE		16 */
297a562e1bdSwdenk 
298a562e1bdSwdenk /*
299a562e1bdSwdenk  *-----------------------------------------------------------------------
300a562e1bdSwdenk  */
301a562e1bdSwdenk 
3026d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_FLASH_BASE		0xffe00000
303a562e1bdSwdenk 
304a562e1bdSwdenk #ifdef	CONFIG_MONITOR_IS_IN_RAM
3056d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MONITOR_BASE	0x20000
306a562e1bdSwdenk #else
3076d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MONITOR_BASE	(CONFIG_SYS_FLASH_BASE + 0x400)
308a562e1bdSwdenk #endif
309a562e1bdSwdenk 
3106d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MONITOR_LEN		0x20000
3116d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MALLOC_LEN		(256 << 10)
3126d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_BOOTPARAMS_LEN	64*1024
313a562e1bdSwdenk 
314a562e1bdSwdenk /*
315a562e1bdSwdenk  * For booting Linux, the board info and command line data
316a562e1bdSwdenk  * have to be in the first 8 MB of memory, since this is
317a562e1bdSwdenk  * the maximum mapped by the Linux kernel during initialization ??
318a562e1bdSwdenk  */
3196d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_BOOTMAPSZ		(8 << 20)	/* Initial Memory map for Linux */
320a562e1bdSwdenk 
321a562e1bdSwdenk /*-----------------------------------------------------------------------
322a562e1bdSwdenk  * FLASH organization
323a562e1bdSwdenk  */
3246d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAX_FLASH_BANKS	1	/* max number of memory banks		*/
3256d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAX_FLASH_SECT	11	/* max number of sectors on one chip	*/
3266d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_FLASH_ERASE_TOUT	1000	/* flash timeout */
327a562e1bdSwdenk 
328a562e1bdSwdenk /*-----------------------------------------------------------------------
329a562e1bdSwdenk  * Cache Configuration
330a562e1bdSwdenk  */
3316d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_CACHELINE_SIZE	16
332a562e1bdSwdenk 
333dd9f054eSTsiChung Liew #define ICACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
334553f0982SWolfgang Denk 					 CONFIG_SYS_INIT_RAM_SIZE - 8)
335dd9f054eSTsiChung Liew #define DCACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
336553f0982SWolfgang Denk 					 CONFIG_SYS_INIT_RAM_SIZE - 4)
337dd9f054eSTsiChung Liew #define CONFIG_SYS_ICACHE_INV		(CF_CACR_CINV | CF_CACR_INVI)
338dd9f054eSTsiChung Liew #define CONFIG_SYS_CACHE_ACR0		(CONFIG_SYS_SDRAM_BASE | \
339dd9f054eSTsiChung Liew 					 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
340dd9f054eSTsiChung Liew 					 CF_ACR_EN | CF_ACR_SM_ALL)
341dd9f054eSTsiChung Liew #define CONFIG_SYS_CACHE_ICACR		(CF_CACR_CENB | CF_CACR_CINV | \
342dd9f054eSTsiChung Liew 					 CF_CACR_DISD | CF_CACR_INVI | \
343dd9f054eSTsiChung Liew 					 CF_CACR_CEIB | CF_CACR_DCM | \
344dd9f054eSTsiChung Liew 					 CF_CACR_EUSP)
345dd9f054eSTsiChung Liew 
346a562e1bdSwdenk /*-----------------------------------------------------------------------
347a562e1bdSwdenk  * Memory bank definitions
348a562e1bdSwdenk  *
349a562e1bdSwdenk  * Please refer also to Motorola Coldfire user manual - Chapter XXX
350a562e1bdSwdenk  * <http://e-www.motorola.com/files/dsp/doc/ref_manual/MCF5272UM.pdf>
351a562e1bdSwdenk  */
3526d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_BR0_PRELIM		0xFFE00201
3536d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_OR0_PRELIM		0xFFE00014
354a562e1bdSwdenk 
3556d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_BR1_PRELIM		0
3566d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_OR1_PRELIM		0
357a562e1bdSwdenk 
3586d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_BR2_PRELIM		0
3596d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_OR2_PRELIM		0
360a562e1bdSwdenk 
3616d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_BR3_PRELIM		0
3626d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_OR3_PRELIM		0
363a562e1bdSwdenk 
3646d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_BR4_PRELIM		0
3656d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_OR4_PRELIM		0
366a562e1bdSwdenk 
3676d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_BR5_PRELIM		0
3686d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_OR5_PRELIM		0
369a562e1bdSwdenk 
3706d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_BR6_PRELIM		0
3716d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_OR6_PRELIM		0
372a562e1bdSwdenk 
3736d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_BR7_PRELIM		0x00000701
3746d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_OR7_PRELIM		0xFF00007C
375a562e1bdSwdenk 
376a562e1bdSwdenk /*-----------------------------------------------------------------------
377a562e1bdSwdenk  * LED config
378a562e1bdSwdenk  */
379a562e1bdSwdenk #define	LED_STAT_0	0xffff /*all LEDs off*/
380a562e1bdSwdenk #define	LED_STAT_1	0xfffe
381a562e1bdSwdenk #define	LED_STAT_2	0xfffd
382a562e1bdSwdenk #define	LED_STAT_3	0xfffb
383a562e1bdSwdenk #define	LED_STAT_4	0xfff7
384a562e1bdSwdenk #define	LED_STAT_5	0xffef
385a562e1bdSwdenk #define	LED_STAT_6	0xffdf
386a562e1bdSwdenk #define	LED_STAT_7	0xff00 /*all LEDs on*/
387a562e1bdSwdenk 
388a562e1bdSwdenk /*-----------------------------------------------------------------------
389a562e1bdSwdenk  * Port configuration (GPIO)
390a562e1bdSwdenk  */
3916d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_PACNT		0x00000000		/* PortA control reg.: All pins are external
392a562e1bdSwdenk GPIO*/
3936d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_PADDR		0x00FF			/* PortA direction reg.: PA7 to PA0 are outputs
394a562e1bdSwdenk (1^=output, 0^=input) */
3956d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_PADAT		LED_STAT_0		/* PortA value reg.: Turn all LED off */
3966d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_PBCNT		0x55554155		/* PortB control reg.: Ethernet/UART
397a562e1bdSwdenk configuration */
3986d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_PBDDR		0x0000			/* PortB direction: All pins configured as inputs */
3996d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_PBDAT		0x0000			/* PortB value reg. */
4006d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_PDCNT		0x00000000		/* PortD control reg. */
401a562e1bdSwdenk 
402a562e1bdSwdenk #endif	/* _CONFIG_COBRA5272_H */
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