xref: /openbmc/u-boot/include/configs/cm_t3517.h (revision ed09a554)
1 /*
2  * (C) Copyright 2013 CompuLab, Ltd.
3  * Author: Igor Grinberg <grinberg@compulab.co.il>
4  *
5  * Configuration settings for the CompuLab CM-T3517 board
6  *
7  * SPDX-License-Identifier:	GPL-2.0+
8  */
9 
10 #ifndef __CONFIG_H
11 #define __CONFIG_H
12 
13 /*
14  * High Level Configuration Options
15  */
16 #define CONFIG_OMAP	/* in a TI OMAP core */
17 #define CONFIG_CM_T3517	/* working with CM-T3517 */
18 #define CONFIG_OMAP_COMMON
19 #define CONFIG_SYS_GENERIC_BOARD
20 /* Common ARM Erratas */
21 #define CONFIG_ARM_ERRATA_454179
22 #define CONFIG_ARM_ERRATA_430973
23 #define CONFIG_ARM_ERRATA_621766
24 
25 #define CONFIG_SYS_TEXT_BASE	0x80008000
26 
27 /*
28  * This is needed for the DMA stuff.
29  * Although the default iss 64, we still define it
30  * to be on the safe side once the default is changed.
31  */
32 #define CONFIG_SYS_CACHELINE_SIZE	64
33 
34 #define CONFIG_EMIF4	/* The chip has EMIF4 controller */
35 
36 #include <asm/arch/cpu.h>		/* get chip and board defs */
37 #include <asm/arch/omap.h>
38 
39 /*
40  * Display CPU and Board information
41  */
42 #define CONFIG_DISPLAY_CPUINFO
43 #define CONFIG_DISPLAY_BOARDINFO
44 
45 /* Clock Defines */
46 #define V_OSCK			26000000	/* Clock output from T2 */
47 #define V_SCLK			(V_OSCK >> 1)
48 
49 #define CONFIG_MISC_INIT_R
50 
51 #define CONFIG_OF_LIBFDT
52 /*
53  * The early kernel mapping on ARM currently only maps from the base of DRAM
54  * to the end of the kernel image.  The kernel is loaded at DRAM base + 0x8000.
55  * The early kernel pagetable uses DRAM base + 0x4000 to DRAM base + 0x8000,
56  * so that leaves DRAM base to DRAM base + 0x4000 available.
57  */
58 #define CONFIG_SYS_BOOTMAPSZ	        0x4000
59 
60 #define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
61 #define CONFIG_SETUP_MEMORY_TAGS
62 #define CONFIG_INITRD_TAG
63 #define CONFIG_REVISION_TAG
64 #define CONFIG_SERIAL_TAG
65 
66 /*
67  * Size of malloc() pool
68  */
69 #define CONFIG_ENV_SIZE		(16 << 10)	/* 16 KiB */
70 #define CONFIG_SYS_MALLOC_LEN	(CONFIG_ENV_SIZE + (128 << 10))
71 
72 /*
73  * Hardware drivers
74  */
75 
76 /*
77  * NS16550 Configuration
78  */
79 #define CONFIG_SYS_NS16550
80 #define CONFIG_SYS_NS16550_SERIAL
81 #define CONFIG_SYS_NS16550_REG_SIZE	(-4)
82 #define CONFIG_SYS_NS16550_CLK		48000000	/* 48MHz (APLL96/2) */
83 
84 /*
85  * select serial console configuration
86  */
87 #define CONFIG_CONS_INDEX		3
88 #define CONFIG_SYS_NS16550_COM3		OMAP34XX_UART3
89 #define CONFIG_SERIAL3			3	/* UART3 */
90 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
91 
92 /* allow to overwrite serial and ethaddr */
93 #define CONFIG_ENV_OVERWRITE
94 #define CONFIG_BAUDRATE			115200
95 #define CONFIG_SYS_BAUDRATE_TABLE	{4800, 9600, 19200, 38400, 57600,\
96 					115200}
97 
98 #define CONFIG_OMAP_GPIO
99 
100 #define CONFIG_GENERIC_MMC
101 #define CONFIG_MMC
102 #define CONFIG_OMAP_HSMMC
103 #define CONFIG_DOS_PARTITION
104 
105 /* USB */
106 #define CONFIG_USB_MUSB_AM35X
107 
108 #ifndef CONFIG_USB_MUSB_AM35X
109 #define CONFIG_USB_OMAP3
110 #define CONFIG_USB_EHCI
111 #define CONFIG_USB_EHCI_OMAP
112 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 146
113 #define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 147
114 #else /* !CONFIG_USB_MUSB_AM35X */
115 #define CONFIG_MUSB_HOST
116 #define CONFIG_MUSB_PIO_ONLY
117 #endif /* CONFIG_USB_MUSB_AM35X */
118 
119 #define CONFIG_USB_STORAGE
120 #define CONFIG_CMD_USB
121 
122 /* commands to include */
123 #include <config_cmd_default.h>
124 
125 #define CONFIG_CMD_CACHE
126 #define CONFIG_CMD_EXT2		/* EXT2 Support			*/
127 #define CONFIG_CMD_FAT		/* FAT support			*/
128 #define CONFIG_CMD_MTDPARTS	/* Enable MTD parts commands */
129 #define CONFIG_MTD_DEVICE	/* needed for mtdparts commands */
130 #define CONFIG_MTD_PARTITIONS
131 #define MTDIDS_DEFAULT		"nand0=nand"
132 #define MTDPARTS_DEFAULT	"mtdparts=nand:512k(x-loader),"\
133 				"1920k(u-boot),256k(u-boot-env),"\
134 				"4m(kernel),-(fs)"
135 
136 #define CONFIG_CMD_I2C		/* I2C serial bus support	*/
137 #define CONFIG_CMD_MMC		/* MMC support			*/
138 #define CONFIG_CMD_NAND		/* NAND support			*/
139 #define CONFIG_CMD_DHCP
140 #define CONFIG_CMD_PING
141 #define CONFIG_CMD_GPIO
142 
143 #undef CONFIG_CMD_FLASH		/* flinfo, erase, protect	*/
144 #undef CONFIG_CMD_FPGA		/* FPGA configuration Support	*/
145 #undef CONFIG_CMD_IMLS		/* List all found images	*/
146 
147 #define CONFIG_SYS_NO_FLASH
148 #define CONFIG_SYS_I2C
149 #define CONFIG_SYS_OMAP24_I2C_SPEED	400000
150 #define CONFIG_SYS_OMAP24_I2C_SLAVE	1
151 #define CONFIG_SYS_I2C_OMAP34XX
152 #define CONFIG_SYS_I2C_EEPROM_ADDR	0x50
153 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	1
154 #define CONFIG_SYS_I2C_EEPROM_BUS	0
155 #define CONFIG_I2C_MULTI_BUS
156 
157 /*
158  * Board NAND Info.
159  */
160 #define CONFIG_SYS_NAND_QUIET_TEST
161 #define CONFIG_NAND_OMAP_GPMC
162 #define CONFIG_SYS_NAND_ADDR		NAND_BASE	/* physical address */
163 							/* to access nand */
164 #define CONFIG_SYS_NAND_BASE		NAND_BASE	/* physical address */
165 							/* to access nand at */
166 							/* CS0 */
167 #define CONFIG_SYS_MAX_NAND_DEVICE	1		/* Max number of NAND */
168 							/* devices */
169 
170 /* Environment information */
171 #define CONFIG_BOOTDELAY		3
172 #define CONFIG_ZERO_BOOTDELAY_CHECK
173 
174 #define CONFIG_EXTRA_ENV_SETTINGS \
175 	"loadaddr=0x82000000\0" \
176 	"baudrate=115200\0" \
177 	"console=ttyO2,115200n8\0" \
178 	"mpurate=auto\0" \
179 	"vram=12M\0" \
180 	"dvimode=1024x768MR-16@60\0" \
181 	"defaultdisplay=dvi\0" \
182 	"mmcdev=0\0" \
183 	"mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
184 	"mmcrootfstype=ext4\0" \
185 	"nandroot=/dev/mtdblock4 rw\0" \
186 	"nandrootfstype=ubifs\0" \
187 	"mmcargs=setenv bootargs console=${console} " \
188 		"mpurate=${mpurate} " \
189 		"vram=${vram} " \
190 		"omapfb.mode=dvi:${dvimode} " \
191 		"omapdss.def_disp=${defaultdisplay} " \
192 		"root=${mmcroot} " \
193 		"rootfstype=${mmcrootfstype}\0" \
194 	"nandargs=setenv bootargs console=${console} " \
195 		"mpurate=${mpurate} " \
196 		"vram=${vram} " \
197 		"omapfb.mode=dvi:${dvimode} " \
198 		"omapdss.def_disp=${defaultdisplay} " \
199 		"root=${nandroot} " \
200 		"rootfstype=${nandrootfstype}\0" \
201 	"loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
202 	"bootscript=echo Running bootscript from mmc ...; " \
203 		"source ${loadaddr}\0" \
204 	"loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
205 	"mmcboot=echo Booting from mmc ...; " \
206 		"run mmcargs; " \
207 		"bootm ${loadaddr}\0" \
208 	"nandboot=echo Booting from nand ...; " \
209 		"run nandargs; " \
210 		"nand read ${loadaddr} 2a0000 400000; " \
211 		"bootm ${loadaddr}\0" \
212 
213 #define CONFIG_CMD_BOOTZ
214 #define CONFIG_BOOTCOMMAND \
215 	"mmc dev ${mmcdev}; if mmc rescan; then " \
216 		"if run loadbootscript; then " \
217 			"run bootscript; " \
218 		"else " \
219 			"if run loaduimage; then " \
220 				"run mmcboot; " \
221 			"else run nandboot; " \
222 			"fi; " \
223 		"fi; " \
224 	"else run nandboot; fi"
225 
226 /*
227  * Miscellaneous configurable options
228  */
229 #define CONFIG_AUTO_COMPLETE
230 #define CONFIG_CMDLINE_EDITING
231 #define CONFIG_TIMESTAMP
232 #define CONFIG_SYS_AUTOLOAD		"no"
233 #define CONFIG_SYS_LONGHELP		/* undef to save memory */
234 #define CONFIG_SYS_HUSH_PARSER		/* use "hush" command parser */
235 #define CONFIG_SYS_PROMPT		"CM-T3517 # "
236 #define CONFIG_SYS_CBSIZE		512	/* Console I/O Buffer Size */
237 /* Print Buffer Size */
238 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
239 					sizeof(CONFIG_SYS_PROMPT) + 16)
240 #define CONFIG_SYS_MAXARGS		32	/* max number of command args */
241 /* Boot Argument Buffer Size */
242 #define CONFIG_SYS_BARGSIZE		(CONFIG_SYS_CBSIZE)
243 
244 #define CONFIG_SYS_LOAD_ADDR		(OMAP34XX_SDRC_CS0 + 0x02000000)
245 
246 /*
247  * AM3517 has 12 GP timers, they can be driven by the system clock
248  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
249  * This rate is divided by a local divisor.
250  */
251 #define CONFIG_SYS_TIMERBASE		(OMAP34XX_GPT2)
252 #define CONFIG_SYS_PTV			2       /* Divisor: 2^(PTV+1) => 8 */
253 #define CONFIG_SYS_HZ			1000
254 
255 /*-----------------------------------------------------------------------
256  * Physical Memory Map
257  */
258 #define CONFIG_NR_DRAM_BANKS	1	/* CM-T3517 DRAM is only on CS0 */
259 #define PHYS_SDRAM_1		OMAP34XX_SDRC_CS0
260 #define CONFIG_SYS_CS0_SIZE		(256 << 20)
261 
262 /*-----------------------------------------------------------------------
263  * FLASH and environment organization
264  */
265 
266 /* **** PISMO SUPPORT *** */
267 /* Monitor at start of flash */
268 #define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_FLASH_BASE
269 #define CONFIG_SYS_MONITOR_LEN		(256 << 10)	/* Reserve 2 sectors */
270 
271 #define CONFIG_ENV_IS_IN_NAND
272 #define SMNAND_ENV_OFFSET		0x260000 /* environment starts here */
273 #define CONFIG_ENV_OFFSET		SMNAND_ENV_OFFSET
274 #define CONFIG_ENV_ADDR			SMNAND_ENV_OFFSET
275 
276 #if defined(CONFIG_CMD_NET)
277 #define CONFIG_DRIVER_TI_EMAC
278 #define CONFIG_DRIVER_TI_EMAC_USE_RMII
279 #define CONFIG_MII
280 #define CONFIG_SMC911X
281 #define CONFIG_SMC911X_32_BIT
282 #define CONFIG_SMC911X_BASE	(0x2C000000 + (16 << 20))
283 #endif /* CONFIG_CMD_NET */
284 
285 /* additions for new relocation code, must be added to all boards */
286 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
287 #define CONFIG_SYS_INIT_RAM_ADDR	0x4020f800
288 #define CONFIG_SYS_INIT_RAM_SIZE	0x800
289 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR +	\
290 					 CONFIG_SYS_INIT_RAM_SIZE -	\
291 					 GENERATED_GBL_DATA_SIZE)
292 
293 /* Status LED */
294 #define CONFIG_STATUS_LED		/* Status LED enabled */
295 #define CONFIG_BOARD_SPECIFIC_LED
296 #define CONFIG_GPIO_LED
297 #define GREEN_LED_GPIO			186 /* CM-T3517 Green LED is GPIO186 */
298 #define GREEN_LED_DEV			0
299 #define STATUS_LED_BIT			GREEN_LED_GPIO
300 #define STATUS_LED_STATE		STATUS_LED_ON
301 #define STATUS_LED_PERIOD		(CONFIG_SYS_HZ / 2)
302 #define STATUS_LED_BOOT			GREEN_LED_DEV
303 
304 /* GPIO banks */
305 #ifdef CONFIG_STATUS_LED
306 #define CONFIG_OMAP3_GPIO_6	/* GPIO186 is in GPIO bank 6  */
307 #endif
308 
309 /* Display Configuration */
310 #define CONFIG_OMAP3_GPIO_2
311 #define CONFIG_OMAP3_GPIO_5
312 #define CONFIG_VIDEO_OMAP3
313 #define LCD_BPP		LCD_COLOR16
314 
315 #define CONFIG_LCD
316 #define CONFIG_SPLASH_SCREEN
317 #define CONFIG_SPLASHIMAGE_GUARD
318 #define CONFIG_CMD_BMP
319 #define CONFIG_BMP_16BPP
320 #define CONFIG_SCF0403_LCD
321 
322 #define CONFIG_OMAP3_SPI
323 
324 #endif /* __CONFIG_H */
325