1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * (C) Copyright 2013 CompuLab, Ltd. 4 * Author: Igor Grinberg <grinberg@compulab.co.il> 5 * 6 * Configuration settings for the CompuLab CM-T3517 board 7 */ 8 9 #ifndef __CONFIG_H 10 #define __CONFIG_H 11 12 /* 13 * High Level Configuration Options 14 */ 15 #define CONFIG_CM_T3517 /* working with CM-T3517 */ 16 17 /* 18 * This is needed for the DMA stuff. 19 * Although the default iss 64, we still define it 20 * to be on the safe side once the default is changed. 21 */ 22 23 #include <asm/arch/cpu.h> /* get chip and board defs */ 24 #include <asm/arch/omap.h> 25 26 #define CONFIG_MACH_TYPE MACH_TYPE_CM_T3517 27 28 /* Clock Defines */ 29 #define V_OSCK 26000000 /* Clock output from T2 */ 30 #define V_SCLK (V_OSCK >> 1) 31 32 #define CONFIG_MISC_INIT_R 33 34 /* 35 * The early kernel mapping on ARM currently only maps from the base of DRAM 36 * to the end of the kernel image. The kernel is loaded at DRAM base + 0x8000. 37 * The early kernel pagetable uses DRAM base + 0x4000 to DRAM base + 0x8000, 38 * so that leaves DRAM base to DRAM base + 0x4000 available. 39 */ 40 #define CONFIG_SYS_BOOTMAPSZ 0x4000 41 42 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 43 #define CONFIG_SETUP_MEMORY_TAGS 44 #define CONFIG_INITRD_TAG 45 #define CONFIG_REVISION_TAG 46 #define CONFIG_SERIAL_TAG 47 48 /* 49 * Size of malloc() pool 50 */ 51 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ 52 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10)) 53 54 /* 55 * Hardware drivers 56 */ 57 58 /* 59 * NS16550 Configuration 60 */ 61 #define CONFIG_SYS_NS16550_SERIAL 62 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 63 #define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ 64 65 /* 66 * select serial console configuration 67 */ 68 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 69 #define CONFIG_SERIAL3 3 /* UART3 */ 70 71 /* allow to overwrite serial and ethaddr */ 72 #define CONFIG_ENV_OVERWRITE 73 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 74 115200} 75 76 /* USB */ 77 78 #ifndef CONFIG_USB_MUSB_AM35X 79 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 146 80 #define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 147 81 #endif /* CONFIG_USB_MUSB_AM35X */ 82 83 /* commands to include */ 84 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ 85 #define CONFIG_MTD_PARTITIONS 86 87 #define CONFIG_SYS_I2C 88 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 89 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 90 #define CONFIG_SYS_I2C_EEPROM_BUS 0 91 #define CONFIG_I2C_MULTI_BUS 92 93 /* 94 * Board NAND Info. 95 */ 96 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ 97 /* to access nand */ 98 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ 99 /* to access nand at */ 100 /* CS0 */ 101 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ 102 /* devices */ 103 104 /* Environment information */ 105 #define CONFIG_EXTRA_ENV_SETTINGS \ 106 "loadaddr=0x82000000\0" \ 107 "baudrate=115200\0" \ 108 "console=ttyO2,115200n8\0" \ 109 "netretry=yes\0" \ 110 "mpurate=auto\0" \ 111 "vram=12M\0" \ 112 "dvimode=1024x768MR-16@60\0" \ 113 "defaultdisplay=dvi\0" \ 114 "mmcdev=0\0" \ 115 "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \ 116 "mmcrootfstype=ext4\0" \ 117 "nandroot=/dev/mtdblock4 rw\0" \ 118 "nandrootfstype=ubifs\0" \ 119 "mmcargs=setenv bootargs console=${console} " \ 120 "mpurate=${mpurate} " \ 121 "vram=${vram} " \ 122 "omapfb.mode=dvi:${dvimode} " \ 123 "omapdss.def_disp=${defaultdisplay} " \ 124 "root=${mmcroot} " \ 125 "rootfstype=${mmcrootfstype}\0" \ 126 "nandargs=setenv bootargs console=${console} " \ 127 "mpurate=${mpurate} " \ 128 "vram=${vram} " \ 129 "omapfb.mode=dvi:${dvimode} " \ 130 "omapdss.def_disp=${defaultdisplay} " \ 131 "root=${nandroot} " \ 132 "rootfstype=${nandrootfstype}\0" \ 133 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ 134 "bootscript=echo Running bootscript from mmc ...; " \ 135 "source ${loadaddr}\0" \ 136 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ 137 "mmcboot=echo Booting from mmc ...; " \ 138 "run mmcargs; " \ 139 "bootm ${loadaddr}\0" \ 140 "nandboot=echo Booting from nand ...; " \ 141 "run nandargs; " \ 142 "nand read ${loadaddr} 2a0000 400000; " \ 143 "bootm ${loadaddr}\0" \ 144 145 #define CONFIG_BOOTCOMMAND \ 146 "mmc dev ${mmcdev}; if mmc rescan; then " \ 147 "if run loadbootscript; then " \ 148 "run bootscript; " \ 149 "else " \ 150 "if run loaduimage; then " \ 151 "run mmcboot; " \ 152 "else run nandboot; " \ 153 "fi; " \ 154 "fi; " \ 155 "else run nandboot; fi" 156 157 /* 158 * Miscellaneous configurable options 159 */ 160 #define CONFIG_TIMESTAMP 161 #define CONFIG_SYS_AUTOLOAD "no" 162 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ 163 #define CONFIG_SYS_MAXARGS 32 /* max number of command args */ 164 165 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0 + 0x02000000) 166 167 /* 168 * AM3517 has 12 GP timers, they can be driven by the system clock 169 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 170 * This rate is divided by a local divisor. 171 */ 172 #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) 173 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 174 #define CONFIG_SYS_HZ 1000 175 176 /*----------------------------------------------------------------------- 177 * Physical Memory Map 178 */ 179 #define CONFIG_NR_DRAM_BANKS 1 /* CM-T3517 DRAM is only on CS0 */ 180 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 181 #define CONFIG_SYS_CS0_SIZE (256 << 20) 182 183 /*----------------------------------------------------------------------- 184 * FLASH and environment organization 185 */ 186 187 /* **** PISMO SUPPORT *** */ 188 /* Monitor at start of flash */ 189 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 190 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ 191 192 #define CONFIG_ENV_OFFSET 0x260000 193 #define CONFIG_ENV_ADDR 0x260000 194 195 #if defined(CONFIG_CMD_NET) 196 #define CONFIG_DRIVER_TI_EMAC 197 #define CONFIG_DRIVER_TI_EMAC_USE_RMII 198 #define CONFIG_MII 199 #define CONFIG_ARP_TIMEOUT 200UL 200 #define CONFIG_NET_RETRY_COUNT 5 201 #endif /* CONFIG_CMD_NET */ 202 203 /* additions for new relocation code, must be added to all boards */ 204 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 205 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 206 #define CONFIG_SYS_INIT_RAM_SIZE 0x800 207 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 208 CONFIG_SYS_INIT_RAM_SIZE - \ 209 GENERATED_GBL_DATA_SIZE) 210 211 /* Status LED */ 212 #define GREEN_LED_GPIO 186 /* CM-T3517 Green LED is GPIO186 */ 213 214 /* Display Configuration */ 215 #define CONFIG_VIDEO_OMAP3 216 #define LCD_BPP LCD_COLOR16 217 218 #define CONFIG_SPLASH_SCREEN 219 #define CONFIG_SPLASHIMAGE_GUARD 220 #define CONFIG_BMP_16BPP 221 #define CONFIG_SCF0403_LCD 222 223 /* EEPROM */ 224 #define CONFIG_ENV_EEPROM_IS_ON_I2C 225 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 226 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 227 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 228 #define CONFIG_SYS_EEPROM_SIZE 256 229 230 #endif /* __CONFIG_H */ 231