xref: /openbmc/u-boot/include/configs/cm_t3517.h (revision d7869b21)
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * (C) Copyright 2013 CompuLab, Ltd.
4  * Author: Igor Grinberg <grinberg@compulab.co.il>
5  *
6  * Configuration settings for the CompuLab CM-T3517 board
7  */
8 
9 #ifndef __CONFIG_H
10 #define __CONFIG_H
11 
12 /*
13  * High Level Configuration Options
14  */
15 #define CONFIG_CM_T3517	/* working with CM-T3517 */
16 
17 /*
18  * This is needed for the DMA stuff.
19  * Although the default iss 64, we still define it
20  * to be on the safe side once the default is changed.
21  */
22 
23 #include <asm/arch/cpu.h>		/* get chip and board defs */
24 #include <asm/arch/omap.h>
25 
26 #define CONFIG_MACH_TYPE                MACH_TYPE_CM_T3517
27 
28 /* Clock Defines */
29 #define V_OSCK			26000000	/* Clock output from T2 */
30 #define V_SCLK			(V_OSCK >> 1)
31 
32 #define CONFIG_MISC_INIT_R
33 
34 /*
35  * The early kernel mapping on ARM currently only maps from the base of DRAM
36  * to the end of the kernel image.  The kernel is loaded at DRAM base + 0x8000.
37  * The early kernel pagetable uses DRAM base + 0x4000 to DRAM base + 0x8000,
38  * so that leaves DRAM base to DRAM base + 0x4000 available.
39  */
40 #define CONFIG_SYS_BOOTMAPSZ	        0x4000
41 
42 #define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
43 #define CONFIG_SETUP_MEMORY_TAGS
44 #define CONFIG_INITRD_TAG
45 #define CONFIG_REVISION_TAG
46 #define CONFIG_SERIAL_TAG
47 
48 /*
49  * Size of malloc() pool
50  */
51 #define CONFIG_ENV_SIZE		(128 << 10)	/* 128 KiB */
52 #define CONFIG_SYS_MALLOC_LEN	(CONFIG_ENV_SIZE + (128 << 10))
53 
54 /*
55  * Hardware drivers
56  */
57 
58 /*
59  * NS16550 Configuration
60  */
61 #define CONFIG_SYS_NS16550_SERIAL
62 #define CONFIG_SYS_NS16550_REG_SIZE	(-4)
63 #define CONFIG_SYS_NS16550_CLK		48000000	/* 48MHz (APLL96/2) */
64 
65 /*
66  * select serial console configuration
67  */
68 #define CONFIG_SYS_NS16550_COM3		OMAP34XX_UART3
69 #define CONFIG_SERIAL3			3	/* UART3 */
70 
71 /* allow to overwrite serial and ethaddr */
72 #define CONFIG_ENV_OVERWRITE
73 #define CONFIG_SYS_BAUDRATE_TABLE	{4800, 9600, 19200, 38400, 57600,\
74 					115200}
75 
76 /* USB */
77 
78 #ifndef CONFIG_USB_MUSB_AM35X
79 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 146
80 #define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 147
81 #endif /* CONFIG_USB_MUSB_AM35X */
82 
83 /* commands to include */
84 
85 #define CONFIG_SYS_I2C
86 #define CONFIG_SYS_I2C_EEPROM_ADDR	0x50
87 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	1
88 #define CONFIG_SYS_I2C_EEPROM_BUS	0
89 #define CONFIG_I2C_MULTI_BUS
90 
91 /*
92  * Board NAND Info.
93  */
94 #define CONFIG_SYS_NAND_BASE		NAND_BASE	/* physical address */
95 							/* to access nand at */
96 							/* CS0 */
97 #define CONFIG_SYS_MAX_NAND_DEVICE	1		/* Max number of NAND */
98 							/* devices */
99 
100 /* Environment information */
101 #define CONFIG_EXTRA_ENV_SETTINGS \
102 	"loadaddr=0x82000000\0" \
103 	"baudrate=115200\0" \
104 	"console=ttyO2,115200n8\0" \
105 	"netretry=yes\0" \
106 	"mpurate=auto\0" \
107 	"vram=12M\0" \
108 	"dvimode=1024x768MR-16@60\0" \
109 	"defaultdisplay=dvi\0" \
110 	"mmcdev=0\0" \
111 	"mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
112 	"mmcrootfstype=ext4\0" \
113 	"nandroot=/dev/mtdblock4 rw\0" \
114 	"nandrootfstype=ubifs\0" \
115 	"mmcargs=setenv bootargs console=${console} " \
116 		"mpurate=${mpurate} " \
117 		"vram=${vram} " \
118 		"omapfb.mode=dvi:${dvimode} " \
119 		"omapdss.def_disp=${defaultdisplay} " \
120 		"root=${mmcroot} " \
121 		"rootfstype=${mmcrootfstype}\0" \
122 	"nandargs=setenv bootargs console=${console} " \
123 		"mpurate=${mpurate} " \
124 		"vram=${vram} " \
125 		"omapfb.mode=dvi:${dvimode} " \
126 		"omapdss.def_disp=${defaultdisplay} " \
127 		"root=${nandroot} " \
128 		"rootfstype=${nandrootfstype}\0" \
129 	"loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
130 	"bootscript=echo Running bootscript from mmc ...; " \
131 		"source ${loadaddr}\0" \
132 	"loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
133 	"mmcboot=echo Booting from mmc ...; " \
134 		"run mmcargs; " \
135 		"bootm ${loadaddr}\0" \
136 	"nandboot=echo Booting from nand ...; " \
137 		"run nandargs; " \
138 		"nand read ${loadaddr} 2a0000 400000; " \
139 		"bootm ${loadaddr}\0" \
140 
141 #define CONFIG_BOOTCOMMAND \
142 	"mmc dev ${mmcdev}; if mmc rescan; then " \
143 		"if run loadbootscript; then " \
144 			"run bootscript; " \
145 		"else " \
146 			"if run loaduimage; then " \
147 				"run mmcboot; " \
148 			"else run nandboot; " \
149 			"fi; " \
150 		"fi; " \
151 	"else run nandboot; fi"
152 
153 /*
154  * Miscellaneous configurable options
155  */
156 #define CONFIG_TIMESTAMP
157 #define CONFIG_SYS_AUTOLOAD		"no"
158 #define CONFIG_SYS_CBSIZE		512	/* Console I/O Buffer Size */
159 #define CONFIG_SYS_MAXARGS		32	/* max number of command args */
160 
161 #define CONFIG_SYS_LOAD_ADDR		(OMAP34XX_SDRC_CS0 + 0x02000000)
162 
163 /*
164  * AM3517 has 12 GP timers, they can be driven by the system clock
165  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
166  * This rate is divided by a local divisor.
167  */
168 #define CONFIG_SYS_TIMERBASE		(OMAP34XX_GPT2)
169 #define CONFIG_SYS_PTV			2       /* Divisor: 2^(PTV+1) => 8 */
170 #define CONFIG_SYS_HZ			1000
171 
172 /*-----------------------------------------------------------------------
173  * Physical Memory Map
174  */
175 #define PHYS_SDRAM_1		OMAP34XX_SDRC_CS0
176 #define CONFIG_SYS_CS0_SIZE		(256 << 20)
177 
178 /*-----------------------------------------------------------------------
179  * FLASH and environment organization
180  */
181 
182 /* **** PISMO SUPPORT *** */
183 /* Monitor at start of flash */
184 #define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_FLASH_BASE
185 #define CONFIG_SYS_MONITOR_LEN		(256 << 10)	/* Reserve 2 sectors */
186 
187 #define CONFIG_ENV_OFFSET		0x260000
188 #define CONFIG_ENV_ADDR			0x260000
189 
190 #if defined(CONFIG_CMD_NET)
191 #define CONFIG_DRIVER_TI_EMAC_USE_RMII
192 #define CONFIG_ARP_TIMEOUT		200UL
193 #define CONFIG_NET_RETRY_COUNT		5
194 #endif /* CONFIG_CMD_NET */
195 
196 /* additions for new relocation code, must be added to all boards */
197 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
198 #define CONFIG_SYS_INIT_RAM_ADDR	0x4020f800
199 #define CONFIG_SYS_INIT_RAM_SIZE	0x800
200 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR +	\
201 					 CONFIG_SYS_INIT_RAM_SIZE -	\
202 					 GENERATED_GBL_DATA_SIZE)
203 
204 /* Status LED */
205 #define GREEN_LED_GPIO			186 /* CM-T3517 Green LED is GPIO186 */
206 
207 /* Display Configuration */
208 #define CONFIG_VIDEO_OMAP3
209 #define LCD_BPP		LCD_COLOR16
210 
211 #define CONFIG_SPLASH_SCREEN
212 #define CONFIG_SPLASHIMAGE_GUARD
213 #define CONFIG_BMP_16BPP
214 #define CONFIG_SCF0403_LCD
215 
216 /* EEPROM */
217 #define CONFIG_ENV_EEPROM_IS_ON_I2C
218 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		1
219 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	4
220 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	5
221 #define CONFIG_SYS_EEPROM_SIZE			256
222 
223 #endif /* __CONFIG_H */
224