1 /* 2 * (C) Copyright 2013 CompuLab, Ltd. 3 * Author: Igor Grinberg <grinberg@compulab.co.il> 4 * 5 * Configuration settings for the CompuLab CM-T3517 board 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #ifndef __CONFIG_H 11 #define __CONFIG_H 12 13 /* 14 * High Level Configuration Options 15 */ 16 #define CONFIG_CM_T3517 /* working with CM-T3517 */ 17 18 /* 19 * This is needed for the DMA stuff. 20 * Although the default iss 64, we still define it 21 * to be on the safe side once the default is changed. 22 */ 23 24 #include <asm/arch/cpu.h> /* get chip and board defs */ 25 #include <asm/arch/omap.h> 26 27 #define CONFIG_MACH_TYPE MACH_TYPE_CM_T3517 28 29 /* Clock Defines */ 30 #define V_OSCK 26000000 /* Clock output from T2 */ 31 #define V_SCLK (V_OSCK >> 1) 32 33 #define CONFIG_MISC_INIT_R 34 35 /* 36 * The early kernel mapping on ARM currently only maps from the base of DRAM 37 * to the end of the kernel image. The kernel is loaded at DRAM base + 0x8000. 38 * The early kernel pagetable uses DRAM base + 0x4000 to DRAM base + 0x8000, 39 * so that leaves DRAM base to DRAM base + 0x4000 available. 40 */ 41 #define CONFIG_SYS_BOOTMAPSZ 0x4000 42 43 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 44 #define CONFIG_SETUP_MEMORY_TAGS 45 #define CONFIG_INITRD_TAG 46 #define CONFIG_REVISION_TAG 47 #define CONFIG_SERIAL_TAG 48 49 /* 50 * Size of malloc() pool 51 */ 52 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ 53 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10)) 54 55 /* 56 * Hardware drivers 57 */ 58 59 /* 60 * NS16550 Configuration 61 */ 62 #define CONFIG_SYS_NS16550_SERIAL 63 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 64 #define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ 65 66 /* 67 * select serial console configuration 68 */ 69 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 70 #define CONFIG_SERIAL3 3 /* UART3 */ 71 72 /* allow to overwrite serial and ethaddr */ 73 #define CONFIG_ENV_OVERWRITE 74 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 75 115200} 76 77 /* USB */ 78 79 #ifndef CONFIG_USB_MUSB_AM35X 80 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 146 81 #define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 147 82 #endif /* CONFIG_USB_MUSB_AM35X */ 83 84 /* commands to include */ 85 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ 86 #define CONFIG_MTD_PARTITIONS 87 88 #define CONFIG_SYS_I2C 89 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 90 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 91 #define CONFIG_SYS_I2C_EEPROM_BUS 0 92 #define CONFIG_I2C_MULTI_BUS 93 94 /* 95 * Board NAND Info. 96 */ 97 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ 98 /* to access nand */ 99 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ 100 /* to access nand at */ 101 /* CS0 */ 102 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ 103 /* devices */ 104 105 /* Environment information */ 106 #define CONFIG_EXTRA_ENV_SETTINGS \ 107 "loadaddr=0x82000000\0" \ 108 "baudrate=115200\0" \ 109 "console=ttyO2,115200n8\0" \ 110 "netretry=yes\0" \ 111 "mpurate=auto\0" \ 112 "vram=12M\0" \ 113 "dvimode=1024x768MR-16@60\0" \ 114 "defaultdisplay=dvi\0" \ 115 "mmcdev=0\0" \ 116 "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \ 117 "mmcrootfstype=ext4\0" \ 118 "nandroot=/dev/mtdblock4 rw\0" \ 119 "nandrootfstype=ubifs\0" \ 120 "mmcargs=setenv bootargs console=${console} " \ 121 "mpurate=${mpurate} " \ 122 "vram=${vram} " \ 123 "omapfb.mode=dvi:${dvimode} " \ 124 "omapdss.def_disp=${defaultdisplay} " \ 125 "root=${mmcroot} " \ 126 "rootfstype=${mmcrootfstype}\0" \ 127 "nandargs=setenv bootargs console=${console} " \ 128 "mpurate=${mpurate} " \ 129 "vram=${vram} " \ 130 "omapfb.mode=dvi:${dvimode} " \ 131 "omapdss.def_disp=${defaultdisplay} " \ 132 "root=${nandroot} " \ 133 "rootfstype=${nandrootfstype}\0" \ 134 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ 135 "bootscript=echo Running bootscript from mmc ...; " \ 136 "source ${loadaddr}\0" \ 137 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ 138 "mmcboot=echo Booting from mmc ...; " \ 139 "run mmcargs; " \ 140 "bootm ${loadaddr}\0" \ 141 "nandboot=echo Booting from nand ...; " \ 142 "run nandargs; " \ 143 "nand read ${loadaddr} 2a0000 400000; " \ 144 "bootm ${loadaddr}\0" \ 145 146 #define CONFIG_BOOTCOMMAND \ 147 "mmc dev ${mmcdev}; if mmc rescan; then " \ 148 "if run loadbootscript; then " \ 149 "run bootscript; " \ 150 "else " \ 151 "if run loaduimage; then " \ 152 "run mmcboot; " \ 153 "else run nandboot; " \ 154 "fi; " \ 155 "fi; " \ 156 "else run nandboot; fi" 157 158 /* 159 * Miscellaneous configurable options 160 */ 161 #define CONFIG_TIMESTAMP 162 #define CONFIG_SYS_AUTOLOAD "no" 163 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ 164 #define CONFIG_SYS_MAXARGS 32 /* max number of command args */ 165 166 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0 + 0x02000000) 167 168 /* 169 * AM3517 has 12 GP timers, they can be driven by the system clock 170 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 171 * This rate is divided by a local divisor. 172 */ 173 #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) 174 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 175 #define CONFIG_SYS_HZ 1000 176 177 /*----------------------------------------------------------------------- 178 * Physical Memory Map 179 */ 180 #define CONFIG_NR_DRAM_BANKS 1 /* CM-T3517 DRAM is only on CS0 */ 181 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 182 #define CONFIG_SYS_CS0_SIZE (256 << 20) 183 184 /*----------------------------------------------------------------------- 185 * FLASH and environment organization 186 */ 187 188 /* **** PISMO SUPPORT *** */ 189 /* Monitor at start of flash */ 190 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 191 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ 192 193 #define CONFIG_ENV_OFFSET 0x260000 194 #define CONFIG_ENV_ADDR 0x260000 195 196 #if defined(CONFIG_CMD_NET) 197 #define CONFIG_DRIVER_TI_EMAC 198 #define CONFIG_DRIVER_TI_EMAC_USE_RMII 199 #define CONFIG_MII 200 #define CONFIG_ARP_TIMEOUT 200UL 201 #define CONFIG_NET_RETRY_COUNT 5 202 #endif /* CONFIG_CMD_NET */ 203 204 /* additions for new relocation code, must be added to all boards */ 205 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 206 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 207 #define CONFIG_SYS_INIT_RAM_SIZE 0x800 208 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 209 CONFIG_SYS_INIT_RAM_SIZE - \ 210 GENERATED_GBL_DATA_SIZE) 211 212 /* Status LED */ 213 #define GREEN_LED_GPIO 186 /* CM-T3517 Green LED is GPIO186 */ 214 215 /* Display Configuration */ 216 #define CONFIG_VIDEO_OMAP3 217 #define LCD_BPP LCD_COLOR16 218 219 #define CONFIG_SPLASH_SCREEN 220 #define CONFIG_SPLASHIMAGE_GUARD 221 #define CONFIG_BMP_16BPP 222 #define CONFIG_SCF0403_LCD 223 224 /* EEPROM */ 225 #define CONFIG_ENV_EEPROM_IS_ON_I2C 226 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 227 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 228 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 229 #define CONFIG_SYS_EEPROM_SIZE 256 230 231 #endif /* __CONFIG_H */ 232