xref: /openbmc/u-boot/include/configs/cm_t3517.h (revision 92a1babf)
1 /*
2  * (C) Copyright 2013 CompuLab, Ltd.
3  * Author: Igor Grinberg <grinberg@compulab.co.il>
4  *
5  * Configuration settings for the CompuLab CM-T3517 board
6  *
7  * SPDX-License-Identifier:	GPL-2.0+
8  */
9 
10 #ifndef __CONFIG_H
11 #define __CONFIG_H
12 
13 /*
14  * High Level Configuration Options
15  */
16 #define CONFIG_OMAP	/* in a TI OMAP core */
17 #define CONFIG_CM_T3517	/* working with CM-T3517 */
18 /* Common ARM Erratas */
19 #define CONFIG_ARM_ERRATA_454179
20 #define CONFIG_ARM_ERRATA_430973
21 #define CONFIG_ARM_ERRATA_621766
22 
23 #define CONFIG_SYS_TEXT_BASE	0x80008000
24 
25 /*
26  * This is needed for the DMA stuff.
27  * Although the default iss 64, we still define it
28  * to be on the safe side once the default is changed.
29  */
30 
31 #define CONFIG_EMIF4	/* The chip has EMIF4 controller */
32 
33 #include <asm/arch/cpu.h>		/* get chip and board defs */
34 #include <asm/arch/omap.h>
35 
36 #define CONFIG_MACH_TYPE                MACH_TYPE_CM_T3517
37 
38 /* Clock Defines */
39 #define V_OSCK			26000000	/* Clock output from T2 */
40 #define V_SCLK			(V_OSCK >> 1)
41 
42 #define CONFIG_MISC_INIT_R
43 
44 /*
45  * The early kernel mapping on ARM currently only maps from the base of DRAM
46  * to the end of the kernel image.  The kernel is loaded at DRAM base + 0x8000.
47  * The early kernel pagetable uses DRAM base + 0x4000 to DRAM base + 0x8000,
48  * so that leaves DRAM base to DRAM base + 0x4000 available.
49  */
50 #define CONFIG_SYS_BOOTMAPSZ	        0x4000
51 
52 #define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
53 #define CONFIG_SETUP_MEMORY_TAGS
54 #define CONFIG_INITRD_TAG
55 #define CONFIG_REVISION_TAG
56 #define CONFIG_SERIAL_TAG
57 
58 /*
59  * Size of malloc() pool
60  */
61 #define CONFIG_ENV_SIZE		(128 << 10)	/* 128 KiB */
62 #define CONFIG_SYS_MALLOC_LEN	(CONFIG_ENV_SIZE + (128 << 10))
63 
64 /*
65  * Hardware drivers
66  */
67 
68 /*
69  * NS16550 Configuration
70  */
71 #define CONFIG_SYS_NS16550_SERIAL
72 #define CONFIG_SYS_NS16550_REG_SIZE	(-4)
73 #define CONFIG_SYS_NS16550_CLK		48000000	/* 48MHz (APLL96/2) */
74 
75 /*
76  * select serial console configuration
77  */
78 #define CONFIG_CONS_INDEX		3
79 #define CONFIG_SYS_NS16550_COM3		OMAP34XX_UART3
80 #define CONFIG_SERIAL3			3	/* UART3 */
81 
82 /* allow to overwrite serial and ethaddr */
83 #define CONFIG_ENV_OVERWRITE
84 #define CONFIG_BAUDRATE			115200
85 #define CONFIG_SYS_BAUDRATE_TABLE	{4800, 9600, 19200, 38400, 57600,\
86 					115200}
87 
88 #define CONFIG_OMAP_GPIO
89 
90 #define CONFIG_GENERIC_MMC
91 
92 /* USB */
93 #define CONFIG_USB_MUSB_AM35X
94 
95 #ifndef CONFIG_USB_MUSB_AM35X
96 #define CONFIG_USB_OMAP3
97 #define CONFIG_USB_EHCI
98 #define CONFIG_USB_EHCI_OMAP
99 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 146
100 #define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 147
101 #else /* !CONFIG_USB_MUSB_AM35X */
102 #define CONFIG_USB_MUSB_PIO_ONLY
103 #endif /* CONFIG_USB_MUSB_AM35X */
104 
105 /* commands to include */
106 #define CONFIG_CMD_MTDPARTS	/* Enable MTD parts commands */
107 #define CONFIG_MTD_DEVICE	/* needed for mtdparts commands */
108 #define CONFIG_MTD_PARTITIONS
109 #define MTDIDS_DEFAULT		"nand0=nand"
110 #define MTDPARTS_DEFAULT	"mtdparts=nand:512k(x-loader),"\
111 				"1920k(u-boot),256k(u-boot-env),"\
112 				"4m(kernel),-(fs)"
113 
114 #define CONFIG_CMD_NAND		/* NAND support			*/
115 
116 #define CONFIG_SYS_NO_FLASH
117 #define CONFIG_SYS_I2C
118 #define CONFIG_SYS_OMAP24_I2C_SPEED	400000
119 #define CONFIG_SYS_OMAP24_I2C_SLAVE	1
120 #define CONFIG_SYS_I2C_OMAP34XX
121 #define CONFIG_SYS_I2C_EEPROM_ADDR	0x50
122 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	1
123 #define CONFIG_SYS_I2C_EEPROM_BUS	0
124 #define CONFIG_I2C_MULTI_BUS
125 
126 /*
127  * Board NAND Info.
128  */
129 #define CONFIG_NAND_OMAP_GPMC
130 #define CONFIG_SYS_NAND_ADDR		NAND_BASE	/* physical address */
131 							/* to access nand */
132 #define CONFIG_SYS_NAND_BASE		NAND_BASE	/* physical address */
133 							/* to access nand at */
134 							/* CS0 */
135 #define CONFIG_SYS_MAX_NAND_DEVICE	1		/* Max number of NAND */
136 							/* devices */
137 
138 /* Environment information */
139 #define CONFIG_EXTRA_ENV_SETTINGS \
140 	"loadaddr=0x82000000\0" \
141 	"baudrate=115200\0" \
142 	"console=ttyO2,115200n8\0" \
143 	"netretry=yes\0" \
144 	"mpurate=auto\0" \
145 	"vram=12M\0" \
146 	"dvimode=1024x768MR-16@60\0" \
147 	"defaultdisplay=dvi\0" \
148 	"mmcdev=0\0" \
149 	"mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
150 	"mmcrootfstype=ext4\0" \
151 	"nandroot=/dev/mtdblock4 rw\0" \
152 	"nandrootfstype=ubifs\0" \
153 	"mmcargs=setenv bootargs console=${console} " \
154 		"mpurate=${mpurate} " \
155 		"vram=${vram} " \
156 		"omapfb.mode=dvi:${dvimode} " \
157 		"omapdss.def_disp=${defaultdisplay} " \
158 		"root=${mmcroot} " \
159 		"rootfstype=${mmcrootfstype}\0" \
160 	"nandargs=setenv bootargs console=${console} " \
161 		"mpurate=${mpurate} " \
162 		"vram=${vram} " \
163 		"omapfb.mode=dvi:${dvimode} " \
164 		"omapdss.def_disp=${defaultdisplay} " \
165 		"root=${nandroot} " \
166 		"rootfstype=${nandrootfstype}\0" \
167 	"loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
168 	"bootscript=echo Running bootscript from mmc ...; " \
169 		"source ${loadaddr}\0" \
170 	"loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
171 	"mmcboot=echo Booting from mmc ...; " \
172 		"run mmcargs; " \
173 		"bootm ${loadaddr}\0" \
174 	"nandboot=echo Booting from nand ...; " \
175 		"run nandargs; " \
176 		"nand read ${loadaddr} 2a0000 400000; " \
177 		"bootm ${loadaddr}\0" \
178 
179 #define CONFIG_BOOTCOMMAND \
180 	"mmc dev ${mmcdev}; if mmc rescan; then " \
181 		"if run loadbootscript; then " \
182 			"run bootscript; " \
183 		"else " \
184 			"if run loaduimage; then " \
185 				"run mmcboot; " \
186 			"else run nandboot; " \
187 			"fi; " \
188 		"fi; " \
189 	"else run nandboot; fi"
190 
191 /*
192  * Miscellaneous configurable options
193  */
194 #define CONFIG_AUTO_COMPLETE
195 #define CONFIG_CMDLINE_EDITING
196 #define CONFIG_TIMESTAMP
197 #define CONFIG_SYS_AUTOLOAD		"no"
198 #define CONFIG_SYS_LONGHELP		/* undef to save memory */
199 #define CONFIG_SYS_CBSIZE		512	/* Console I/O Buffer Size */
200 /* Print Buffer Size */
201 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
202 					sizeof(CONFIG_SYS_PROMPT) + 16)
203 #define CONFIG_SYS_MAXARGS		32	/* max number of command args */
204 /* Boot Argument Buffer Size */
205 #define CONFIG_SYS_BARGSIZE		(CONFIG_SYS_CBSIZE)
206 
207 #define CONFIG_SYS_LOAD_ADDR		(OMAP34XX_SDRC_CS0 + 0x02000000)
208 
209 /*
210  * AM3517 has 12 GP timers, they can be driven by the system clock
211  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
212  * This rate is divided by a local divisor.
213  */
214 #define CONFIG_SYS_TIMERBASE		(OMAP34XX_GPT2)
215 #define CONFIG_SYS_PTV			2       /* Divisor: 2^(PTV+1) => 8 */
216 #define CONFIG_SYS_HZ			1000
217 
218 /*-----------------------------------------------------------------------
219  * Physical Memory Map
220  */
221 #define CONFIG_NR_DRAM_BANKS	1	/* CM-T3517 DRAM is only on CS0 */
222 #define PHYS_SDRAM_1		OMAP34XX_SDRC_CS0
223 #define CONFIG_SYS_CS0_SIZE		(256 << 20)
224 
225 /*-----------------------------------------------------------------------
226  * FLASH and environment organization
227  */
228 
229 /* **** PISMO SUPPORT *** */
230 /* Monitor at start of flash */
231 #define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_FLASH_BASE
232 #define CONFIG_SYS_MONITOR_LEN		(256 << 10)	/* Reserve 2 sectors */
233 
234 #define CONFIG_ENV_IS_IN_NAND
235 #define SMNAND_ENV_OFFSET		0x260000 /* environment starts here */
236 #define CONFIG_ENV_OFFSET		SMNAND_ENV_OFFSET
237 #define CONFIG_ENV_ADDR			SMNAND_ENV_OFFSET
238 
239 #if defined(CONFIG_CMD_NET)
240 #define CONFIG_DRIVER_TI_EMAC
241 #define CONFIG_DRIVER_TI_EMAC_USE_RMII
242 #define CONFIG_MII
243 #define CONFIG_SMC911X
244 #define CONFIG_SMC911X_32_BIT
245 #define CONFIG_SMC911X_BASE	(0x2C000000 + (16 << 20))
246 #define CONFIG_ARP_TIMEOUT		200UL
247 #define CONFIG_NET_RETRY_COUNT		5
248 #endif /* CONFIG_CMD_NET */
249 
250 /* additions for new relocation code, must be added to all boards */
251 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
252 #define CONFIG_SYS_INIT_RAM_ADDR	0x4020f800
253 #define CONFIG_SYS_INIT_RAM_SIZE	0x800
254 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR +	\
255 					 CONFIG_SYS_INIT_RAM_SIZE -	\
256 					 GENERATED_GBL_DATA_SIZE)
257 
258 /* Status LED */
259 #define GREEN_LED_GPIO			186 /* CM-T3517 Green LED is GPIO186 */
260 
261 /* GPIO banks */
262 #ifdef CONFIG_LED_STATUS
263 #define CONFIG_OMAP3_GPIO_6	/* GPIO186 is in GPIO bank 6  */
264 #endif
265 
266 /* Display Configuration */
267 #define CONFIG_OMAP3_GPIO_2
268 #define CONFIG_OMAP3_GPIO_5
269 #define CONFIG_VIDEO_OMAP3
270 #define LCD_BPP		LCD_COLOR16
271 
272 #define CONFIG_SPLASH_SCREEN
273 #define CONFIG_SPLASHIMAGE_GUARD
274 #define CONFIG_CMD_BMP
275 #define CONFIG_BMP_16BPP
276 #define CONFIG_SCF0403_LCD
277 
278 #define CONFIG_OMAP3_SPI
279 
280 /* EEPROM */
281 #define CONFIG_CMD_EEPROM
282 #define CONFIG_ENV_EEPROM_IS_ON_I2C
283 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		1
284 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	4
285 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	5
286 #define CONFIG_SYS_EEPROM_SIZE			256
287 
288 #define CONFIG_CMD_EEPROM_LAYOUT
289 #define CONFIG_EEPROM_LAYOUT_HELP_STRING "v1, v2, v3"
290 
291 #endif /* __CONFIG_H */
292