xref: /openbmc/u-boot/include/configs/cm_t3517.h (revision 8b7d51249eca113c4965a7c417f33d7eb569434b)
1 /*
2  * (C) Copyright 2013 CompuLab, Ltd.
3  * Author: Igor Grinberg <grinberg@compulab.co.il>
4  *
5  * Configuration settings for the CompuLab CM-T3517 board
6  *
7  * SPDX-License-Identifier:	GPL-2.0+
8  */
9 
10 #ifndef __CONFIG_H
11 #define __CONFIG_H
12 
13 /*
14  * High Level Configuration Options
15  */
16 #define CONFIG_OMAP	/* in a TI OMAP core */
17 #define CONFIG_CM_T3517	/* working with CM-T3517 */
18 #define CONFIG_OMAP_COMMON
19 /* Common ARM Erratas */
20 #define CONFIG_ARM_ERRATA_454179
21 #define CONFIG_ARM_ERRATA_430973
22 #define CONFIG_ARM_ERRATA_621766
23 
24 #define CONFIG_SYS_TEXT_BASE	0x80008000
25 
26 /*
27  * This is needed for the DMA stuff.
28  * Although the default iss 64, we still define it
29  * to be on the safe side once the default is changed.
30  */
31 
32 #define CONFIG_EMIF4	/* The chip has EMIF4 controller */
33 
34 #include <asm/arch/cpu.h>		/* get chip and board defs */
35 #include <asm/arch/omap.h>
36 
37 #define CONFIG_MACH_TYPE                MACH_TYPE_CM_T3517
38 
39 /*
40  * Display CPU and Board information
41  */
42 #define CONFIG_DISPLAY_CPUINFO
43 #define CONFIG_DISPLAY_BOARDINFO
44 
45 /* Clock Defines */
46 #define V_OSCK			26000000	/* Clock output from T2 */
47 #define V_SCLK			(V_OSCK >> 1)
48 
49 #define CONFIG_MISC_INIT_R
50 
51 /*
52  * The early kernel mapping on ARM currently only maps from the base of DRAM
53  * to the end of the kernel image.  The kernel is loaded at DRAM base + 0x8000.
54  * The early kernel pagetable uses DRAM base + 0x4000 to DRAM base + 0x8000,
55  * so that leaves DRAM base to DRAM base + 0x4000 available.
56  */
57 #define CONFIG_SYS_BOOTMAPSZ	        0x4000
58 
59 #define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
60 #define CONFIG_SETUP_MEMORY_TAGS
61 #define CONFIG_INITRD_TAG
62 #define CONFIG_REVISION_TAG
63 #define CONFIG_SERIAL_TAG
64 
65 /*
66  * Size of malloc() pool
67  */
68 #define CONFIG_ENV_SIZE		(128 << 10)	/* 128 KiB */
69 #define CONFIG_SYS_MALLOC_LEN	(CONFIG_ENV_SIZE + (128 << 10))
70 
71 /*
72  * Hardware drivers
73  */
74 
75 /*
76  * NS16550 Configuration
77  */
78 #define CONFIG_SYS_NS16550_SERIAL
79 #define CONFIG_SYS_NS16550_REG_SIZE	(-4)
80 #define CONFIG_SYS_NS16550_CLK		48000000	/* 48MHz (APLL96/2) */
81 
82 /*
83  * select serial console configuration
84  */
85 #define CONFIG_CONS_INDEX		3
86 #define CONFIG_SYS_NS16550_COM3		OMAP34XX_UART3
87 #define CONFIG_SERIAL3			3	/* UART3 */
88 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
89 
90 /* allow to overwrite serial and ethaddr */
91 #define CONFIG_ENV_OVERWRITE
92 #define CONFIG_BAUDRATE			115200
93 #define CONFIG_SYS_BAUDRATE_TABLE	{4800, 9600, 19200, 38400, 57600,\
94 					115200}
95 
96 #define CONFIG_OMAP_GPIO
97 
98 #define CONFIG_GENERIC_MMC
99 #define CONFIG_MMC
100 #define CONFIG_OMAP_HSMMC
101 #define CONFIG_DOS_PARTITION
102 
103 /* USB */
104 #define CONFIG_USB_MUSB_AM35X
105 
106 #ifndef CONFIG_USB_MUSB_AM35X
107 #define CONFIG_USB_OMAP3
108 #define CONFIG_USB_EHCI
109 #define CONFIG_USB_EHCI_OMAP
110 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 146
111 #define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 147
112 #else /* !CONFIG_USB_MUSB_AM35X */
113 #define CONFIG_USB_MUSB_PIO_ONLY
114 #endif /* CONFIG_USB_MUSB_AM35X */
115 
116 #define CONFIG_USB_STORAGE
117 
118 /* commands to include */
119 #define CONFIG_CMD_MTDPARTS	/* Enable MTD parts commands */
120 #define CONFIG_MTD_DEVICE	/* needed for mtdparts commands */
121 #define CONFIG_MTD_PARTITIONS
122 #define MTDIDS_DEFAULT		"nand0=nand"
123 #define MTDPARTS_DEFAULT	"mtdparts=nand:512k(x-loader),"\
124 				"1920k(u-boot),256k(u-boot-env),"\
125 				"4m(kernel),-(fs)"
126 
127 #define CONFIG_CMD_NAND		/* NAND support			*/
128 
129 #define CONFIG_SYS_NO_FLASH
130 #define CONFIG_SYS_I2C
131 #define CONFIG_SYS_OMAP24_I2C_SPEED	400000
132 #define CONFIG_SYS_OMAP24_I2C_SLAVE	1
133 #define CONFIG_SYS_I2C_OMAP34XX
134 #define CONFIG_SYS_I2C_EEPROM_ADDR	0x50
135 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	1
136 #define CONFIG_SYS_I2C_EEPROM_BUS	0
137 #define CONFIG_I2C_MULTI_BUS
138 
139 /*
140  * Board NAND Info.
141  */
142 #define CONFIG_NAND_OMAP_GPMC
143 #define CONFIG_SYS_NAND_ADDR		NAND_BASE	/* physical address */
144 							/* to access nand */
145 #define CONFIG_SYS_NAND_BASE		NAND_BASE	/* physical address */
146 							/* to access nand at */
147 							/* CS0 */
148 #define CONFIG_SYS_MAX_NAND_DEVICE	1		/* Max number of NAND */
149 							/* devices */
150 
151 /* Environment information */
152 #define CONFIG_EXTRA_ENV_SETTINGS \
153 	"loadaddr=0x82000000\0" \
154 	"baudrate=115200\0" \
155 	"console=ttyO2,115200n8\0" \
156 	"netretry=yes\0" \
157 	"mpurate=auto\0" \
158 	"vram=12M\0" \
159 	"dvimode=1024x768MR-16@60\0" \
160 	"defaultdisplay=dvi\0" \
161 	"mmcdev=0\0" \
162 	"mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
163 	"mmcrootfstype=ext4\0" \
164 	"nandroot=/dev/mtdblock4 rw\0" \
165 	"nandrootfstype=ubifs\0" \
166 	"mmcargs=setenv bootargs console=${console} " \
167 		"mpurate=${mpurate} " \
168 		"vram=${vram} " \
169 		"omapfb.mode=dvi:${dvimode} " \
170 		"omapdss.def_disp=${defaultdisplay} " \
171 		"root=${mmcroot} " \
172 		"rootfstype=${mmcrootfstype}\0" \
173 	"nandargs=setenv bootargs console=${console} " \
174 		"mpurate=${mpurate} " \
175 		"vram=${vram} " \
176 		"omapfb.mode=dvi:${dvimode} " \
177 		"omapdss.def_disp=${defaultdisplay} " \
178 		"root=${nandroot} " \
179 		"rootfstype=${nandrootfstype}\0" \
180 	"loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
181 	"bootscript=echo Running bootscript from mmc ...; " \
182 		"source ${loadaddr}\0" \
183 	"loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
184 	"mmcboot=echo Booting from mmc ...; " \
185 		"run mmcargs; " \
186 		"bootm ${loadaddr}\0" \
187 	"nandboot=echo Booting from nand ...; " \
188 		"run nandargs; " \
189 		"nand read ${loadaddr} 2a0000 400000; " \
190 		"bootm ${loadaddr}\0" \
191 
192 #define CONFIG_BOOTCOMMAND \
193 	"mmc dev ${mmcdev}; if mmc rescan; then " \
194 		"if run loadbootscript; then " \
195 			"run bootscript; " \
196 		"else " \
197 			"if run loaduimage; then " \
198 				"run mmcboot; " \
199 			"else run nandboot; " \
200 			"fi; " \
201 		"fi; " \
202 	"else run nandboot; fi"
203 
204 /*
205  * Miscellaneous configurable options
206  */
207 #define CONFIG_AUTO_COMPLETE
208 #define CONFIG_CMDLINE_EDITING
209 #define CONFIG_TIMESTAMP
210 #define CONFIG_SYS_AUTOLOAD		"no"
211 #define CONFIG_SYS_LONGHELP		/* undef to save memory */
212 #define CONFIG_SYS_CBSIZE		512	/* Console I/O Buffer Size */
213 /* Print Buffer Size */
214 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
215 					sizeof(CONFIG_SYS_PROMPT) + 16)
216 #define CONFIG_SYS_MAXARGS		32	/* max number of command args */
217 /* Boot Argument Buffer Size */
218 #define CONFIG_SYS_BARGSIZE		(CONFIG_SYS_CBSIZE)
219 
220 #define CONFIG_SYS_LOAD_ADDR		(OMAP34XX_SDRC_CS0 + 0x02000000)
221 
222 /*
223  * AM3517 has 12 GP timers, they can be driven by the system clock
224  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
225  * This rate is divided by a local divisor.
226  */
227 #define CONFIG_SYS_TIMERBASE		(OMAP34XX_GPT2)
228 #define CONFIG_SYS_PTV			2       /* Divisor: 2^(PTV+1) => 8 */
229 #define CONFIG_SYS_HZ			1000
230 
231 /*-----------------------------------------------------------------------
232  * Physical Memory Map
233  */
234 #define CONFIG_NR_DRAM_BANKS	1	/* CM-T3517 DRAM is only on CS0 */
235 #define PHYS_SDRAM_1		OMAP34XX_SDRC_CS0
236 #define CONFIG_SYS_CS0_SIZE		(256 << 20)
237 
238 /*-----------------------------------------------------------------------
239  * FLASH and environment organization
240  */
241 
242 /* **** PISMO SUPPORT *** */
243 /* Monitor at start of flash */
244 #define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_FLASH_BASE
245 #define CONFIG_SYS_MONITOR_LEN		(256 << 10)	/* Reserve 2 sectors */
246 
247 #define CONFIG_ENV_IS_IN_NAND
248 #define SMNAND_ENV_OFFSET		0x260000 /* environment starts here */
249 #define CONFIG_ENV_OFFSET		SMNAND_ENV_OFFSET
250 #define CONFIG_ENV_ADDR			SMNAND_ENV_OFFSET
251 
252 #if defined(CONFIG_CMD_NET)
253 #define CONFIG_DRIVER_TI_EMAC
254 #define CONFIG_DRIVER_TI_EMAC_USE_RMII
255 #define CONFIG_MII
256 #define CONFIG_SMC911X
257 #define CONFIG_SMC911X_32_BIT
258 #define CONFIG_SMC911X_BASE	(0x2C000000 + (16 << 20))
259 #define CONFIG_ARP_TIMEOUT		200UL
260 #define CONFIG_NET_RETRY_COUNT		5
261 #endif /* CONFIG_CMD_NET */
262 
263 /* additions for new relocation code, must be added to all boards */
264 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
265 #define CONFIG_SYS_INIT_RAM_ADDR	0x4020f800
266 #define CONFIG_SYS_INIT_RAM_SIZE	0x800
267 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR +	\
268 					 CONFIG_SYS_INIT_RAM_SIZE -	\
269 					 GENERATED_GBL_DATA_SIZE)
270 
271 /* Status LED */
272 #define CONFIG_STATUS_LED		/* Status LED enabled */
273 #define CONFIG_BOARD_SPECIFIC_LED
274 #define CONFIG_GPIO_LED
275 #define GREEN_LED_GPIO			186 /* CM-T3517 Green LED is GPIO186 */
276 #define GREEN_LED_DEV			0
277 #define STATUS_LED_BIT			GREEN_LED_GPIO
278 #define STATUS_LED_STATE		STATUS_LED_ON
279 #define STATUS_LED_PERIOD		(CONFIG_SYS_HZ / 2)
280 #define STATUS_LED_BOOT			GREEN_LED_DEV
281 
282 /* GPIO banks */
283 #ifdef CONFIG_STATUS_LED
284 #define CONFIG_OMAP3_GPIO_6	/* GPIO186 is in GPIO bank 6  */
285 #endif
286 
287 /* Display Configuration */
288 #define CONFIG_OMAP3_GPIO_2
289 #define CONFIG_OMAP3_GPIO_5
290 #define CONFIG_VIDEO_OMAP3
291 #define LCD_BPP		LCD_COLOR16
292 
293 #define CONFIG_LCD
294 #define CONFIG_SPLASH_SCREEN
295 #define CONFIG_SPLASHIMAGE_GUARD
296 #define CONFIG_CMD_BMP
297 #define CONFIG_BMP_16BPP
298 #define CONFIG_SCF0403_LCD
299 
300 #define CONFIG_OMAP3_SPI
301 
302 /* EEPROM */
303 #define CONFIG_CMD_EEPROM
304 #define CONFIG_ENV_EEPROM_IS_ON_I2C
305 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		1
306 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	4
307 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	5
308 #define CONFIG_SYS_EEPROM_SIZE			256
309 
310 #define CONFIG_CMD_EEPROM_LAYOUT
311 #define CONFIG_EEPROM_LAYOUT_HELP_STRING "v1, v2, v3"
312 
313 #endif /* __CONFIG_H */
314