xref: /openbmc/u-boot/include/configs/cm_t3517.h (revision 3cd084d3)
1 /*
2  * (C) Copyright 2013 CompuLab, Ltd.
3  * Author: Igor Grinberg <grinberg@compulab.co.il>
4  *
5  * Configuration settings for the CompuLab CM-T3517 board
6  *
7  * SPDX-License-Identifier:	GPL-2.0+
8  */
9 
10 #ifndef __CONFIG_H
11 #define __CONFIG_H
12 
13 /*
14  * High Level Configuration Options
15  */
16 #define CONFIG_CM_T3517	/* working with CM-T3517 */
17 
18 #define CONFIG_SYS_TEXT_BASE	0x80008000
19 
20 /*
21  * This is needed for the DMA stuff.
22  * Although the default iss 64, we still define it
23  * to be on the safe side once the default is changed.
24  */
25 
26 #include <asm/arch/cpu.h>		/* get chip and board defs */
27 #include <asm/arch/omap.h>
28 
29 #define CONFIG_MACH_TYPE                MACH_TYPE_CM_T3517
30 
31 /* Clock Defines */
32 #define V_OSCK			26000000	/* Clock output from T2 */
33 #define V_SCLK			(V_OSCK >> 1)
34 
35 #define CONFIG_MISC_INIT_R
36 
37 /*
38  * The early kernel mapping on ARM currently only maps from the base of DRAM
39  * to the end of the kernel image.  The kernel is loaded at DRAM base + 0x8000.
40  * The early kernel pagetable uses DRAM base + 0x4000 to DRAM base + 0x8000,
41  * so that leaves DRAM base to DRAM base + 0x4000 available.
42  */
43 #define CONFIG_SYS_BOOTMAPSZ	        0x4000
44 
45 #define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
46 #define CONFIG_SETUP_MEMORY_TAGS
47 #define CONFIG_INITRD_TAG
48 #define CONFIG_REVISION_TAG
49 #define CONFIG_SERIAL_TAG
50 
51 /*
52  * Size of malloc() pool
53  */
54 #define CONFIG_ENV_SIZE		(128 << 10)	/* 128 KiB */
55 #define CONFIG_SYS_MALLOC_LEN	(CONFIG_ENV_SIZE + (128 << 10))
56 
57 /*
58  * Hardware drivers
59  */
60 
61 /*
62  * NS16550 Configuration
63  */
64 #define CONFIG_SYS_NS16550_SERIAL
65 #define CONFIG_SYS_NS16550_REG_SIZE	(-4)
66 #define CONFIG_SYS_NS16550_CLK		48000000	/* 48MHz (APLL96/2) */
67 
68 /*
69  * select serial console configuration
70  */
71 #define CONFIG_CONS_INDEX		3
72 #define CONFIG_SYS_NS16550_COM3		OMAP34XX_UART3
73 #define CONFIG_SERIAL3			3	/* UART3 */
74 
75 /* allow to overwrite serial and ethaddr */
76 #define CONFIG_ENV_OVERWRITE
77 #define CONFIG_SYS_BAUDRATE_TABLE	{4800, 9600, 19200, 38400, 57600,\
78 					115200}
79 
80 /* USB */
81 
82 #ifndef CONFIG_USB_MUSB_AM35X
83 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 146
84 #define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 147
85 #endif /* CONFIG_USB_MUSB_AM35X */
86 
87 /* commands to include */
88 #define CONFIG_MTD_DEVICE	/* needed for mtdparts commands */
89 #define CONFIG_MTD_PARTITIONS
90 
91 #define CONFIG_SYS_I2C
92 #define CONFIG_SYS_OMAP24_I2C_SPEED	400000
93 #define CONFIG_SYS_OMAP24_I2C_SLAVE	1
94 #define CONFIG_SYS_I2C_EEPROM_ADDR	0x50
95 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	1
96 #define CONFIG_SYS_I2C_EEPROM_BUS	0
97 #define CONFIG_I2C_MULTI_BUS
98 
99 /*
100  * Board NAND Info.
101  */
102 #define CONFIG_SYS_NAND_ADDR		NAND_BASE	/* physical address */
103 							/* to access nand */
104 #define CONFIG_SYS_NAND_BASE		NAND_BASE	/* physical address */
105 							/* to access nand at */
106 							/* CS0 */
107 #define CONFIG_SYS_MAX_NAND_DEVICE	1		/* Max number of NAND */
108 							/* devices */
109 
110 /* Environment information */
111 #define CONFIG_EXTRA_ENV_SETTINGS \
112 	"loadaddr=0x82000000\0" \
113 	"baudrate=115200\0" \
114 	"console=ttyO2,115200n8\0" \
115 	"netretry=yes\0" \
116 	"mpurate=auto\0" \
117 	"vram=12M\0" \
118 	"dvimode=1024x768MR-16@60\0" \
119 	"defaultdisplay=dvi\0" \
120 	"mmcdev=0\0" \
121 	"mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
122 	"mmcrootfstype=ext4\0" \
123 	"nandroot=/dev/mtdblock4 rw\0" \
124 	"nandrootfstype=ubifs\0" \
125 	"mmcargs=setenv bootargs console=${console} " \
126 		"mpurate=${mpurate} " \
127 		"vram=${vram} " \
128 		"omapfb.mode=dvi:${dvimode} " \
129 		"omapdss.def_disp=${defaultdisplay} " \
130 		"root=${mmcroot} " \
131 		"rootfstype=${mmcrootfstype}\0" \
132 	"nandargs=setenv bootargs console=${console} " \
133 		"mpurate=${mpurate} " \
134 		"vram=${vram} " \
135 		"omapfb.mode=dvi:${dvimode} " \
136 		"omapdss.def_disp=${defaultdisplay} " \
137 		"root=${nandroot} " \
138 		"rootfstype=${nandrootfstype}\0" \
139 	"loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
140 	"bootscript=echo Running bootscript from mmc ...; " \
141 		"source ${loadaddr}\0" \
142 	"loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
143 	"mmcboot=echo Booting from mmc ...; " \
144 		"run mmcargs; " \
145 		"bootm ${loadaddr}\0" \
146 	"nandboot=echo Booting from nand ...; " \
147 		"run nandargs; " \
148 		"nand read ${loadaddr} 2a0000 400000; " \
149 		"bootm ${loadaddr}\0" \
150 
151 #define CONFIG_BOOTCOMMAND \
152 	"mmc dev ${mmcdev}; if mmc rescan; then " \
153 		"if run loadbootscript; then " \
154 			"run bootscript; " \
155 		"else " \
156 			"if run loaduimage; then " \
157 				"run mmcboot; " \
158 			"else run nandboot; " \
159 			"fi; " \
160 		"fi; " \
161 	"else run nandboot; fi"
162 
163 /*
164  * Miscellaneous configurable options
165  */
166 #define CONFIG_AUTO_COMPLETE
167 #define CONFIG_CMDLINE_EDITING
168 #define CONFIG_TIMESTAMP
169 #define CONFIG_SYS_AUTOLOAD		"no"
170 #define CONFIG_SYS_LONGHELP		/* undef to save memory */
171 #define CONFIG_SYS_CBSIZE		512	/* Console I/O Buffer Size */
172 #define CONFIG_SYS_MAXARGS		32	/* max number of command args */
173 
174 #define CONFIG_SYS_LOAD_ADDR		(OMAP34XX_SDRC_CS0 + 0x02000000)
175 
176 /*
177  * AM3517 has 12 GP timers, they can be driven by the system clock
178  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
179  * This rate is divided by a local divisor.
180  */
181 #define CONFIG_SYS_TIMERBASE		(OMAP34XX_GPT2)
182 #define CONFIG_SYS_PTV			2       /* Divisor: 2^(PTV+1) => 8 */
183 #define CONFIG_SYS_HZ			1000
184 
185 /*-----------------------------------------------------------------------
186  * Physical Memory Map
187  */
188 #define CONFIG_NR_DRAM_BANKS	1	/* CM-T3517 DRAM is only on CS0 */
189 #define PHYS_SDRAM_1		OMAP34XX_SDRC_CS0
190 #define CONFIG_SYS_CS0_SIZE		(256 << 20)
191 
192 /*-----------------------------------------------------------------------
193  * FLASH and environment organization
194  */
195 
196 /* **** PISMO SUPPORT *** */
197 /* Monitor at start of flash */
198 #define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_FLASH_BASE
199 #define CONFIG_SYS_MONITOR_LEN		(256 << 10)	/* Reserve 2 sectors */
200 
201 #define CONFIG_ENV_OFFSET		0x260000
202 #define CONFIG_ENV_ADDR			0x260000
203 
204 #if defined(CONFIG_CMD_NET)
205 #define CONFIG_DRIVER_TI_EMAC
206 #define CONFIG_DRIVER_TI_EMAC_USE_RMII
207 #define CONFIG_MII
208 #define CONFIG_ARP_TIMEOUT		200UL
209 #define CONFIG_NET_RETRY_COUNT		5
210 #endif /* CONFIG_CMD_NET */
211 
212 /* additions for new relocation code, must be added to all boards */
213 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
214 #define CONFIG_SYS_INIT_RAM_ADDR	0x4020f800
215 #define CONFIG_SYS_INIT_RAM_SIZE	0x800
216 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR +	\
217 					 CONFIG_SYS_INIT_RAM_SIZE -	\
218 					 GENERATED_GBL_DATA_SIZE)
219 
220 /* Status LED */
221 #define GREEN_LED_GPIO			186 /* CM-T3517 Green LED is GPIO186 */
222 
223 /* Display Configuration */
224 #define CONFIG_VIDEO_OMAP3
225 #define LCD_BPP		LCD_COLOR16
226 
227 #define CONFIG_SPLASH_SCREEN
228 #define CONFIG_SPLASHIMAGE_GUARD
229 #define CONFIG_BMP_16BPP
230 #define CONFIG_SCF0403_LCD
231 
232 /* EEPROM */
233 #define CONFIG_ENV_EEPROM_IS_ON_I2C
234 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		1
235 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	4
236 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	5
237 #define CONFIG_SYS_EEPROM_SIZE			256
238 
239 #endif /* __CONFIG_H */
240