1 /* 2 * (C) Copyright 2013 CompuLab, Ltd. 3 * Author: Igor Grinberg <grinberg@compulab.co.il> 4 * 5 * Configuration settings for the CompuLab CM-T3517 board 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #ifndef __CONFIG_H 11 #define __CONFIG_H 12 13 /* 14 * High Level Configuration Options 15 */ 16 #define CONFIG_OMAP /* in a TI OMAP core */ 17 #define CONFIG_CM_T3517 /* working with CM-T3517 */ 18 /* Common ARM Erratas */ 19 #define CONFIG_ARM_ERRATA_454179 20 #define CONFIG_ARM_ERRATA_430973 21 #define CONFIG_ARM_ERRATA_621766 22 23 #define CONFIG_SYS_TEXT_BASE 0x80008000 24 25 /* 26 * This is needed for the DMA stuff. 27 * Although the default iss 64, we still define it 28 * to be on the safe side once the default is changed. 29 */ 30 31 #define CONFIG_EMIF4 /* The chip has EMIF4 controller */ 32 33 #include <asm/arch/cpu.h> /* get chip and board defs */ 34 #include <asm/arch/omap.h> 35 36 #define CONFIG_MACH_TYPE MACH_TYPE_CM_T3517 37 38 /* Clock Defines */ 39 #define V_OSCK 26000000 /* Clock output from T2 */ 40 #define V_SCLK (V_OSCK >> 1) 41 42 #define CONFIG_MISC_INIT_R 43 44 /* 45 * The early kernel mapping on ARM currently only maps from the base of DRAM 46 * to the end of the kernel image. The kernel is loaded at DRAM base + 0x8000. 47 * The early kernel pagetable uses DRAM base + 0x4000 to DRAM base + 0x8000, 48 * so that leaves DRAM base to DRAM base + 0x4000 available. 49 */ 50 #define CONFIG_SYS_BOOTMAPSZ 0x4000 51 52 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 53 #define CONFIG_SETUP_MEMORY_TAGS 54 #define CONFIG_INITRD_TAG 55 #define CONFIG_REVISION_TAG 56 #define CONFIG_SERIAL_TAG 57 58 /* 59 * Size of malloc() pool 60 */ 61 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ 62 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10)) 63 64 /* 65 * Hardware drivers 66 */ 67 68 /* 69 * NS16550 Configuration 70 */ 71 #define CONFIG_SYS_NS16550_SERIAL 72 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 73 #define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ 74 75 /* 76 * select serial console configuration 77 */ 78 #define CONFIG_CONS_INDEX 3 79 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 80 #define CONFIG_SERIAL3 3 /* UART3 */ 81 82 /* allow to overwrite serial and ethaddr */ 83 #define CONFIG_ENV_OVERWRITE 84 #define CONFIG_BAUDRATE 115200 85 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 86 115200} 87 88 #define CONFIG_OMAP_GPIO 89 90 /* USB */ 91 #define CONFIG_USB_MUSB_AM35X 92 93 #ifndef CONFIG_USB_MUSB_AM35X 94 #define CONFIG_USB_OMAP3 95 #define CONFIG_USB_EHCI 96 #define CONFIG_USB_EHCI_OMAP 97 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 146 98 #define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 147 99 #else /* !CONFIG_USB_MUSB_AM35X */ 100 #define CONFIG_USB_MUSB_PIO_ONLY 101 #endif /* CONFIG_USB_MUSB_AM35X */ 102 103 /* commands to include */ 104 #define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */ 105 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ 106 #define CONFIG_MTD_PARTITIONS 107 #define MTDIDS_DEFAULT "nand0=nand" 108 #define MTDPARTS_DEFAULT "mtdparts=nand:512k(x-loader),"\ 109 "1920k(u-boot),256k(u-boot-env),"\ 110 "4m(kernel),-(fs)" 111 112 #define CONFIG_CMD_NAND /* NAND support */ 113 114 #define CONFIG_SYS_I2C 115 #define CONFIG_SYS_OMAP24_I2C_SPEED 400000 116 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1 117 #define CONFIG_SYS_I2C_OMAP34XX 118 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 119 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 120 #define CONFIG_SYS_I2C_EEPROM_BUS 0 121 #define CONFIG_I2C_MULTI_BUS 122 123 /* 124 * Board NAND Info. 125 */ 126 #define CONFIG_NAND_OMAP_GPMC 127 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ 128 /* to access nand */ 129 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ 130 /* to access nand at */ 131 /* CS0 */ 132 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ 133 /* devices */ 134 135 /* Environment information */ 136 #define CONFIG_EXTRA_ENV_SETTINGS \ 137 "loadaddr=0x82000000\0" \ 138 "baudrate=115200\0" \ 139 "console=ttyO2,115200n8\0" \ 140 "netretry=yes\0" \ 141 "mpurate=auto\0" \ 142 "vram=12M\0" \ 143 "dvimode=1024x768MR-16@60\0" \ 144 "defaultdisplay=dvi\0" \ 145 "mmcdev=0\0" \ 146 "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \ 147 "mmcrootfstype=ext4\0" \ 148 "nandroot=/dev/mtdblock4 rw\0" \ 149 "nandrootfstype=ubifs\0" \ 150 "mmcargs=setenv bootargs console=${console} " \ 151 "mpurate=${mpurate} " \ 152 "vram=${vram} " \ 153 "omapfb.mode=dvi:${dvimode} " \ 154 "omapdss.def_disp=${defaultdisplay} " \ 155 "root=${mmcroot} " \ 156 "rootfstype=${mmcrootfstype}\0" \ 157 "nandargs=setenv bootargs console=${console} " \ 158 "mpurate=${mpurate} " \ 159 "vram=${vram} " \ 160 "omapfb.mode=dvi:${dvimode} " \ 161 "omapdss.def_disp=${defaultdisplay} " \ 162 "root=${nandroot} " \ 163 "rootfstype=${nandrootfstype}\0" \ 164 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ 165 "bootscript=echo Running bootscript from mmc ...; " \ 166 "source ${loadaddr}\0" \ 167 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ 168 "mmcboot=echo Booting from mmc ...; " \ 169 "run mmcargs; " \ 170 "bootm ${loadaddr}\0" \ 171 "nandboot=echo Booting from nand ...; " \ 172 "run nandargs; " \ 173 "nand read ${loadaddr} 2a0000 400000; " \ 174 "bootm ${loadaddr}\0" \ 175 176 #define CONFIG_BOOTCOMMAND \ 177 "mmc dev ${mmcdev}; if mmc rescan; then " \ 178 "if run loadbootscript; then " \ 179 "run bootscript; " \ 180 "else " \ 181 "if run loaduimage; then " \ 182 "run mmcboot; " \ 183 "else run nandboot; " \ 184 "fi; " \ 185 "fi; " \ 186 "else run nandboot; fi" 187 188 /* 189 * Miscellaneous configurable options 190 */ 191 #define CONFIG_AUTO_COMPLETE 192 #define CONFIG_CMDLINE_EDITING 193 #define CONFIG_TIMESTAMP 194 #define CONFIG_SYS_AUTOLOAD "no" 195 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 196 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ 197 /* Print Buffer Size */ 198 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 199 sizeof(CONFIG_SYS_PROMPT) + 16) 200 #define CONFIG_SYS_MAXARGS 32 /* max number of command args */ 201 /* Boot Argument Buffer Size */ 202 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) 203 204 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0 + 0x02000000) 205 206 /* 207 * AM3517 has 12 GP timers, they can be driven by the system clock 208 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 209 * This rate is divided by a local divisor. 210 */ 211 #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) 212 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 213 #define CONFIG_SYS_HZ 1000 214 215 /*----------------------------------------------------------------------- 216 * Physical Memory Map 217 */ 218 #define CONFIG_NR_DRAM_BANKS 1 /* CM-T3517 DRAM is only on CS0 */ 219 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 220 #define CONFIG_SYS_CS0_SIZE (256 << 20) 221 222 /*----------------------------------------------------------------------- 223 * FLASH and environment organization 224 */ 225 226 /* **** PISMO SUPPORT *** */ 227 /* Monitor at start of flash */ 228 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 229 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ 230 231 #define CONFIG_ENV_IS_IN_NAND 232 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ 233 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET 234 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET 235 236 #if defined(CONFIG_CMD_NET) 237 #define CONFIG_DRIVER_TI_EMAC 238 #define CONFIG_DRIVER_TI_EMAC_USE_RMII 239 #define CONFIG_MII 240 #define CONFIG_SMC911X 241 #define CONFIG_SMC911X_32_BIT 242 #define CONFIG_SMC911X_BASE (0x2C000000 + (16 << 20)) 243 #define CONFIG_ARP_TIMEOUT 200UL 244 #define CONFIG_NET_RETRY_COUNT 5 245 #endif /* CONFIG_CMD_NET */ 246 247 /* additions for new relocation code, must be added to all boards */ 248 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 249 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 250 #define CONFIG_SYS_INIT_RAM_SIZE 0x800 251 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 252 CONFIG_SYS_INIT_RAM_SIZE - \ 253 GENERATED_GBL_DATA_SIZE) 254 255 /* Status LED */ 256 #define GREEN_LED_GPIO 186 /* CM-T3517 Green LED is GPIO186 */ 257 258 /* GPIO banks */ 259 #ifdef CONFIG_LED_STATUS 260 #define CONFIG_OMAP3_GPIO_6 /* GPIO186 is in GPIO bank 6 */ 261 #endif 262 263 /* Display Configuration */ 264 #define CONFIG_OMAP3_GPIO_2 265 #define CONFIG_OMAP3_GPIO_5 266 #define CONFIG_VIDEO_OMAP3 267 #define LCD_BPP LCD_COLOR16 268 269 #define CONFIG_SPLASH_SCREEN 270 #define CONFIG_SPLASHIMAGE_GUARD 271 #define CONFIG_CMD_BMP 272 #define CONFIG_BMP_16BPP 273 #define CONFIG_SCF0403_LCD 274 275 #define CONFIG_OMAP3_SPI 276 277 /* EEPROM */ 278 #define CONFIG_CMD_EEPROM 279 #define CONFIG_ENV_EEPROM_IS_ON_I2C 280 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 281 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 282 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 283 #define CONFIG_SYS_EEPROM_SIZE 256 284 285 #define CONFIG_CMD_EEPROM_LAYOUT 286 #define CONFIG_EEPROM_LAYOUT_HELP_STRING "v1, v2, v3" 287 288 #endif /* __CONFIG_H */ 289