1 /* 2 * (C) Copyright 2013 CompuLab, Ltd. 3 * Author: Igor Grinberg <grinberg@compulab.co.il> 4 * 5 * Configuration settings for the CompuLab CM-T3517 board 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #ifndef __CONFIG_H 11 #define __CONFIG_H 12 13 #define CONFIG_SYS_CACHELINE_SIZE 64 14 15 /* 16 * High Level Configuration Options 17 */ 18 #define CONFIG_OMAP /* in a TI OMAP core */ 19 #define CONFIG_CM_T3517 /* working with CM-T3517 */ 20 #define CONFIG_OMAP_COMMON 21 /* Common ARM Erratas */ 22 #define CONFIG_ARM_ERRATA_454179 23 #define CONFIG_ARM_ERRATA_430973 24 #define CONFIG_ARM_ERRATA_621766 25 26 #define CONFIG_SYS_TEXT_BASE 0x80008000 27 28 /* 29 * This is needed for the DMA stuff. 30 * Although the default iss 64, we still define it 31 * to be on the safe side once the default is changed. 32 */ 33 #define CONFIG_SYS_CACHELINE_SIZE 64 34 35 #define CONFIG_EMIF4 /* The chip has EMIF4 controller */ 36 37 #include <asm/arch/cpu.h> /* get chip and board defs */ 38 #include <asm/arch/omap.h> 39 40 #define CONFIG_MACH_TYPE MACH_TYPE_CM_T3517 41 42 /* 43 * Display CPU and Board information 44 */ 45 #define CONFIG_DISPLAY_CPUINFO 46 #define CONFIG_DISPLAY_BOARDINFO 47 48 /* Clock Defines */ 49 #define V_OSCK 26000000 /* Clock output from T2 */ 50 #define V_SCLK (V_OSCK >> 1) 51 52 #define CONFIG_MISC_INIT_R 53 54 /* 55 * The early kernel mapping on ARM currently only maps from the base of DRAM 56 * to the end of the kernel image. The kernel is loaded at DRAM base + 0x8000. 57 * The early kernel pagetable uses DRAM base + 0x4000 to DRAM base + 0x8000, 58 * so that leaves DRAM base to DRAM base + 0x4000 available. 59 */ 60 #define CONFIG_SYS_BOOTMAPSZ 0x4000 61 62 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 63 #define CONFIG_SETUP_MEMORY_TAGS 64 #define CONFIG_INITRD_TAG 65 #define CONFIG_REVISION_TAG 66 #define CONFIG_SERIAL_TAG 67 68 /* 69 * Size of malloc() pool 70 */ 71 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ 72 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10)) 73 74 /* 75 * Hardware drivers 76 */ 77 78 /* 79 * NS16550 Configuration 80 */ 81 #define CONFIG_SYS_NS16550_SERIAL 82 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 83 #define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ 84 85 /* 86 * select serial console configuration 87 */ 88 #define CONFIG_CONS_INDEX 3 89 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 90 #define CONFIG_SERIAL3 3 /* UART3 */ 91 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 92 93 /* allow to overwrite serial and ethaddr */ 94 #define CONFIG_ENV_OVERWRITE 95 #define CONFIG_BAUDRATE 115200 96 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 97 115200} 98 99 #define CONFIG_OMAP_GPIO 100 101 #define CONFIG_GENERIC_MMC 102 #define CONFIG_MMC 103 #define CONFIG_OMAP_HSMMC 104 #define CONFIG_DOS_PARTITION 105 106 /* USB */ 107 #define CONFIG_USB_MUSB_AM35X 108 109 #ifndef CONFIG_USB_MUSB_AM35X 110 #define CONFIG_USB_OMAP3 111 #define CONFIG_USB_EHCI 112 #define CONFIG_USB_EHCI_OMAP 113 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 146 114 #define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 147 115 #else /* !CONFIG_USB_MUSB_AM35X */ 116 #define CONFIG_USB_MUSB_PIO_ONLY 117 #endif /* CONFIG_USB_MUSB_AM35X */ 118 119 #define CONFIG_USB_STORAGE 120 121 /* commands to include */ 122 #define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */ 123 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ 124 #define CONFIG_MTD_PARTITIONS 125 #define MTDIDS_DEFAULT "nand0=nand" 126 #define MTDPARTS_DEFAULT "mtdparts=nand:512k(x-loader),"\ 127 "1920k(u-boot),256k(u-boot-env),"\ 128 "4m(kernel),-(fs)" 129 130 #define CONFIG_CMD_NAND /* NAND support */ 131 132 #define CONFIG_SYS_NO_FLASH 133 #define CONFIG_SYS_I2C 134 #define CONFIG_SYS_OMAP24_I2C_SPEED 400000 135 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1 136 #define CONFIG_SYS_I2C_OMAP34XX 137 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 138 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 139 #define CONFIG_SYS_I2C_EEPROM_BUS 0 140 #define CONFIG_I2C_MULTI_BUS 141 142 /* 143 * Board NAND Info. 144 */ 145 #define CONFIG_NAND_OMAP_GPMC 146 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ 147 /* to access nand */ 148 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ 149 /* to access nand at */ 150 /* CS0 */ 151 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ 152 /* devices */ 153 154 /* Environment information */ 155 #define CONFIG_EXTRA_ENV_SETTINGS \ 156 "loadaddr=0x82000000\0" \ 157 "baudrate=115200\0" \ 158 "console=ttyO2,115200n8\0" \ 159 "netretry=yes\0" \ 160 "mpurate=auto\0" \ 161 "vram=12M\0" \ 162 "dvimode=1024x768MR-16@60\0" \ 163 "defaultdisplay=dvi\0" \ 164 "mmcdev=0\0" \ 165 "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \ 166 "mmcrootfstype=ext4\0" \ 167 "nandroot=/dev/mtdblock4 rw\0" \ 168 "nandrootfstype=ubifs\0" \ 169 "mmcargs=setenv bootargs console=${console} " \ 170 "mpurate=${mpurate} " \ 171 "vram=${vram} " \ 172 "omapfb.mode=dvi:${dvimode} " \ 173 "omapdss.def_disp=${defaultdisplay} " \ 174 "root=${mmcroot} " \ 175 "rootfstype=${mmcrootfstype}\0" \ 176 "nandargs=setenv bootargs console=${console} " \ 177 "mpurate=${mpurate} " \ 178 "vram=${vram} " \ 179 "omapfb.mode=dvi:${dvimode} " \ 180 "omapdss.def_disp=${defaultdisplay} " \ 181 "root=${nandroot} " \ 182 "rootfstype=${nandrootfstype}\0" \ 183 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ 184 "bootscript=echo Running bootscript from mmc ...; " \ 185 "source ${loadaddr}\0" \ 186 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ 187 "mmcboot=echo Booting from mmc ...; " \ 188 "run mmcargs; " \ 189 "bootm ${loadaddr}\0" \ 190 "nandboot=echo Booting from nand ...; " \ 191 "run nandargs; " \ 192 "nand read ${loadaddr} 2a0000 400000; " \ 193 "bootm ${loadaddr}\0" \ 194 195 #define CONFIG_BOOTCOMMAND \ 196 "mmc dev ${mmcdev}; if mmc rescan; then " \ 197 "if run loadbootscript; then " \ 198 "run bootscript; " \ 199 "else " \ 200 "if run loaduimage; then " \ 201 "run mmcboot; " \ 202 "else run nandboot; " \ 203 "fi; " \ 204 "fi; " \ 205 "else run nandboot; fi" 206 207 /* 208 * Miscellaneous configurable options 209 */ 210 #define CONFIG_AUTO_COMPLETE 211 #define CONFIG_CMDLINE_EDITING 212 #define CONFIG_TIMESTAMP 213 #define CONFIG_SYS_AUTOLOAD "no" 214 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 215 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ 216 /* Print Buffer Size */ 217 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 218 sizeof(CONFIG_SYS_PROMPT) + 16) 219 #define CONFIG_SYS_MAXARGS 32 /* max number of command args */ 220 /* Boot Argument Buffer Size */ 221 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) 222 223 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0 + 0x02000000) 224 225 /* 226 * AM3517 has 12 GP timers, they can be driven by the system clock 227 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 228 * This rate is divided by a local divisor. 229 */ 230 #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) 231 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 232 #define CONFIG_SYS_HZ 1000 233 234 /*----------------------------------------------------------------------- 235 * Physical Memory Map 236 */ 237 #define CONFIG_NR_DRAM_BANKS 1 /* CM-T3517 DRAM is only on CS0 */ 238 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 239 #define CONFIG_SYS_CS0_SIZE (256 << 20) 240 241 /*----------------------------------------------------------------------- 242 * FLASH and environment organization 243 */ 244 245 /* **** PISMO SUPPORT *** */ 246 /* Monitor at start of flash */ 247 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 248 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ 249 250 #define CONFIG_ENV_IS_IN_NAND 251 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ 252 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET 253 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET 254 255 #if defined(CONFIG_CMD_NET) 256 #define CONFIG_DRIVER_TI_EMAC 257 #define CONFIG_DRIVER_TI_EMAC_USE_RMII 258 #define CONFIG_MII 259 #define CONFIG_SMC911X 260 #define CONFIG_SMC911X_32_BIT 261 #define CONFIG_SMC911X_BASE (0x2C000000 + (16 << 20)) 262 #define CONFIG_ARP_TIMEOUT 200UL 263 #define CONFIG_NET_RETRY_COUNT 5 264 #endif /* CONFIG_CMD_NET */ 265 266 /* additions for new relocation code, must be added to all boards */ 267 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 268 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 269 #define CONFIG_SYS_INIT_RAM_SIZE 0x800 270 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 271 CONFIG_SYS_INIT_RAM_SIZE - \ 272 GENERATED_GBL_DATA_SIZE) 273 274 /* Status LED */ 275 #define CONFIG_STATUS_LED /* Status LED enabled */ 276 #define CONFIG_BOARD_SPECIFIC_LED 277 #define CONFIG_GPIO_LED 278 #define GREEN_LED_GPIO 186 /* CM-T3517 Green LED is GPIO186 */ 279 #define GREEN_LED_DEV 0 280 #define STATUS_LED_BIT GREEN_LED_GPIO 281 #define STATUS_LED_STATE STATUS_LED_ON 282 #define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2) 283 #define STATUS_LED_BOOT GREEN_LED_DEV 284 285 /* GPIO banks */ 286 #ifdef CONFIG_STATUS_LED 287 #define CONFIG_OMAP3_GPIO_6 /* GPIO186 is in GPIO bank 6 */ 288 #endif 289 290 /* Display Configuration */ 291 #define CONFIG_OMAP3_GPIO_2 292 #define CONFIG_OMAP3_GPIO_5 293 #define CONFIG_VIDEO_OMAP3 294 #define LCD_BPP LCD_COLOR16 295 296 #define CONFIG_LCD 297 #define CONFIG_SPLASH_SCREEN 298 #define CONFIG_SPLASHIMAGE_GUARD 299 #define CONFIG_CMD_BMP 300 #define CONFIG_BMP_16BPP 301 #define CONFIG_SCF0403_LCD 302 303 #define CONFIG_OMAP3_SPI 304 305 /* EEPROM */ 306 #define CONFIG_CMD_EEPROM 307 #define CONFIG_ENV_EEPROM_IS_ON_I2C 308 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 309 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 310 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 311 #define CONFIG_SYS_EEPROM_SIZE 256 312 313 #define CONFIG_CMD_EEPROM_LAYOUT 314 #define CONFIG_EEPROM_LAYOUT_HELP_STRING "v1, v2, v3" 315 316 #endif /* __CONFIG_H */ 317