1 /* 2 * (C) Copyright 2011 CompuLab, Ltd. 3 * Mike Rapoport <mike@compulab.co.il> 4 * Igor Grinberg <grinberg@compulab.co.il> 5 * 6 * Based on omap3_beagle.h 7 * (C) Copyright 2006-2008 8 * Texas Instruments. 9 * Richard Woodruff <r-woodruff2@ti.com> 10 * Syed Mohammed Khasim <x0khasim@ti.com> 11 * 12 * Configuration settings for the CompuLab CM-T35 and CM-T3730 boards 13 * 14 * SPDX-License-Identifier: GPL-2.0+ 15 */ 16 17 #ifndef __CONFIG_H 18 #define __CONFIG_H 19 20 /* 21 * High Level Configuration Options 22 */ 23 #define CONFIG_OMAP /* in a TI OMAP core */ 24 #define CONFIG_OMAP34XX /* which is a 34XX */ 25 #define CONFIG_OMAP_GPIO 26 #define CONFIG_CM_T3X /* working with CM-T35 and CM-T3730 */ 27 #define CONFIG_OMAP_COMMON 28 29 #define CONFIG_SYS_TEXT_BASE 0x80008000 30 31 #define CONFIG_SDRC /* The chip has SDRC controller */ 32 33 #include <asm/arch/cpu.h> /* get chip and board defs */ 34 #include <asm/arch/omap3.h> 35 36 /* 37 * Display CPU and Board information 38 */ 39 #define CONFIG_DISPLAY_CPUINFO 40 #define CONFIG_DISPLAY_BOARDINFO 41 42 /* Clock Defines */ 43 #define V_OSCK 26000000 /* Clock output from T2 */ 44 #define V_SCLK (V_OSCK >> 1) 45 46 #define CONFIG_MISC_INIT_R 47 48 #define CONFIG_OF_LIBFDT 1 49 /* 50 * The early kernel mapping on ARM currently only maps from the base of DRAM 51 * to the end of the kernel image. The kernel is loaded at DRAM base + 0x8000. 52 * The early kernel pagetable uses DRAM base + 0x4000 to DRAM base + 0x8000, 53 * so that leaves DRAM base to DRAM base + 0x4000 available. 54 */ 55 #define CONFIG_SYS_BOOTMAPSZ 0x4000 56 57 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 58 #define CONFIG_SETUP_MEMORY_TAGS 59 #define CONFIG_INITRD_TAG 60 #define CONFIG_REVISION_TAG 61 #define CONFIG_SERIAL_TAG 62 63 /* 64 * Size of malloc() pool 65 */ 66 #define CONFIG_ENV_SIZE (16 << 10) /* 16 KiB */ 67 /* Sector */ 68 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10)) 69 70 /* 71 * Hardware drivers 72 */ 73 74 /* 75 * NS16550 Configuration 76 */ 77 #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ 78 79 #define CONFIG_SYS_NS16550 80 #define CONFIG_SYS_NS16550_SERIAL 81 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 82 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK 83 84 /* 85 * select serial console configuration 86 */ 87 #define CONFIG_CONS_INDEX 3 88 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 89 #define CONFIG_SERIAL3 3 /* UART3 */ 90 91 /* allow to overwrite serial and ethaddr */ 92 #define CONFIG_ENV_OVERWRITE 93 #define CONFIG_BAUDRATE 115200 94 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 95 115200} 96 97 #define CONFIG_GENERIC_MMC 98 #define CONFIG_MMC 99 #define CONFIG_OMAP_HSMMC 100 #define CONFIG_DOS_PARTITION 101 102 /* USB */ 103 #define CONFIG_USB_OMAP3 104 #define CONFIG_USB_EHCI 105 #define CONFIG_USB_EHCI_OMAP 106 #define CONFIG_USB_ULPI 107 #define CONFIG_USB_ULPI_VIEWPORT_OMAP 108 #define CONFIG_USB_STORAGE 109 #define CONFIG_MUSB_UDC 110 #define CONFIG_TWL4030_USB 111 #define CONFIG_CMD_USB 112 113 /* USB device configuration */ 114 #define CONFIG_USB_DEVICE 115 #define CONFIG_USB_TTY 116 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 117 118 /* commands to include */ 119 #include <config_cmd_default.h> 120 121 #define CONFIG_CMD_CACHE 122 #define CONFIG_CMD_EXT2 /* EXT2 Support */ 123 #define CONFIG_CMD_FAT /* FAT support */ 124 #define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */ 125 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ 126 #define CONFIG_MTD_PARTITIONS 127 #define MTDIDS_DEFAULT "nand0=nand" 128 #define MTDPARTS_DEFAULT "mtdparts=nand:512k(x-loader),"\ 129 "1920k(u-boot),256k(u-boot-env),"\ 130 "4m(kernel),-(fs)" 131 132 #define CONFIG_CMD_I2C /* I2C serial bus support */ 133 #define CONFIG_CMD_MMC /* MMC support */ 134 #define CONFIG_CMD_NAND /* NAND support */ 135 #define CONFIG_CMD_DHCP 136 #define CONFIG_CMD_PING 137 138 #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ 139 #undef CONFIG_CMD_FPGA /* FPGA configuration Support */ 140 #undef CONFIG_CMD_IMLS /* List all found images */ 141 142 #define CONFIG_SYS_NO_FLASH 143 #define CONFIG_HARD_I2C 144 #define CONFIG_SYS_I2C_SPEED 100000 145 #define CONFIG_SYS_I2C_SLAVE 1 146 #define CONFIG_DRIVER_OMAP34XX_I2C 147 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 148 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 149 #define CONFIG_I2C_MULTI_BUS 150 151 /* 152 * TWL4030 153 */ 154 #define CONFIG_TWL4030_POWER 155 #define CONFIG_TWL4030_LED 156 157 /* 158 * Board NAND Info. 159 */ 160 #define CONFIG_SYS_NAND_QUIET_TEST 161 #define CONFIG_NAND_OMAP_GPMC 162 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ 163 /* to access nand */ 164 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ 165 /* to access nand at */ 166 /* CS0 */ 167 #define GPMC_NAND_ECC_LP_x8_LAYOUT 168 169 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ 170 /* devices */ 171 /* Environment information */ 172 #define CONFIG_BOOTDELAY 10 173 #define CONFIG_ZERO_BOOTDELAY_CHECK 174 175 #define CONFIG_EXTRA_ENV_SETTINGS \ 176 "loadaddr=0x82000000\0" \ 177 "usbtty=cdc_acm\0" \ 178 "console=ttyS2,115200n8\0" \ 179 "mpurate=500\0" \ 180 "vram=12M\0" \ 181 "dvimode=1024x768MR-16@60\0" \ 182 "defaultdisplay=dvi\0" \ 183 "mmcdev=0\0" \ 184 "mmcroot=/dev/mmcblk0p2 rw\0" \ 185 "mmcrootfstype=ext4 rootwait\0" \ 186 "nandroot=/dev/mtdblock4 rw\0" \ 187 "nandrootfstype=ubifs\0" \ 188 "mmcargs=setenv bootargs console=${console} " \ 189 "mpurate=${mpurate} " \ 190 "vram=${vram} " \ 191 "omapfb.mode=dvi:${dvimode} " \ 192 "omapfb.debug=y " \ 193 "omapdss.def_disp=${defaultdisplay} " \ 194 "root=${mmcroot} " \ 195 "rootfstype=${mmcrootfstype}\0" \ 196 "nandargs=setenv bootargs console=${console} " \ 197 "mpurate=${mpurate} " \ 198 "vram=${vram} " \ 199 "omapfb.mode=dvi:${dvimode} " \ 200 "omapfb.debug=y " \ 201 "omapdss.def_disp=${defaultdisplay} " \ 202 "root=${nandroot} " \ 203 "rootfstype=${nandrootfstype}\0" \ 204 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ 205 "bootscript=echo Running bootscript from mmc ...; " \ 206 "source ${loadaddr}\0" \ 207 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ 208 "mmcboot=echo Booting from mmc ...; " \ 209 "run mmcargs; " \ 210 "bootm ${loadaddr}\0" \ 211 "nandboot=echo Booting from nand ...; " \ 212 "run nandargs; " \ 213 "nand read ${loadaddr} 2a0000 400000; " \ 214 "bootm ${loadaddr}\0" \ 215 216 #define CONFIG_BOOTCOMMAND \ 217 "mmc dev ${mmcdev}; if mmc rescan; then " \ 218 "if run loadbootscript; then " \ 219 "run bootscript; " \ 220 "else " \ 221 "if run loaduimage; then " \ 222 "run mmcboot; " \ 223 "else run nandboot; " \ 224 "fi; " \ 225 "fi; " \ 226 "else run nandboot; fi" 227 228 /* 229 * Miscellaneous configurable options 230 */ 231 #define CONFIG_AUTO_COMPLETE 232 #define CONFIG_CMDLINE_EDITING 233 #define CONFIG_TIMESTAMP 234 #define CONFIG_SYS_AUTOLOAD "no" 235 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 236 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ 237 #define CONFIG_SYS_PROMPT "CM-T3x # " 238 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 239 /* Print Buffer Size */ 240 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 241 sizeof(CONFIG_SYS_PROMPT) + 16) 242 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 243 /* Boot Argument Buffer Size */ 244 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) 245 246 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) /* memtest */ 247 /* works on */ 248 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ 249 0x01F00000) /* 31MB */ 250 251 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */ 252 /* load address */ 253 254 /* 255 * OMAP3 has 12 GP timers, they can be driven by the system clock 256 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 257 * This rate is divided by a local divisor. 258 */ 259 #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) 260 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 261 #define CONFIG_SYS_HZ 1000 262 263 /*----------------------------------------------------------------------- 264 * Physical Memory Map 265 */ 266 #define CONFIG_NR_DRAM_BANKS 1 /* CS1 is never populated */ 267 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 268 269 /*----------------------------------------------------------------------- 270 * FLASH and environment organization 271 */ 272 273 /* **** PISMO SUPPORT *** */ 274 /* Configure the PISMO */ 275 #define PISMO1_NAND_SIZE GPMC_SIZE_128M 276 277 /* Monitor at start of flash */ 278 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 279 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ 280 281 #define CONFIG_ENV_IS_IN_NAND 282 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ 283 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET 284 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET 285 286 #if defined(CONFIG_CMD_NET) 287 #define CONFIG_SMC911X 288 #define CONFIG_SMC911X_32_BIT 289 #define CM_T3X_SMC911X_BASE 0x2C000000 290 #define SB_T35_SMC911X_BASE (CM_T3X_SMC911X_BASE + (16 << 20)) 291 #define CONFIG_SMC911X_BASE CM_T3X_SMC911X_BASE 292 #endif /* (CONFIG_CMD_NET) */ 293 294 /* additions for new relocation code, must be added to all boards */ 295 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 296 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 297 #define CONFIG_SYS_INIT_RAM_SIZE 0x800 298 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 299 CONFIG_SYS_INIT_RAM_SIZE - \ 300 GENERATED_GBL_DATA_SIZE) 301 302 /* Status LED */ 303 #define CONFIG_STATUS_LED /* Status LED enabled */ 304 #define CONFIG_BOARD_SPECIFIC_LED 305 #define STATUS_LED_GREEN 0 306 #define STATUS_LED_BIT STATUS_LED_GREEN 307 #define STATUS_LED_STATE STATUS_LED_ON 308 #define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2) 309 #define STATUS_LED_BOOT STATUS_LED_BIT 310 #define GREEN_LED_GPIO 186 /* CM-T35 Green LED is GPIO186 */ 311 312 #define CONFIG_SPLASHIMAGE_GUARD 313 314 /* GPIO banks */ 315 #ifdef CONFIG_STATUS_LED 316 #define CONFIG_OMAP3_GPIO_6 /* GPIO186 is in GPIO bank 6 */ 317 #endif 318 319 /* Display Configuration */ 320 #define CONFIG_OMAP3_GPIO_2 321 #define CONFIG_VIDEO_OMAP3 322 #define LCD_BPP LCD_COLOR16 323 324 #define CONFIG_LCD 325 #define CONFIG_SPLASH_SCREEN 326 #define CONFIG_CMD_BMP 327 #define CONFIG_BMP_16BPP 328 329 #endif /* __CONFIG_H */ 330