136b4e2ddSMike Rapoport /* 29fc376beSNikita Kiryanov * (C) Copyright 2011 CompuLab, Ltd. 336b4e2ddSMike Rapoport * Mike Rapoport <mike@compulab.co.il> 4dccd9a0bSIgor Grinberg * Igor Grinberg <grinberg@compulab.co.il> 536b4e2ddSMike Rapoport * 636b4e2ddSMike Rapoport * Based on omap3_beagle.h 736b4e2ddSMike Rapoport * (C) Copyright 2006-2008 836b4e2ddSMike Rapoport * Texas Instruments. 936b4e2ddSMike Rapoport * Richard Woodruff <r-woodruff2@ti.com> 1036b4e2ddSMike Rapoport * Syed Mohammed Khasim <x0khasim@ti.com> 1136b4e2ddSMike Rapoport * 12b65a77a8SIgor Grinberg * Configuration settings for the CompuLab CM-T35 and CM-T3730 boards 1336b4e2ddSMike Rapoport * 141a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 1536b4e2ddSMike Rapoport */ 1636b4e2ddSMike Rapoport 1736b4e2ddSMike Rapoport #ifndef __CONFIG_H 1836b4e2ddSMike Rapoport #define __CONFIG_H 1936b4e2ddSMike Rapoport 2036b4e2ddSMike Rapoport /* 2136b4e2ddSMike Rapoport * High Level Configuration Options 2236b4e2ddSMike Rapoport */ 239fc376beSNikita Kiryanov #define CONFIG_OMAP /* in a TI OMAP core */ 249fc376beSNikita Kiryanov #define CONFIG_OMAP34XX /* which is a 34XX */ 25308252adSMarek Vasut #define CONFIG_OMAP_GPIO 265b28f204SNikita Kiryanov #define CONFIG_CMD_GPIO 279fc376beSNikita Kiryanov #define CONFIG_CM_T3X /* working with CM-T35 and CM-T3730 */ 28806d2792SLokesh Vutla #define CONFIG_OMAP_COMMON 2936b4e2ddSMike Rapoport 3036b4e2ddSMike Rapoport #define CONFIG_SYS_TEXT_BASE 0x80008000 3136b4e2ddSMike Rapoport 3236b4e2ddSMike Rapoport #define CONFIG_SDRC /* The chip has SDRC controller */ 3336b4e2ddSMike Rapoport 3436b4e2ddSMike Rapoport #include <asm/arch/cpu.h> /* get chip and board defs */ 3536b4e2ddSMike Rapoport #include <asm/arch/omap3.h> 3636b4e2ddSMike Rapoport 3736b4e2ddSMike Rapoport /* 3836b4e2ddSMike Rapoport * Display CPU and Board information 3936b4e2ddSMike Rapoport */ 409fc376beSNikita Kiryanov #define CONFIG_DISPLAY_CPUINFO 419fc376beSNikita Kiryanov #define CONFIG_DISPLAY_BOARDINFO 4236b4e2ddSMike Rapoport 4336b4e2ddSMike Rapoport /* Clock Defines */ 4436b4e2ddSMike Rapoport #define V_OSCK 26000000 /* Clock output from T2 */ 4536b4e2ddSMike Rapoport #define V_SCLK (V_OSCK >> 1) 4636b4e2ddSMike Rapoport 4736b4e2ddSMike Rapoport #define CONFIG_MISC_INIT_R 4836b4e2ddSMike Rapoport 4936b4e2ddSMike Rapoport #define CONFIG_OF_LIBFDT 1 5036b4e2ddSMike Rapoport /* 5136b4e2ddSMike Rapoport * The early kernel mapping on ARM currently only maps from the base of DRAM 5236b4e2ddSMike Rapoport * to the end of the kernel image. The kernel is loaded at DRAM base + 0x8000. 5336b4e2ddSMike Rapoport * The early kernel pagetable uses DRAM base + 0x4000 to DRAM base + 0x8000, 5436b4e2ddSMike Rapoport * so that leaves DRAM base to DRAM base + 0x4000 available. 5536b4e2ddSMike Rapoport */ 5636b4e2ddSMike Rapoport #define CONFIG_SYS_BOOTMAPSZ 0x4000 5736b4e2ddSMike Rapoport 589fc376beSNikita Kiryanov #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 599fc376beSNikita Kiryanov #define CONFIG_SETUP_MEMORY_TAGS 609fc376beSNikita Kiryanov #define CONFIG_INITRD_TAG 619fc376beSNikita Kiryanov #define CONFIG_REVISION_TAG 6282309250SNikita Kiryanov #define CONFIG_SERIAL_TAG 6336b4e2ddSMike Rapoport 6436b4e2ddSMike Rapoport /* 6536b4e2ddSMike Rapoport * Size of malloc() pool 6636b4e2ddSMike Rapoport */ 67390cdcdaSIgor Grinberg #define CONFIG_ENV_SIZE (16 << 10) /* 16 KiB */ 6836b4e2ddSMike Rapoport /* Sector */ 6936b4e2ddSMike Rapoport #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10)) 7036b4e2ddSMike Rapoport 7136b4e2ddSMike Rapoport /* 7236b4e2ddSMike Rapoport * Hardware drivers 7336b4e2ddSMike Rapoport */ 7436b4e2ddSMike Rapoport 7536b4e2ddSMike Rapoport /* 7636b4e2ddSMike Rapoport * NS16550 Configuration 7736b4e2ddSMike Rapoport */ 7836b4e2ddSMike Rapoport #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ 7936b4e2ddSMike Rapoport 8036b4e2ddSMike Rapoport #define CONFIG_SYS_NS16550 8136b4e2ddSMike Rapoport #define CONFIG_SYS_NS16550_SERIAL 8236b4e2ddSMike Rapoport #define CONFIG_SYS_NS16550_REG_SIZE (-4) 8336b4e2ddSMike Rapoport #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK 8436b4e2ddSMike Rapoport 8536b4e2ddSMike Rapoport /* 8636b4e2ddSMike Rapoport * select serial console configuration 8736b4e2ddSMike Rapoport */ 8836b4e2ddSMike Rapoport #define CONFIG_CONS_INDEX 3 8936b4e2ddSMike Rapoport #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 9036b4e2ddSMike Rapoport #define CONFIG_SERIAL3 3 /* UART3 */ 9136b4e2ddSMike Rapoport 9236b4e2ddSMike Rapoport /* allow to overwrite serial and ethaddr */ 9336b4e2ddSMike Rapoport #define CONFIG_ENV_OVERWRITE 9436b4e2ddSMike Rapoport #define CONFIG_BAUDRATE 115200 9536b4e2ddSMike Rapoport #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 9636b4e2ddSMike Rapoport 115200} 979fc376beSNikita Kiryanov 989fc376beSNikita Kiryanov #define CONFIG_GENERIC_MMC 999fc376beSNikita Kiryanov #define CONFIG_MMC 1009fc376beSNikita Kiryanov #define CONFIG_OMAP_HSMMC 1019fc376beSNikita Kiryanov #define CONFIG_DOS_PARTITION 10236b4e2ddSMike Rapoport 10336b4e2ddSMike Rapoport /* USB */ 1049fc376beSNikita Kiryanov #define CONFIG_USB_OMAP3 105854a7836SNikita Kiryanov #define CONFIG_USB_EHCI 106854a7836SNikita Kiryanov #define CONFIG_USB_EHCI_OMAP 107854a7836SNikita Kiryanov #define CONFIG_USB_ULPI 108854a7836SNikita Kiryanov #define CONFIG_USB_ULPI_VIEWPORT_OMAP 109854a7836SNikita Kiryanov #define CONFIG_USB_STORAGE 110854a7836SNikita Kiryanov #define CONFIG_MUSB_UDC 1119fc376beSNikita Kiryanov #define CONFIG_TWL4030_USB 112854a7836SNikita Kiryanov #define CONFIG_CMD_USB 11336b4e2ddSMike Rapoport 11436b4e2ddSMike Rapoport /* USB device configuration */ 1159fc376beSNikita Kiryanov #define CONFIG_USB_DEVICE 1169fc376beSNikita Kiryanov #define CONFIG_USB_TTY 1179fc376beSNikita Kiryanov #define CONFIG_SYS_CONSOLE_IS_IN_ENV 11836b4e2ddSMike Rapoport 11936b4e2ddSMike Rapoport /* commands to include */ 12036b4e2ddSMike Rapoport #include <config_cmd_default.h> 12136b4e2ddSMike Rapoport 12236b4e2ddSMike Rapoport #define CONFIG_CMD_CACHE 12336b4e2ddSMike Rapoport #define CONFIG_CMD_EXT2 /* EXT2 Support */ 12436b4e2ddSMike Rapoport #define CONFIG_CMD_FAT /* FAT support */ 12536b4e2ddSMike Rapoport #define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */ 12636b4e2ddSMike Rapoport #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ 1270b800a6bSIgor Grinberg #define CONFIG_MTD_PARTITIONS 12836b4e2ddSMike Rapoport #define MTDIDS_DEFAULT "nand0=nand" 12936b4e2ddSMike Rapoport #define MTDPARTS_DEFAULT "mtdparts=nand:512k(x-loader),"\ 1300b800a6bSIgor Grinberg "1920k(u-boot),256k(u-boot-env),"\ 13136b4e2ddSMike Rapoport "4m(kernel),-(fs)" 13236b4e2ddSMike Rapoport 13336b4e2ddSMike Rapoport #define CONFIG_CMD_I2C /* I2C serial bus support */ 13436b4e2ddSMike Rapoport #define CONFIG_CMD_MMC /* MMC support */ 13536b4e2ddSMike Rapoport #define CONFIG_CMD_NAND /* NAND support */ 13636b4e2ddSMike Rapoport #define CONFIG_CMD_DHCP 13736b4e2ddSMike Rapoport #define CONFIG_CMD_PING 13836b4e2ddSMike Rapoport 13936b4e2ddSMike Rapoport #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ 14036b4e2ddSMike Rapoport #undef CONFIG_CMD_FPGA /* FPGA configuration Support */ 14136b4e2ddSMike Rapoport #undef CONFIG_CMD_IMLS /* List all found images */ 14236b4e2ddSMike Rapoport 14336b4e2ddSMike Rapoport #define CONFIG_SYS_NO_FLASH 1449fc376beSNikita Kiryanov #define CONFIG_HARD_I2C 14536b4e2ddSMike Rapoport #define CONFIG_SYS_I2C_SPEED 100000 14636b4e2ddSMike Rapoport #define CONFIG_SYS_I2C_SLAVE 1 1479fc376beSNikita Kiryanov #define CONFIG_DRIVER_OMAP34XX_I2C 14882309250SNikita Kiryanov #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 14982309250SNikita Kiryanov #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 15079874ae9SNikita Kiryanov #define CONFIG_I2C_MULTI_BUS 15136b4e2ddSMike Rapoport 15236b4e2ddSMike Rapoport /* 15336b4e2ddSMike Rapoport * TWL4030 15436b4e2ddSMike Rapoport */ 1559fc376beSNikita Kiryanov #define CONFIG_TWL4030_POWER 1569fc376beSNikita Kiryanov #define CONFIG_TWL4030_LED 15736b4e2ddSMike Rapoport 15836b4e2ddSMike Rapoport /* 15936b4e2ddSMike Rapoport * Board NAND Info. 16036b4e2ddSMike Rapoport */ 1619fc376beSNikita Kiryanov #define CONFIG_SYS_NAND_QUIET_TEST 16236b4e2ddSMike Rapoport #define CONFIG_NAND_OMAP_GPMC 16336b4e2ddSMike Rapoport #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ 16436b4e2ddSMike Rapoport /* to access nand */ 16536b4e2ddSMike Rapoport #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ 16636b4e2ddSMike Rapoport /* to access nand at */ 16736b4e2ddSMike Rapoport /* CS0 */ 168816e3921SNikita Kiryanov #define GPMC_NAND_ECC_LP_x8_LAYOUT 16936b4e2ddSMike Rapoport 17036b4e2ddSMike Rapoport #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ 17136b4e2ddSMike Rapoport /* devices */ 17236b4e2ddSMike Rapoport /* Environment information */ 173a431be4cSNikita Kiryanov #define CONFIG_BOOTDELAY 3 1749bd5c1adSNikita Kiryanov #define CONFIG_ZERO_BOOTDELAY_CHECK 17536b4e2ddSMike Rapoport 17636b4e2ddSMike Rapoport #define CONFIG_EXTRA_ENV_SETTINGS \ 17736b4e2ddSMike Rapoport "loadaddr=0x82000000\0" \ 17836b4e2ddSMike Rapoport "usbtty=cdc_acm\0" \ 17936b4e2ddSMike Rapoport "console=ttyS2,115200n8\0" \ 18036b4e2ddSMike Rapoport "mpurate=500\0" \ 18136b4e2ddSMike Rapoport "vram=12M\0" \ 18236b4e2ddSMike Rapoport "dvimode=1024x768MR-16@60\0" \ 18336b4e2ddSMike Rapoport "defaultdisplay=dvi\0" \ 18436b4e2ddSMike Rapoport "mmcdev=0\0" \ 18536b4e2ddSMike Rapoport "mmcroot=/dev/mmcblk0p2 rw\0" \ 1860b800a6bSIgor Grinberg "mmcrootfstype=ext4 rootwait\0" \ 18736b4e2ddSMike Rapoport "nandroot=/dev/mtdblock4 rw\0" \ 1880b800a6bSIgor Grinberg "nandrootfstype=ubifs\0" \ 18936b4e2ddSMike Rapoport "mmcargs=setenv bootargs console=${console} " \ 19036b4e2ddSMike Rapoport "mpurate=${mpurate} " \ 19136b4e2ddSMike Rapoport "vram=${vram} " \ 19236b4e2ddSMike Rapoport "omapfb.mode=dvi:${dvimode} " \ 19336b4e2ddSMike Rapoport "omapfb.debug=y " \ 19436b4e2ddSMike Rapoport "omapdss.def_disp=${defaultdisplay} " \ 19536b4e2ddSMike Rapoport "root=${mmcroot} " \ 19636b4e2ddSMike Rapoport "rootfstype=${mmcrootfstype}\0" \ 19736b4e2ddSMike Rapoport "nandargs=setenv bootargs console=${console} " \ 19836b4e2ddSMike Rapoport "mpurate=${mpurate} " \ 19936b4e2ddSMike Rapoport "vram=${vram} " \ 20036b4e2ddSMike Rapoport "omapfb.mode=dvi:${dvimode} " \ 20136b4e2ddSMike Rapoport "omapfb.debug=y " \ 20236b4e2ddSMike Rapoport "omapdss.def_disp=${defaultdisplay} " \ 20336b4e2ddSMike Rapoport "root=${nandroot} " \ 20436b4e2ddSMike Rapoport "rootfstype=${nandrootfstype}\0" \ 20536b4e2ddSMike Rapoport "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ 20636b4e2ddSMike Rapoport "bootscript=echo Running bootscript from mmc ...; " \ 20736b4e2ddSMike Rapoport "source ${loadaddr}\0" \ 20836b4e2ddSMike Rapoport "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ 20936b4e2ddSMike Rapoport "mmcboot=echo Booting from mmc ...; " \ 21036b4e2ddSMike Rapoport "run mmcargs; " \ 21136b4e2ddSMike Rapoport "bootm ${loadaddr}\0" \ 21236b4e2ddSMike Rapoport "nandboot=echo Booting from nand ...; " \ 21336b4e2ddSMike Rapoport "run nandargs; " \ 2140b800a6bSIgor Grinberg "nand read ${loadaddr} 2a0000 400000; " \ 21536b4e2ddSMike Rapoport "bootm ${loadaddr}\0" \ 21636b4e2ddSMike Rapoport 21736b4e2ddSMike Rapoport #define CONFIG_BOOTCOMMAND \ 21866968110SAndrew Bradford "mmc dev ${mmcdev}; if mmc rescan; then " \ 21936b4e2ddSMike Rapoport "if run loadbootscript; then " \ 22036b4e2ddSMike Rapoport "run bootscript; " \ 22136b4e2ddSMike Rapoport "else " \ 22236b4e2ddSMike Rapoport "if run loaduimage; then " \ 22336b4e2ddSMike Rapoport "run mmcboot; " \ 22436b4e2ddSMike Rapoport "else run nandboot; " \ 22536b4e2ddSMike Rapoport "fi; " \ 22636b4e2ddSMike Rapoport "fi; " \ 22736b4e2ddSMike Rapoport "else run nandboot; fi" 22836b4e2ddSMike Rapoport 22936b4e2ddSMike Rapoport /* 23036b4e2ddSMike Rapoport * Miscellaneous configurable options 23136b4e2ddSMike Rapoport */ 23241d7e702SIgor Grinberg #define CONFIG_AUTO_COMPLETE 23341d7e702SIgor Grinberg #define CONFIG_CMDLINE_EDITING 23441d7e702SIgor Grinberg #define CONFIG_TIMESTAMP 23541d7e702SIgor Grinberg #define CONFIG_SYS_AUTOLOAD "no" 23636b4e2ddSMike Rapoport #define CONFIG_SYS_LONGHELP /* undef to save memory */ 23736b4e2ddSMike Rapoport #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ 238b65a77a8SIgor Grinberg #define CONFIG_SYS_PROMPT "CM-T3x # " 23936b4e2ddSMike Rapoport #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 24036b4e2ddSMike Rapoport /* Print Buffer Size */ 24136b4e2ddSMike Rapoport #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 24236b4e2ddSMike Rapoport sizeof(CONFIG_SYS_PROMPT) + 16) 24336b4e2ddSMike Rapoport #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 24436b4e2ddSMike Rapoport /* Boot Argument Buffer Size */ 24536b4e2ddSMike Rapoport #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) 24636b4e2ddSMike Rapoport 24736b4e2ddSMike Rapoport #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) /* memtest */ 24836b4e2ddSMike Rapoport /* works on */ 24936b4e2ddSMike Rapoport #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ 25036b4e2ddSMike Rapoport 0x01F00000) /* 31MB */ 25136b4e2ddSMike Rapoport 25236b4e2ddSMike Rapoport #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */ 25336b4e2ddSMike Rapoport /* load address */ 25436b4e2ddSMike Rapoport 25536b4e2ddSMike Rapoport /* 25636b4e2ddSMike Rapoport * OMAP3 has 12 GP timers, they can be driven by the system clock 25736b4e2ddSMike Rapoport * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 25836b4e2ddSMike Rapoport * This rate is divided by a local divisor. 25936b4e2ddSMike Rapoport */ 26036b4e2ddSMike Rapoport #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) 26136b4e2ddSMike Rapoport #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 26236b4e2ddSMike Rapoport 26336b4e2ddSMike Rapoport /*----------------------------------------------------------------------- 26436b4e2ddSMike Rapoport * Physical Memory Map 26536b4e2ddSMike Rapoport */ 26636b4e2ddSMike Rapoport #define CONFIG_NR_DRAM_BANKS 1 /* CS1 is never populated */ 26736b4e2ddSMike Rapoport #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 26836b4e2ddSMike Rapoport 26936b4e2ddSMike Rapoport /*----------------------------------------------------------------------- 27036b4e2ddSMike Rapoport * FLASH and environment organization 27136b4e2ddSMike Rapoport */ 27236b4e2ddSMike Rapoport 27336b4e2ddSMike Rapoport /* **** PISMO SUPPORT *** */ 27436b4e2ddSMike Rapoport /* Configure the PISMO */ 27536b4e2ddSMike Rapoport #define PISMO1_NAND_SIZE GPMC_SIZE_128M 27636b4e2ddSMike Rapoport 27736b4e2ddSMike Rapoport /* Monitor at start of flash */ 27836b4e2ddSMike Rapoport #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 2793530a35dSIgor Grinberg #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ 28036b4e2ddSMike Rapoport 2819fc376beSNikita Kiryanov #define CONFIG_ENV_IS_IN_NAND 28236b4e2ddSMike Rapoport #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ 2836cbec7b3SLuca Ceresoli #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET 28436b4e2ddSMike Rapoport #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET 28536b4e2ddSMike Rapoport 28636b4e2ddSMike Rapoport #if defined(CONFIG_CMD_NET) 28736b4e2ddSMike Rapoport #define CONFIG_SMC911X 28836b4e2ddSMike Rapoport #define CONFIG_SMC911X_32_BIT 289b65a77a8SIgor Grinberg #define CM_T3X_SMC911X_BASE 0x2C000000 290b65a77a8SIgor Grinberg #define SB_T35_SMC911X_BASE (CM_T3X_SMC911X_BASE + (16 << 20)) 291b65a77a8SIgor Grinberg #define CONFIG_SMC911X_BASE CM_T3X_SMC911X_BASE 29236b4e2ddSMike Rapoport #endif /* (CONFIG_CMD_NET) */ 29336b4e2ddSMike Rapoport 29436b4e2ddSMike Rapoport /* additions for new relocation code, must be added to all boards */ 29536b4e2ddSMike Rapoport #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 29636b4e2ddSMike Rapoport #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 29736b4e2ddSMike Rapoport #define CONFIG_SYS_INIT_RAM_SIZE 0x800 29836b4e2ddSMike Rapoport #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 29936b4e2ddSMike Rapoport CONFIG_SYS_INIT_RAM_SIZE - \ 30036b4e2ddSMike Rapoport GENERATED_GBL_DATA_SIZE) 30136b4e2ddSMike Rapoport 3022b8754b2SIgor Grinberg /* Status LED */ 3039fc376beSNikita Kiryanov #define CONFIG_STATUS_LED /* Status LED enabled */ 3049fc376beSNikita Kiryanov #define CONFIG_BOARD_SPECIFIC_LED 305*ebc18afdSIgor Grinberg #define CONFIG_GPIO_LED 306*ebc18afdSIgor Grinberg #define GREEN_LED_GPIO 186 /* CM-T35 Green LED is GPIO186 */ 307*ebc18afdSIgor Grinberg #define GREEN_LED_DEV 0 308*ebc18afdSIgor Grinberg #define STATUS_LED_BIT GREEN_LED_GPIO 3092b8754b2SIgor Grinberg #define STATUS_LED_STATE STATUS_LED_ON 3102b8754b2SIgor Grinberg #define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2) 311*ebc18afdSIgor Grinberg #define STATUS_LED_BOOT GREEN_LED_DEV 3122b8754b2SIgor Grinberg 31360e6bdccSNikita Kiryanov #define CONFIG_SPLASHIMAGE_GUARD 31460e6bdccSNikita Kiryanov 3152b8754b2SIgor Grinberg /* GPIO banks */ 3162b8754b2SIgor Grinberg #ifdef CONFIG_STATUS_LED 3179fc376beSNikita Kiryanov #define CONFIG_OMAP3_GPIO_6 /* GPIO186 is in GPIO bank 6 */ 3182b8754b2SIgor Grinberg #endif 3192b8754b2SIgor Grinberg 3207878ca51SNikita Kiryanov /* Display Configuration */ 3217878ca51SNikita Kiryanov #define CONFIG_OMAP3_GPIO_2 3227878ca51SNikita Kiryanov #define CONFIG_VIDEO_OMAP3 3237878ca51SNikita Kiryanov #define LCD_BPP LCD_COLOR16 3247878ca51SNikita Kiryanov 3257878ca51SNikita Kiryanov #define CONFIG_LCD 326f35034feSNikita Kiryanov #define CONFIG_SPLASH_SCREEN 327f35034feSNikita Kiryanov #define CONFIG_CMD_BMP 328f35034feSNikita Kiryanov #define CONFIG_BMP_16BPP 3297878ca51SNikita Kiryanov 33036b4e2ddSMike Rapoport #endif /* __CONFIG_H */ 331