136b4e2ddSMike Rapoport /* 29fc376beSNikita Kiryanov * (C) Copyright 2011 CompuLab, Ltd. 336b4e2ddSMike Rapoport * Mike Rapoport <mike@compulab.co.il> 4dccd9a0bSIgor Grinberg * Igor Grinberg <grinberg@compulab.co.il> 536b4e2ddSMike Rapoport * 636b4e2ddSMike Rapoport * Based on omap3_beagle.h 736b4e2ddSMike Rapoport * (C) Copyright 2006-2008 836b4e2ddSMike Rapoport * Texas Instruments. 936b4e2ddSMike Rapoport * Richard Woodruff <r-woodruff2@ti.com> 1036b4e2ddSMike Rapoport * Syed Mohammed Khasim <x0khasim@ti.com> 1136b4e2ddSMike Rapoport * 12b65a77a8SIgor Grinberg * Configuration settings for the CompuLab CM-T35 and CM-T3730 boards 1336b4e2ddSMike Rapoport * 1436b4e2ddSMike Rapoport * See file CREDITS for list of people who contributed to this 1536b4e2ddSMike Rapoport * project. 1636b4e2ddSMike Rapoport * 1736b4e2ddSMike Rapoport * This program is free software; you can redistribute it and/or 1836b4e2ddSMike Rapoport * modify it under the terms of the GNU General Public License as 1936b4e2ddSMike Rapoport * published by the Free Software Foundation; either version 2 of 2036b4e2ddSMike Rapoport * the License, or (at your option) any later version. 2136b4e2ddSMike Rapoport * 2236b4e2ddSMike Rapoport * This program is distributed in the hope that it will be useful, 2336b4e2ddSMike Rapoport * but WITHOUT ANY WARRANTY; without even the implied warranty of 2436b4e2ddSMike Rapoport * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 2536b4e2ddSMike Rapoport * GNU General Public License for more details. 2636b4e2ddSMike Rapoport * 2736b4e2ddSMike Rapoport * You should have received a copy of the GNU General Public License 2836b4e2ddSMike Rapoport * along with this program; if not, write to the Free Software 29dccd9a0bSIgor Grinberg * Foundation, Inc. 3036b4e2ddSMike Rapoport */ 3136b4e2ddSMike Rapoport 3236b4e2ddSMike Rapoport #ifndef __CONFIG_H 3336b4e2ddSMike Rapoport #define __CONFIG_H 3436b4e2ddSMike Rapoport 3536b4e2ddSMike Rapoport /* 3636b4e2ddSMike Rapoport * High Level Configuration Options 3736b4e2ddSMike Rapoport */ 389fc376beSNikita Kiryanov #define CONFIG_OMAP /* in a TI OMAP core */ 399fc376beSNikita Kiryanov #define CONFIG_OMAP34XX /* which is a 34XX */ 40308252adSMarek Vasut #define CONFIG_OMAP_GPIO 419fc376beSNikita Kiryanov #define CONFIG_CM_T3X /* working with CM-T35 and CM-T3730 */ 4236b4e2ddSMike Rapoport 4336b4e2ddSMike Rapoport #define CONFIG_SYS_TEXT_BASE 0x80008000 4436b4e2ddSMike Rapoport 4536b4e2ddSMike Rapoport #define CONFIG_SDRC /* The chip has SDRC controller */ 4636b4e2ddSMike Rapoport 4736b4e2ddSMike Rapoport #include <asm/arch/cpu.h> /* get chip and board defs */ 4836b4e2ddSMike Rapoport #include <asm/arch/omap3.h> 4936b4e2ddSMike Rapoport 5036b4e2ddSMike Rapoport /* 5136b4e2ddSMike Rapoport * Display CPU and Board information 5236b4e2ddSMike Rapoport */ 539fc376beSNikita Kiryanov #define CONFIG_DISPLAY_CPUINFO 549fc376beSNikita Kiryanov #define CONFIG_DISPLAY_BOARDINFO 5536b4e2ddSMike Rapoport 5636b4e2ddSMike Rapoport /* Clock Defines */ 5736b4e2ddSMike Rapoport #define V_OSCK 26000000 /* Clock output from T2 */ 5836b4e2ddSMike Rapoport #define V_SCLK (V_OSCK >> 1) 5936b4e2ddSMike Rapoport 6036b4e2ddSMike Rapoport #define CONFIG_MISC_INIT_R 6136b4e2ddSMike Rapoport 6236b4e2ddSMike Rapoport #define CONFIG_OF_LIBFDT 1 6336b4e2ddSMike Rapoport /* 6436b4e2ddSMike Rapoport * The early kernel mapping on ARM currently only maps from the base of DRAM 6536b4e2ddSMike Rapoport * to the end of the kernel image. The kernel is loaded at DRAM base + 0x8000. 6636b4e2ddSMike Rapoport * The early kernel pagetable uses DRAM base + 0x4000 to DRAM base + 0x8000, 6736b4e2ddSMike Rapoport * so that leaves DRAM base to DRAM base + 0x4000 available. 6836b4e2ddSMike Rapoport */ 6936b4e2ddSMike Rapoport #define CONFIG_SYS_BOOTMAPSZ 0x4000 7036b4e2ddSMike Rapoport 719fc376beSNikita Kiryanov #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 729fc376beSNikita Kiryanov #define CONFIG_SETUP_MEMORY_TAGS 739fc376beSNikita Kiryanov #define CONFIG_INITRD_TAG 749fc376beSNikita Kiryanov #define CONFIG_REVISION_TAG 7582309250SNikita Kiryanov #define CONFIG_SERIAL_TAG 7636b4e2ddSMike Rapoport 7736b4e2ddSMike Rapoport /* 7836b4e2ddSMike Rapoport * Size of malloc() pool 7936b4e2ddSMike Rapoport */ 80390cdcdaSIgor Grinberg #define CONFIG_ENV_SIZE (16 << 10) /* 16 KiB */ 8136b4e2ddSMike Rapoport /* Sector */ 8236b4e2ddSMike Rapoport #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10)) 8336b4e2ddSMike Rapoport 8436b4e2ddSMike Rapoport /* 8536b4e2ddSMike Rapoport * Hardware drivers 8636b4e2ddSMike Rapoport */ 8736b4e2ddSMike Rapoport 8836b4e2ddSMike Rapoport /* 8936b4e2ddSMike Rapoport * NS16550 Configuration 9036b4e2ddSMike Rapoport */ 9136b4e2ddSMike Rapoport #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ 9236b4e2ddSMike Rapoport 9336b4e2ddSMike Rapoport #define CONFIG_SYS_NS16550 9436b4e2ddSMike Rapoport #define CONFIG_SYS_NS16550_SERIAL 9536b4e2ddSMike Rapoport #define CONFIG_SYS_NS16550_REG_SIZE (-4) 9636b4e2ddSMike Rapoport #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK 9736b4e2ddSMike Rapoport 9836b4e2ddSMike Rapoport /* 9936b4e2ddSMike Rapoport * select serial console configuration 10036b4e2ddSMike Rapoport */ 10136b4e2ddSMike Rapoport #define CONFIG_CONS_INDEX 3 10236b4e2ddSMike Rapoport #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 10336b4e2ddSMike Rapoport #define CONFIG_SERIAL3 3 /* UART3 */ 10436b4e2ddSMike Rapoport 10536b4e2ddSMike Rapoport /* allow to overwrite serial and ethaddr */ 10636b4e2ddSMike Rapoport #define CONFIG_ENV_OVERWRITE 10736b4e2ddSMike Rapoport #define CONFIG_BAUDRATE 115200 10836b4e2ddSMike Rapoport #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 10936b4e2ddSMike Rapoport 115200} 1109fc376beSNikita Kiryanov 1119fc376beSNikita Kiryanov #define CONFIG_GENERIC_MMC 1129fc376beSNikita Kiryanov #define CONFIG_MMC 1139fc376beSNikita Kiryanov #define CONFIG_OMAP_HSMMC 1149fc376beSNikita Kiryanov #define CONFIG_DOS_PARTITION 11536b4e2ddSMike Rapoport 11636b4e2ddSMike Rapoport /* USB */ 1179fc376beSNikita Kiryanov #define CONFIG_USB_OMAP3 118854a7836SNikita Kiryanov #define CONFIG_USB_EHCI 119854a7836SNikita Kiryanov #define CONFIG_USB_EHCI_OMAP 120854a7836SNikita Kiryanov #define CONFIG_USB_ULPI 121854a7836SNikita Kiryanov #define CONFIG_USB_ULPI_VIEWPORT_OMAP 122854a7836SNikita Kiryanov #define CONFIG_USB_STORAGE 123854a7836SNikita Kiryanov #define CONFIG_MUSB_UDC 1249fc376beSNikita Kiryanov #define CONFIG_TWL4030_USB 125854a7836SNikita Kiryanov #define CONFIG_CMD_USB 12636b4e2ddSMike Rapoport 12736b4e2ddSMike Rapoport /* USB device configuration */ 1289fc376beSNikita Kiryanov #define CONFIG_USB_DEVICE 1299fc376beSNikita Kiryanov #define CONFIG_USB_TTY 1309fc376beSNikita Kiryanov #define CONFIG_SYS_CONSOLE_IS_IN_ENV 13136b4e2ddSMike Rapoport 13236b4e2ddSMike Rapoport /* commands to include */ 13336b4e2ddSMike Rapoport #include <config_cmd_default.h> 13436b4e2ddSMike Rapoport 13536b4e2ddSMike Rapoport #define CONFIG_CMD_CACHE 13636b4e2ddSMike Rapoport #define CONFIG_CMD_EXT2 /* EXT2 Support */ 13736b4e2ddSMike Rapoport #define CONFIG_CMD_FAT /* FAT support */ 13836b4e2ddSMike Rapoport #define CONFIG_CMD_JFFS2 /* JFFS2 Support */ 13936b4e2ddSMike Rapoport #define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */ 14036b4e2ddSMike Rapoport #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ 14136b4e2ddSMike Rapoport #define MTDIDS_DEFAULT "nand0=nand" 14236b4e2ddSMike Rapoport #define MTDPARTS_DEFAULT "mtdparts=nand:512k(x-loader),"\ 14336b4e2ddSMike Rapoport "1920k(u-boot),128k(u-boot-env),"\ 14436b4e2ddSMike Rapoport "4m(kernel),-(fs)" 14536b4e2ddSMike Rapoport 14636b4e2ddSMike Rapoport #define CONFIG_CMD_I2C /* I2C serial bus support */ 14736b4e2ddSMike Rapoport #define CONFIG_CMD_MMC /* MMC support */ 14836b4e2ddSMike Rapoport #define CONFIG_CMD_NAND /* NAND support */ 14936b4e2ddSMike Rapoport #define CONFIG_CMD_DHCP 15036b4e2ddSMike Rapoport #define CONFIG_CMD_PING 15136b4e2ddSMike Rapoport 15236b4e2ddSMike Rapoport #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ 15336b4e2ddSMike Rapoport #undef CONFIG_CMD_FPGA /* FPGA configuration Support */ 15436b4e2ddSMike Rapoport #undef CONFIG_CMD_IMLS /* List all found images */ 15536b4e2ddSMike Rapoport 15636b4e2ddSMike Rapoport #define CONFIG_SYS_NO_FLASH 1579fc376beSNikita Kiryanov #define CONFIG_HARD_I2C 15836b4e2ddSMike Rapoport #define CONFIG_SYS_I2C_SPEED 100000 15936b4e2ddSMike Rapoport #define CONFIG_SYS_I2C_SLAVE 1 1609fc376beSNikita Kiryanov #define CONFIG_DRIVER_OMAP34XX_I2C 16182309250SNikita Kiryanov #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 16282309250SNikita Kiryanov #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 16379874ae9SNikita Kiryanov #define CONFIG_I2C_MULTI_BUS 16436b4e2ddSMike Rapoport 16536b4e2ddSMike Rapoport /* 16636b4e2ddSMike Rapoport * TWL4030 16736b4e2ddSMike Rapoport */ 1689fc376beSNikita Kiryanov #define CONFIG_TWL4030_POWER 1699fc376beSNikita Kiryanov #define CONFIG_TWL4030_LED 17036b4e2ddSMike Rapoport 17136b4e2ddSMike Rapoport /* 17236b4e2ddSMike Rapoport * Board NAND Info. 17336b4e2ddSMike Rapoport */ 1749fc376beSNikita Kiryanov #define CONFIG_SYS_NAND_QUIET_TEST 17536b4e2ddSMike Rapoport #define CONFIG_NAND_OMAP_GPMC 17636b4e2ddSMike Rapoport #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ 17736b4e2ddSMike Rapoport /* to access nand */ 17836b4e2ddSMike Rapoport #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ 17936b4e2ddSMike Rapoport /* to access nand at */ 18036b4e2ddSMike Rapoport /* CS0 */ 181816e3921SNikita Kiryanov #define GPMC_NAND_ECC_LP_x8_LAYOUT 18236b4e2ddSMike Rapoport 18336b4e2ddSMike Rapoport #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ 18436b4e2ddSMike Rapoport /* devices */ 18536b4e2ddSMike Rapoport #define CONFIG_JFFS2_NAND 18636b4e2ddSMike Rapoport /* nand device jffs2 lives on */ 18736b4e2ddSMike Rapoport #define CONFIG_JFFS2_DEV "nand0" 18836b4e2ddSMike Rapoport /* start of jffs2 partition */ 18936b4e2ddSMike Rapoport #define CONFIG_JFFS2_PART_OFFSET 0x680000 19036b4e2ddSMike Rapoport #define CONFIG_JFFS2_PART_SIZE 0xf980000 /* size of jffs2 */ 19136b4e2ddSMike Rapoport /* partition */ 19236b4e2ddSMike Rapoport 19336b4e2ddSMike Rapoport /* Environment information */ 19436b4e2ddSMike Rapoport #define CONFIG_BOOTDELAY 10 1959bd5c1adSNikita Kiryanov #define CONFIG_ZERO_BOOTDELAY_CHECK 19636b4e2ddSMike Rapoport 19736b4e2ddSMike Rapoport #define CONFIG_EXTRA_ENV_SETTINGS \ 19836b4e2ddSMike Rapoport "loadaddr=0x82000000\0" \ 19936b4e2ddSMike Rapoport "usbtty=cdc_acm\0" \ 20036b4e2ddSMike Rapoport "console=ttyS2,115200n8\0" \ 20136b4e2ddSMike Rapoport "mpurate=500\0" \ 20236b4e2ddSMike Rapoport "vram=12M\0" \ 20336b4e2ddSMike Rapoport "dvimode=1024x768MR-16@60\0" \ 20436b4e2ddSMike Rapoport "defaultdisplay=dvi\0" \ 20536b4e2ddSMike Rapoport "mmcdev=0\0" \ 20636b4e2ddSMike Rapoport "mmcroot=/dev/mmcblk0p2 rw\0" \ 20736b4e2ddSMike Rapoport "mmcrootfstype=ext3 rootwait\0" \ 20836b4e2ddSMike Rapoport "nandroot=/dev/mtdblock4 rw\0" \ 20936b4e2ddSMike Rapoport "nandrootfstype=jffs2\0" \ 21036b4e2ddSMike Rapoport "mmcargs=setenv bootargs console=${console} " \ 21136b4e2ddSMike Rapoport "mpurate=${mpurate} " \ 21236b4e2ddSMike Rapoport "vram=${vram} " \ 21336b4e2ddSMike Rapoport "omapfb.mode=dvi:${dvimode} " \ 21436b4e2ddSMike Rapoport "omapfb.debug=y " \ 21536b4e2ddSMike Rapoport "omapdss.def_disp=${defaultdisplay} " \ 21636b4e2ddSMike Rapoport "root=${mmcroot} " \ 21736b4e2ddSMike Rapoport "rootfstype=${mmcrootfstype}\0" \ 21836b4e2ddSMike Rapoport "nandargs=setenv bootargs console=${console} " \ 21936b4e2ddSMike Rapoport "mpurate=${mpurate} " \ 22036b4e2ddSMike Rapoport "vram=${vram} " \ 22136b4e2ddSMike Rapoport "omapfb.mode=dvi:${dvimode} " \ 22236b4e2ddSMike Rapoport "omapfb.debug=y " \ 22336b4e2ddSMike Rapoport "omapdss.def_disp=${defaultdisplay} " \ 22436b4e2ddSMike Rapoport "root=${nandroot} " \ 22536b4e2ddSMike Rapoport "rootfstype=${nandrootfstype}\0" \ 22636b4e2ddSMike Rapoport "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ 22736b4e2ddSMike Rapoport "bootscript=echo Running bootscript from mmc ...; " \ 22836b4e2ddSMike Rapoport "source ${loadaddr}\0" \ 22936b4e2ddSMike Rapoport "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ 23036b4e2ddSMike Rapoport "mmcboot=echo Booting from mmc ...; " \ 23136b4e2ddSMike Rapoport "run mmcargs; " \ 23236b4e2ddSMike Rapoport "bootm ${loadaddr}\0" \ 23336b4e2ddSMike Rapoport "nandboot=echo Booting from nand ...; " \ 23436b4e2ddSMike Rapoport "run nandargs; " \ 23536b4e2ddSMike Rapoport "nand read ${loadaddr} 280000 400000; " \ 23636b4e2ddSMike Rapoport "bootm ${loadaddr}\0" \ 23736b4e2ddSMike Rapoport 23836b4e2ddSMike Rapoport #define CONFIG_BOOTCOMMAND \ 23966968110SAndrew Bradford "mmc dev ${mmcdev}; if mmc rescan; then " \ 24036b4e2ddSMike Rapoport "if run loadbootscript; then " \ 24136b4e2ddSMike Rapoport "run bootscript; " \ 24236b4e2ddSMike Rapoport "else " \ 24336b4e2ddSMike Rapoport "if run loaduimage; then " \ 24436b4e2ddSMike Rapoport "run mmcboot; " \ 24536b4e2ddSMike Rapoport "else run nandboot; " \ 24636b4e2ddSMike Rapoport "fi; " \ 24736b4e2ddSMike Rapoport "fi; " \ 24836b4e2ddSMike Rapoport "else run nandboot; fi" 24936b4e2ddSMike Rapoport 25036b4e2ddSMike Rapoport /* 25136b4e2ddSMike Rapoport * Miscellaneous configurable options 25236b4e2ddSMike Rapoport */ 25341d7e702SIgor Grinberg #define CONFIG_AUTO_COMPLETE 25441d7e702SIgor Grinberg #define CONFIG_CMDLINE_EDITING 25541d7e702SIgor Grinberg #define CONFIG_TIMESTAMP 25641d7e702SIgor Grinberg #define CONFIG_SYS_AUTOLOAD "no" 25736b4e2ddSMike Rapoport #define CONFIG_SYS_LONGHELP /* undef to save memory */ 25836b4e2ddSMike Rapoport #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ 259b65a77a8SIgor Grinberg #define CONFIG_SYS_PROMPT "CM-T3x # " 26036b4e2ddSMike Rapoport #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 26136b4e2ddSMike Rapoport /* Print Buffer Size */ 26236b4e2ddSMike Rapoport #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 26336b4e2ddSMike Rapoport sizeof(CONFIG_SYS_PROMPT) + 16) 26436b4e2ddSMike Rapoport #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 26536b4e2ddSMike Rapoport /* Boot Argument Buffer Size */ 26636b4e2ddSMike Rapoport #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) 26736b4e2ddSMike Rapoport 26836b4e2ddSMike Rapoport #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) /* memtest */ 26936b4e2ddSMike Rapoport /* works on */ 27036b4e2ddSMike Rapoport #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ 27136b4e2ddSMike Rapoport 0x01F00000) /* 31MB */ 27236b4e2ddSMike Rapoport 27336b4e2ddSMike Rapoport #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */ 27436b4e2ddSMike Rapoport /* load address */ 27536b4e2ddSMike Rapoport 27636b4e2ddSMike Rapoport /* 27736b4e2ddSMike Rapoport * OMAP3 has 12 GP timers, they can be driven by the system clock 27836b4e2ddSMike Rapoport * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 27936b4e2ddSMike Rapoport * This rate is divided by a local divisor. 28036b4e2ddSMike Rapoport */ 28136b4e2ddSMike Rapoport #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) 28236b4e2ddSMike Rapoport #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 28336b4e2ddSMike Rapoport #define CONFIG_SYS_HZ 1000 28436b4e2ddSMike Rapoport 28536b4e2ddSMike Rapoport /*----------------------------------------------------------------------- 28636b4e2ddSMike Rapoport * Physical Memory Map 28736b4e2ddSMike Rapoport */ 28836b4e2ddSMike Rapoport #define CONFIG_NR_DRAM_BANKS 1 /* CS1 is never populated */ 28936b4e2ddSMike Rapoport #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 29036b4e2ddSMike Rapoport 29136b4e2ddSMike Rapoport /*----------------------------------------------------------------------- 29236b4e2ddSMike Rapoport * FLASH and environment organization 29336b4e2ddSMike Rapoport */ 29436b4e2ddSMike Rapoport 29536b4e2ddSMike Rapoport /* **** PISMO SUPPORT *** */ 29636b4e2ddSMike Rapoport /* Configure the PISMO */ 29736b4e2ddSMike Rapoport #define PISMO1_NAND_SIZE GPMC_SIZE_128M 29836b4e2ddSMike Rapoport 29936b4e2ddSMike Rapoport /* Monitor at start of flash */ 30036b4e2ddSMike Rapoport #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 3013530a35dSIgor Grinberg #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ 30236b4e2ddSMike Rapoport 3039fc376beSNikita Kiryanov #define CONFIG_ENV_IS_IN_NAND 30436b4e2ddSMike Rapoport #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ 3056cbec7b3SLuca Ceresoli #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET 30636b4e2ddSMike Rapoport #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET 30736b4e2ddSMike Rapoport 30836b4e2ddSMike Rapoport #if defined(CONFIG_CMD_NET) 30936b4e2ddSMike Rapoport #define CONFIG_SMC911X 31036b4e2ddSMike Rapoport #define CONFIG_SMC911X_32_BIT 311b65a77a8SIgor Grinberg #define CM_T3X_SMC911X_BASE 0x2C000000 312b65a77a8SIgor Grinberg #define SB_T35_SMC911X_BASE (CM_T3X_SMC911X_BASE + (16 << 20)) 313b65a77a8SIgor Grinberg #define CONFIG_SMC911X_BASE CM_T3X_SMC911X_BASE 31436b4e2ddSMike Rapoport #endif /* (CONFIG_CMD_NET) */ 31536b4e2ddSMike Rapoport 31636b4e2ddSMike Rapoport /* additions for new relocation code, must be added to all boards */ 31736b4e2ddSMike Rapoport #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 31836b4e2ddSMike Rapoport #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 31936b4e2ddSMike Rapoport #define CONFIG_SYS_INIT_RAM_SIZE 0x800 32036b4e2ddSMike Rapoport #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 32136b4e2ddSMike Rapoport CONFIG_SYS_INIT_RAM_SIZE - \ 32236b4e2ddSMike Rapoport GENERATED_GBL_DATA_SIZE) 32336b4e2ddSMike Rapoport 3242b8754b2SIgor Grinberg /* Status LED */ 3259fc376beSNikita Kiryanov #define CONFIG_STATUS_LED /* Status LED enabled */ 3269fc376beSNikita Kiryanov #define CONFIG_BOARD_SPECIFIC_LED 3272b8754b2SIgor Grinberg #define STATUS_LED_GREEN 0 3282b8754b2SIgor Grinberg #define STATUS_LED_BIT STATUS_LED_GREEN 3292b8754b2SIgor Grinberg #define STATUS_LED_STATE STATUS_LED_ON 3302b8754b2SIgor Grinberg #define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2) 3312b8754b2SIgor Grinberg #define STATUS_LED_BOOT STATUS_LED_BIT 3322b8754b2SIgor Grinberg #define GREEN_LED_GPIO 186 /* CM-T35 Green LED is GPIO186 */ 3332b8754b2SIgor Grinberg 3342b8754b2SIgor Grinberg /* GPIO banks */ 3352b8754b2SIgor Grinberg #ifdef CONFIG_STATUS_LED 3369fc376beSNikita Kiryanov #define CONFIG_OMAP3_GPIO_6 /* GPIO186 is in GPIO bank 6 */ 3372b8754b2SIgor Grinberg #endif 3382b8754b2SIgor Grinberg 339*7878ca51SNikita Kiryanov /* Display Configuration */ 340*7878ca51SNikita Kiryanov #define CONFIG_OMAP3_GPIO_2 341*7878ca51SNikita Kiryanov #define CONFIG_VIDEO_OMAP3 342*7878ca51SNikita Kiryanov #define LCD_BPP LCD_COLOR16 343*7878ca51SNikita Kiryanov 344*7878ca51SNikita Kiryanov #define CONFIG_LCD 345*7878ca51SNikita Kiryanov 34636b4e2ddSMike Rapoport #endif /* __CONFIG_H */ 347