1 /* 2 * Config file for Compulab CM-T335 board 3 * 4 * Copyright (C) 2013, Compulab Ltd - http://compulab.co.il/ 5 * 6 * Author: Ilya Ledvich <ilya@compulab.co.il> 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 #ifndef __CONFIG_CM_T335_H 12 #define __CONFIG_CM_T335_H 13 14 #define CONFIG_CM_T335 15 #define CONFIG_NAND 16 17 #include <configs/ti_am335x_common.h> 18 19 #undef CONFIG_BOARD_LATE_INIT 20 #undef CONFIG_SPI 21 #undef CONFIG_OMAP3_SPI 22 #undef CONFIG_CMD_SPI 23 #undef CONFIG_SPL_OS_BOOT 24 #undef CONFIG_BOOTCOUNT_LIMIT 25 #undef CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC 26 27 #undef CONFIG_MAX_RAM_BANK_SIZE 28 #define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* 512MB */ 29 30 #define CONFIG_OMAP_COMMON 31 32 #define MACH_TYPE_CM_T335 4586 /* Until the next sync */ 33 #define CONFIG_MACH_TYPE MACH_TYPE_CM_T335 34 35 /* Clock Defines */ 36 #define V_OSCK 25000000 /* Clock output from T2 */ 37 #define V_SCLK (V_OSCK) 38 39 #define CONFIG_ENV_SIZE (16 << 10) /* 16 KiB */ 40 41 #ifndef CONFIG_SPL_BUILD 42 #define MMCARGS \ 43 "mmcdev=0\0" \ 44 "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \ 45 "mmcrootfstype=ext4\0" \ 46 "mmcargs=setenv bootargs console=${console} " \ 47 "root=${mmcroot} " \ 48 "rootfstype=${mmcrootfstype}\0" \ 49 "mmcboot=echo Booting from mmc ...; " \ 50 "run mmcargs; " \ 51 "bootm ${loadaddr}\0" 52 53 #define NANDARGS \ 54 "mtdids=" MTDIDS_DEFAULT "\0" \ 55 "mtdparts=" MTDPARTS_DEFAULT "\0" \ 56 "nandroot=ubi0:rootfs rw\0" \ 57 "nandrootfstype=ubifs\0" \ 58 "nandargs=setenv bootargs console=${console} " \ 59 "root=${nandroot} " \ 60 "rootfstype=${nandrootfstype} " \ 61 "ubi.mtd=${rootfs_name}\0" \ 62 "nandboot=echo Booting from nand ...; " \ 63 "run nandargs; " \ 64 "nboot ${loadaddr} nand0 900000; " \ 65 "bootm ${loadaddr}\0" 66 67 68 #define CONFIG_EXTRA_ENV_SETTINGS \ 69 "loadaddr=82000000\0" \ 70 "console=ttyO0,115200n8\0" \ 71 "rootfs_name=rootfs\0" \ 72 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ 73 "bootscript=echo Running bootscript from mmc ...; " \ 74 "source ${loadaddr}\0" \ 75 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ 76 MMCARGS \ 77 NANDARGS 78 79 #define CONFIG_BOOTCOMMAND \ 80 "mmc dev ${mmcdev}; if mmc rescan; then " \ 81 "if run loadbootscript; then " \ 82 "run bootscript; " \ 83 "else " \ 84 "if run loaduimage; then " \ 85 "run mmcboot; " \ 86 "else run nandboot; " \ 87 "fi; " \ 88 "fi; " \ 89 "else run nandboot; fi" 90 #endif /* CONFIG_SPL_BUILD */ 91 92 #define CONFIG_TIMESTAMP 93 #define CONFIG_SYS_AUTOLOAD "no" 94 95 /* Serial console configuration */ 96 #define CONFIG_CONS_INDEX 1 97 #define CONFIG_SERIAL1 1 /* UART0 */ 98 99 /* NS16550 Configuration */ 100 #define CONFIG_SYS_NS16550_COM1 0x44e09000 /* UART0 */ 101 #define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */ 102 #define CONFIG_BAUDRATE 115200 103 104 /* I2C Configuration */ 105 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */ 106 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 107 #define CONFIG_SYS_I2C_EEPROM_BUS 0 108 109 /* SPL */ 110 #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds" 111 112 /* Network. */ 113 #define CONFIG_PHY_GIGE 114 #define CONFIG_PHYLIB 115 #define CONFIG_PHY_ATHEROS 116 117 /* NAND support */ 118 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 119 #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ 120 CONFIG_SYS_NAND_PAGE_SIZE) 121 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 122 #define CONFIG_SYS_NAND_OOBSIZE 64 123 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) 124 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS 125 #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ 126 10, 11, 12, 13, 14, 15, 16, 17, \ 127 18, 19, 20, 21, 22, 23, 24, 25, \ 128 26, 27, 28, 29, 30, 31, 32, 33, \ 129 34, 35, 36, 37, 38, 39, 40, 41, \ 130 42, 43, 44, 45, 46, 47, 48, 49, \ 131 50, 51, 52, 53, 54, 55, 56, 57, } 132 133 #define CONFIG_SYS_NAND_ECCSIZE 512 134 #define CONFIG_SYS_NAND_ECCBYTES 14 135 136 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 137 138 #undef CONFIG_SYS_NAND_U_BOOT_OFFS 139 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x200000 140 141 #define CONFIG_CMD_NAND 142 #define MTDIDS_DEFAULT "nand0=nand" 143 #define MTDPARTS_DEFAULT "mtdparts=nand:2m(spl)," \ 144 "1m(u-boot),1m(u-boot-env)," \ 145 "1m(dtb),4m(splash)," \ 146 "6m(kernel),-(rootfs)" 147 #define CONFIG_ENV_IS_IN_NAND 148 #define CONFIG_ENV_OFFSET 0x300000 /* environment starts here */ 149 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ 150 #define CONFIG_SYS_NAND_ONFI_DETECTION 151 #ifdef CONFIG_SPL_OS_BOOT 152 #define CONFIG_CMD_SPL_NAND_OFS 0x400000 /* un-assigned: (using dtb) */ 153 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x500000 154 #define CONFIG_CMD_SPL_WRITE_SIZE 0x2000 155 #endif 156 157 /* GPIO pin + bank to pin ID mapping */ 158 #define GPIO_PIN(_bank, _pin) ((_bank << 5) + _pin) 159 160 /* Status LED */ 161 #define CONFIG_STATUS_LED 162 #define CONFIG_GPIO_LED 163 #define CONFIG_BOARD_SPECIFIC_LED 164 #define STATUS_LED_BIT GPIO_PIN(2, 0) 165 /* Status LED polarity is inversed, so init it in the "off" state */ 166 #define STATUS_LED_STATE STATUS_LED_OFF 167 #define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2) 168 #define STATUS_LED_BOOT 0 169 170 #ifndef CONFIG_SPL_BUILD 171 /* 172 * Enable PCA9555 at I2C0-0x26. 173 * First select the I2C0 bus with "i2c dev 0", then use "pca953x" command. 174 */ 175 #define CONFIG_PCA953X 176 #define CONFIG_CMD_PCA953X 177 #define CONFIG_CMD_PCA953X_INFO 178 #define CONFIG_SYS_I2C_PCA953X_ADDR 0x26 179 #define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x26, 16} } 180 #endif /* CONFIG_SPL_BUILD */ 181 182 #endif /* __CONFIG_CM_T335_H */ 183 184