1 /* 2 * Config file for Compulab CM-T335 board 3 * 4 * Copyright (C) 2013, Compulab Ltd - http://compulab.co.il/ 5 * 6 * Author: Ilya Ledvich <ilya@compulab.co.il> 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 #ifndef __CONFIG_CM_T335_H 12 #define __CONFIG_CM_T335_H 13 14 #define CONFIG_CM_T335 15 #define CONFIG_NAND 16 17 #include <configs/ti_am335x_common.h> 18 19 #undef CONFIG_BOARD_LATE_INIT 20 #undef CONFIG_SPI 21 #undef CONFIG_OMAP3_SPI 22 #undef CONFIG_CMD_SPI 23 #undef CONFIG_SPL_OS_BOOT 24 #undef CONFIG_BOOTCOUNT_LIMIT 25 #undef CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC 26 27 #undef CONFIG_MAX_RAM_BANK_SIZE 28 #define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* 512MB */ 29 30 #undef CONFIG_SYS_PROMPT 31 #define CONFIG_SYS_PROMPT "CM-T335 # " 32 33 #define CONFIG_OMAP_COMMON 34 35 #define MACH_TYPE_CM_T335 4586 /* Until the next sync */ 36 #define CONFIG_MACH_TYPE MACH_TYPE_CM_T335 37 38 /* Clock Defines */ 39 #define V_OSCK 25000000 /* Clock output from T2 */ 40 #define V_SCLK (V_OSCK) 41 42 #define CONFIG_ENV_SIZE (16 << 10) /* 16 KiB */ 43 44 #ifndef CONFIG_SPL_BUILD 45 #define MMCARGS \ 46 "mmcdev=0\0" \ 47 "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \ 48 "mmcrootfstype=ext4\0" \ 49 "mmcargs=setenv bootargs console=${console} " \ 50 "root=${mmcroot} " \ 51 "rootfstype=${mmcrootfstype}\0" \ 52 "mmcboot=echo Booting from mmc ...; " \ 53 "run mmcargs; " \ 54 "bootm ${loadaddr}\0" 55 56 #define NANDARGS \ 57 "mtdids=" MTDIDS_DEFAULT "\0" \ 58 "mtdparts=" MTDPARTS_DEFAULT "\0" \ 59 "nandroot=ubi0:rootfs rw\0" \ 60 "nandrootfstype=ubifs\0" \ 61 "nandargs=setenv bootargs console=${console} " \ 62 "root=${nandroot} " \ 63 "rootfstype=${nandrootfstype} " \ 64 "ubi.mtd=${rootfs_name}\0" \ 65 "nandboot=echo Booting from nand ...; " \ 66 "run nandargs; " \ 67 "nboot ${loadaddr} nand0 900000; " \ 68 "bootm ${loadaddr}\0" 69 70 71 #define CONFIG_EXTRA_ENV_SETTINGS \ 72 "loadaddr=82000000\0" \ 73 "console=ttyO0,115200n8\0" \ 74 "rootfs_name=rootfs\0" \ 75 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ 76 "bootscript=echo Running bootscript from mmc ...; " \ 77 "source ${loadaddr}\0" \ 78 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ 79 MMCARGS \ 80 NANDARGS 81 82 #define CONFIG_BOOTCOMMAND \ 83 "mmc dev ${mmcdev}; if mmc rescan; then " \ 84 "if run loadbootscript; then " \ 85 "run bootscript; " \ 86 "else " \ 87 "if run loaduimage; then " \ 88 "run mmcboot; " \ 89 "else run nandboot; " \ 90 "fi; " \ 91 "fi; " \ 92 "else run nandboot; fi" 93 #endif /* CONFIG_SPL_BUILD */ 94 95 #define CONFIG_TIMESTAMP 96 #define CONFIG_SYS_AUTOLOAD "no" 97 98 /* Serial console configuration */ 99 #define CONFIG_CONS_INDEX 1 100 #define CONFIG_SERIAL1 1 /* UART0 */ 101 102 /* NS16550 Configuration */ 103 #define CONFIG_SYS_NS16550_COM1 0x44e09000 /* UART0 */ 104 #define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */ 105 #define CONFIG_BAUDRATE 115200 106 107 /* I2C Configuration */ 108 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */ 109 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 110 111 /* SPL */ 112 #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds" 113 114 /* Network. */ 115 #define CONFIG_PHY_GIGE 116 #define CONFIG_PHYLIB 117 #define CONFIG_PHY_ADDR 0 118 #define CONFIG_PHY_ATHEROS 119 120 /* NAND support */ 121 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 122 #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ 123 CONFIG_SYS_NAND_PAGE_SIZE) 124 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 125 #define CONFIG_SYS_NAND_OOBSIZE 64 126 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) 127 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS 128 #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ 129 10, 11, 12, 13, 14, 15, 16, 17, \ 130 18, 19, 20, 21, 22, 23, 24, 25, \ 131 26, 27, 28, 29, 30, 31, 32, 33, \ 132 34, 35, 36, 37, 38, 39, 40, 41, \ 133 42, 43, 44, 45, 46, 47, 48, 49, \ 134 50, 51, 52, 53, 54, 55, 56, 57, } 135 136 #define CONFIG_SYS_NAND_ECCSIZE 512 137 #define CONFIG_SYS_NAND_ECCBYTES 14 138 139 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 140 141 #undef CONFIG_SYS_NAND_U_BOOT_OFFS 142 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x200000 143 144 #define CONFIG_CMD_NAND 145 #define GPMC_NAND_ECC_LP_x8_LAYOUT 146 #define MTDIDS_DEFAULT "nand0=nand" 147 #define MTDPARTS_DEFAULT "mtdparts=nand:2m(spl)," \ 148 "1m(u-boot),1m(u-boot-env)," \ 149 "1m(dtb),4m(splash)," \ 150 "6m(kernel),-(rootfs)" 151 #define CONFIG_ENV_IS_IN_NAND 152 #define CONFIG_ENV_OFFSET 0x300000 /* environment starts here */ 153 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ 154 #define CONFIG_SYS_NAND_ONFI_DETECTION 155 156 /* GPIO pin + bank to pin ID mapping */ 157 #define GPIO_PIN(_bank, _pin) ((_bank << 5) + _pin) 158 159 /* Status LED */ 160 #define CONFIG_STATUS_LED 161 #define CONFIG_GPIO_LED 162 #define CONFIG_BOARD_SPECIFIC_LED 163 #define STATUS_LED_BIT GPIO_PIN(2, 0) 164 /* Status LED polarity is inversed, so init it in the "off" state */ 165 #define STATUS_LED_STATE STATUS_LED_OFF 166 #define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2) 167 #define STATUS_LED_BOOT 0 168 169 #ifndef CONFIG_SPL_BUILD 170 /* 171 * Enable PCA9555 at I2C0-0x26. 172 * First select the I2C0 bus with "i2c dev 0", then use "pca953x" command. 173 */ 174 #define CONFIG_PCA953X 175 #define CONFIG_CMD_PCA953X 176 #define CONFIG_CMD_PCA953X_INFO 177 #define CONFIG_SYS_I2C_PCA953X_ADDR 0x26 178 #define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x26, 16} } 179 #endif /* CONFIG_SPL_BUILD */ 180 181 #endif /* __CONFIG_CM_T335_H */ 182 183