1 /* 2 * Config file for Compulab CM-T335 board 3 * 4 * Copyright (C) 2013, Compulab Ltd - http://compulab.co.il/ 5 * 6 * Author: Ilya Ledvich <ilya@compulab.co.il> 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 #ifndef __CONFIG_CM_T335_H 12 #define __CONFIG_CM_T335_H 13 14 #define CONFIG_CM_T335 15 16 #include <configs/ti_am335x_common.h> 17 18 #undef CONFIG_MAX_RAM_BANK_SIZE 19 #define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* 512MB */ 20 21 #define CONFIG_MACH_TYPE MACH_TYPE_CM_T335 22 23 /* Clock Defines */ 24 #define V_OSCK 25000000 /* Clock output from T2 */ 25 #define V_SCLK (V_OSCK) 26 27 #define CONFIG_ENV_SIZE (16 << 10) /* 16 KiB */ 28 29 #ifndef CONFIG_SPL_BUILD 30 #define MMCARGS \ 31 "mmcdev=0\0" \ 32 "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \ 33 "mmcrootfstype=ext4\0" \ 34 "mmcargs=setenv bootargs console=${console} " \ 35 "root=${mmcroot} " \ 36 "rootfstype=${mmcrootfstype}\0" \ 37 "mmcboot=echo Booting from mmc ...; " \ 38 "run mmcargs; " \ 39 "bootm ${loadaddr}\0" 40 41 #define NANDARGS \ 42 "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ 43 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ 44 "nandroot=ubi0:rootfs rw\0" \ 45 "nandrootfstype=ubifs\0" \ 46 "nandargs=setenv bootargs console=${console} " \ 47 "root=${nandroot} " \ 48 "rootfstype=${nandrootfstype} " \ 49 "ubi.mtd=${rootfs_name}\0" \ 50 "nandboot=echo Booting from nand ...; " \ 51 "run nandargs; " \ 52 "nboot ${loadaddr} nand0 900000; " \ 53 "bootm ${loadaddr}\0" 54 55 #define CONFIG_EXTRA_ENV_SETTINGS \ 56 "loadaddr=82000000\0" \ 57 "console=ttyO0,115200n8\0" \ 58 "rootfs_name=rootfs\0" \ 59 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ 60 "bootscript=echo Running bootscript from mmc ...; " \ 61 "source ${loadaddr}\0" \ 62 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ 63 MMCARGS \ 64 NANDARGS 65 66 #define CONFIG_BOOTCOMMAND \ 67 "mmc dev ${mmcdev}; if mmc rescan; then " \ 68 "if run loadbootscript; then " \ 69 "run bootscript; " \ 70 "else " \ 71 "if run loaduimage; then " \ 72 "run mmcboot; " \ 73 "else run nandboot; " \ 74 "fi; " \ 75 "fi; " \ 76 "else run nandboot; fi" 77 #endif /* CONFIG_SPL_BUILD */ 78 79 #define CONFIG_TIMESTAMP 80 #define CONFIG_SYS_AUTOLOAD "no" 81 82 /* Serial console configuration */ 83 #define CONFIG_SERIAL1 1 /* UART0 */ 84 85 /* NS16550 Configuration */ 86 #define CONFIG_SYS_NS16550_COM1 0x44e09000 /* UART0 */ 87 #define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */ 88 89 /* I2C Configuration */ 90 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */ 91 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 92 #define CONFIG_SYS_I2C_EEPROM_BUS 0 93 94 /* SPL */ 95 96 /* Network. */ 97 #define CONFIG_PHY_ATHEROS 98 99 /* NAND support */ 100 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 101 #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ 102 CONFIG_SYS_NAND_PAGE_SIZE) 103 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 104 #define CONFIG_SYS_NAND_OOBSIZE 64 105 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) 106 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS 107 #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ 108 10, 11, 12, 13, 14, 15, 16, 17, \ 109 18, 19, 20, 21, 22, 23, 24, 25, \ 110 26, 27, 28, 29, 30, 31, 32, 33, \ 111 34, 35, 36, 37, 38, 39, 40, 41, \ 112 42, 43, 44, 45, 46, 47, 48, 49, \ 113 50, 51, 52, 53, 54, 55, 56, 57, } 114 115 #define CONFIG_SYS_NAND_ECCSIZE 512 116 #define CONFIG_SYS_NAND_ECCBYTES 14 117 118 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 119 120 #undef CONFIG_SYS_NAND_U_BOOT_OFFS 121 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x200000 122 123 #define CONFIG_ENV_OFFSET 0x300000 /* environment starts here */ 124 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ 125 #define CONFIG_SYS_NAND_ONFI_DETECTION 126 #ifdef CONFIG_SPL_OS_BOOT 127 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x500000 128 #endif 129 130 /* GPIO pin + bank to pin ID mapping */ 131 #define GPIO_PIN(_bank, _pin) ((_bank << 5) + _pin) 132 133 /* Status LED */ 134 /* Status LED polarity is inversed, so init it in the "off" state */ 135 136 /* EEPROM */ 137 #define CONFIG_ENV_EEPROM_IS_ON_I2C 138 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 139 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 140 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 141 #define CONFIG_SYS_EEPROM_SIZE 256 142 143 #ifndef CONFIG_SPL_BUILD 144 /* 145 * Enable PCA9555 at I2C0-0x26. 146 * First select the I2C0 bus with "i2c dev 0", then use "pca953x" command. 147 */ 148 #define CONFIG_PCA953X 149 #define CONFIG_SYS_I2C_PCA953X_ADDR 0x26 150 #define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x26, 16} } 151 #endif /* CONFIG_SPL_BUILD */ 152 153 #endif /* __CONFIG_CM_T335_H */ 154 155