xref: /openbmc/u-boot/include/configs/cm_fx6.h (revision d024236e5a31a2b4b82cbcc98b31b8170fc88d28)
1 /*
2  * Config file for Compulab CM-FX6 board
3  *
4  * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/
5  *
6  * Author: Nikita Kiryanov <nikita@compulab.co.il>
7  *
8  * SPDX-License-Identifier:	GPL-2.0+
9  */
10 
11 #ifndef __CONFIG_CM_FX6_H
12 #define __CONFIG_CM_FX6_H
13 
14 #include "mx6_common.h"
15 
16 /* Machine config */
17 #define CONFIG_SYS_LITTLE_ENDIAN
18 #define CONFIG_MACH_TYPE		4273
19 
20 /* MMC */
21 #define CONFIG_SYS_FSL_USDHC_NUM	3
22 #define CONFIG_SYS_FSL_ESDHC_ADDR	USDHC2_BASE_ADDR
23 
24 /* RAM */
25 #define PHYS_SDRAM_1			MMDC0_ARB_BASE_ADDR
26 #define PHYS_SDRAM_2			MMDC1_ARB_BASE_ADDR
27 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
28 #define CONFIG_NR_DRAM_BANKS		2
29 #define CONFIG_SYS_MEMTEST_START	0x10000000
30 #define CONFIG_SYS_MEMTEST_END		0x10010000
31 #define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
32 #define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE
33 #define CONFIG_SYS_INIT_SP_OFFSET \
34 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
35 #define CONFIG_SYS_INIT_SP_ADDR \
36 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
37 
38 /* Serial console */
39 #define CONFIG_MXC_UART
40 #define CONFIG_MXC_UART_BASE		UART4_BASE
41 #define CONFIG_SYS_BAUDRATE_TABLE	{9600, 19200, 38400, 57600, 115200}
42 
43 /* SPI flash */
44 #define CONFIG_SF_DEFAULT_BUS		0
45 #define CONFIG_SF_DEFAULT_CS		0
46 #define CONFIG_SF_DEFAULT_SPEED		25000000
47 #define CONFIG_SF_DEFAULT_MODE		(SPI_MODE_0)
48 
49 /* MTD support */
50 #ifndef CONFIG_SPL_BUILD
51 #define CONFIG_MTD_DEVICE
52 #define CONFIG_MTD_PARTITIONS
53 #define CONFIG_SPI_FLASH_MTD
54 #endif
55 
56 /* Environment */
57 #define CONFIG_ENV_SPI_MAX_HZ		CONFIG_SF_DEFAULT_SPEED
58 #define CONFIG_ENV_SPI_MODE		CONFIG_SF_DEFAULT_MODE
59 #define CONFIG_ENV_SPI_BUS		CONFIG_SF_DEFAULT_BUS
60 #define CONFIG_ENV_SPI_CS		CONFIG_SF_DEFAULT_CS
61 #define CONFIG_ENV_SECT_SIZE		(64 * 1024)
62 #define CONFIG_ENV_SIZE			(8 * 1024)
63 #define CONFIG_ENV_OFFSET		(768 * 1024)
64 
65 #ifndef CONFIG_SPL_BUILD
66 #define CONFIG_EXTRA_ENV_SETTINGS \
67 	"fdt_high=0xffffffff\0" \
68 	"initrd_high=0xffffffff\0" \
69 	"fdt_addr_r=0x18000000\0" \
70 	"ramdisk_addr_r=0x13000000\0" \
71 	"kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
72 	"pxefile_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
73 	"scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \
74 	"fdtfile=undefined\0" \
75 	"stdin=serial,usbkbd\0" \
76 	"stdout=serial,vga\0" \
77 	"stderr=serial,vga\0" \
78 	"panel=HDMI\0" \
79 	"autoload=no\0" \
80 	"uImage=uImage-cm-fx6\0" \
81 	"zImage=zImage-cm-fx6\0" \
82 	"kernel=uImage-cm-fx6\0" \
83 	"dtb=cm-fx6.dtb\0" \
84 	"console=ttymxc3,115200\0" \
85 	"ethprime=FEC0\0" \
86 	"video_hdmi=mxcfb0:dev=hdmi,1920x1080M-32@50,if=RGB32\0" \
87 	"video_dvi=mxcfb0:dev=dvi,1280x800M-32@50,if=RGB32\0" \
88 	"doboot=bootm ${kernel_addr_r}\0" \
89 	"doloadfdt=false\0" \
90 	"mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
91 	"mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
92 	"setboottypez=setenv kernel ${zImage};" \
93 		"setenv doboot bootz ${kernel_addr_r} - ${fdt_addr_r};" \
94 		"setenv doloadfdt true;\0" \
95 	"setboottypem=setenv kernel ${uImage};" \
96 		"setenv doboot bootm ${kernel_addr_r};" \
97 		"setenv doloadfdt false;\0"\
98 	"mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
99 	"sataroot=/dev/sda2 rw rootwait\0" \
100 	"nandroot=/dev/mtdblock4 rw\0" \
101 	"nandrootfstype=ubifs\0" \
102 	"mmcargs=setenv bootargs console=${console} root=${mmcroot} " \
103 		"${video} ${extrabootargs}\0" \
104 	"sataargs=setenv bootargs console=${console} root=${sataroot} " \
105 		"${video} ${extrabootargs}\0" \
106 	"nandargs=setenv bootargs console=${console} " \
107 		"root=${nandroot} " \
108 		"rootfstype=${nandrootfstype} " \
109 		"${video} ${extrabootargs}\0" \
110 	"nandboot=if run nandloadkernel; then " \
111 			"run nandloadfdt;" \
112 			"run setboottypem;" \
113 			"run storagebootcmd;" \
114 			"run setboottypez;" \
115 			"run storagebootcmd;" \
116 		"fi;\0" \
117 	"run_eboot=echo Starting EBOOT ...; "\
118 		"mmc dev 2 && " \
119 		"mmc rescan && mmc read 10042000 a 400 && go 10042000\0" \
120 	"loadkernel=load ${storagetype} ${storagedev} ${kernel_addr_r} ${kernel};\0"\
121 	"loadfdt=load ${storagetype} ${storagedev} ${fdt_addr_r} ${dtb};\0" \
122 	"nandloadkernel=nand read ${kernel_addr_r} 0 780000;\0" \
123 	"nandloadfdt=nand read ${fdt_addr_r} 780000 80000;\0" \
124 	"setupmmcboot=setenv storagetype mmc; setenv storagedev 2;\0" \
125 	"setupsataboot=setenv storagetype sata; setenv storagedev 0;\0" \
126 	"setupnandboot=setenv storagetype nand;\0" \
127 	"storagebootcmd=echo Booting from ${storagetype} ...;" \
128 			"run ${storagetype}args; run doboot;\0" \
129 	"trybootk=if run loadkernel; then " \
130 		"if ${doloadfdt}; then " \
131 			"run loadfdt;" \
132 		"fi;" \
133 		"run storagebootcmd;" \
134 		"fi;\0" \
135 	"trybootsmz=" \
136 		"run setboottypem;" \
137 		"run trybootk;" \
138 		"run setboottypez;" \
139 		"run trybootk;\0" \
140 	"legacy_bootcmd=" \
141 		"run setupmmcboot;" \
142 		"mmc dev ${storagedev};" \
143 		"if mmc rescan; then " \
144 			"run trybootsmz;" \
145 		"fi;" \
146 		"run setupsataboot;" \
147 		"if sata init; then " \
148 			"run trybootsmz;" \
149 		"fi;" \
150 		"run setupnandboot;" \
151 		"run nandboot;\0" \
152 	"findfdt="\
153 		"if test $board_name = Utilite && test $board_rev = MX6Q ; then " \
154 			"setenv fdtfile imx6q-utilite-pro.dtb; fi; " \
155 		"if test $fdtfile = undefined; then " \
156 			"echo WARNING: Could not determine dtb to use; fi; \0" \
157 	BOOTENV
158 
159 #define CONFIG_PREBOOT		"usb start;sf probe"
160 
161 #define BOOT_TARGET_DEVICES(func) \
162 	func(USB, usb, 0) \
163 	func(MMC, mmc, 2) \
164 	func(SATA, sata, 0)
165 
166 #include <config_distro_bootcmd.h>
167 #else
168 #define CONFIG_EXTRA_ENV_SETTINGS
169 #endif
170 
171 /* NAND */
172 #ifndef CONFIG_SPL_BUILD
173 #define CONFIG_SYS_NAND_BASE		0x40000000
174 #define CONFIG_SYS_NAND_MAX_CHIPS	1
175 #define CONFIG_SYS_MAX_NAND_DEVICE	1
176 #define CONFIG_SYS_NAND_ONFI_DETECTION
177 /* APBH DMA is required for NAND support */
178 #endif
179 
180 /* Ethernet */
181 #define CONFIG_FEC_MXC
182 #define CONFIG_FEC_MXC_PHYADDR		0
183 #define CONFIG_FEC_XCV_TYPE		RGMII
184 #define IMX_FEC_BASE			ENET_BASE_ADDR
185 #define CONFIG_PHY_ATHEROS
186 #define CONFIG_MII
187 #define CONFIG_ETHPRIME			"FEC0"
188 #define CONFIG_ARP_TIMEOUT		200UL
189 #define CONFIG_NET_RETRY_COUNT		5
190 
191 /* USB */
192 #define CONFIG_MXC_USB_PORTSC		(PORT_PTS_UTMI | PORT_PTS_PTW)
193 #define CONFIG_MXC_USB_FLAGS		0
194 #define CONFIG_USB_MAX_CONTROLLER_COUNT	2
195 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET	/* For OTG port */
196 
197 /* I2C */
198 #define CONFIG_SYS_I2C
199 #define CONFIG_SYS_I2C_MXC
200 #define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
201 #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
202 #define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
203 #define CONFIG_SYS_I2C_SPEED		100000
204 #define CONFIG_SYS_MXC_I2C3_SPEED	400000
205 
206 #define CONFIG_SYS_I2C_EEPROM_ADDR	0x50
207 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	1
208 #define CONFIG_SYS_I2C_EEPROM_BUS	2
209 
210 /* SATA */
211 #define CONFIG_SYS_SATA_MAX_DEVICE	1
212 #define CONFIG_LBA48
213 #define CONFIG_DWC_AHSATA_PORT_ID	0
214 #define CONFIG_DWC_AHSATA_BASE_ADDR	SATA_ARB_BASE_ADDR
215 
216 /* Boot */
217 #define CONFIG_SYS_BOOTMAPSZ	        (8 << 20)
218 #define CONFIG_SERIAL_TAG
219 
220 /* misc */
221 #define CONFIG_SYS_MALLOC_LEN			(10 * 1024 * 1024)
222 #define CONFIG_MISC_INIT_R
223 
224 /* SPL */
225 #include "imx6_spl.h"
226 #define CONFIG_SYS_SPI_U_BOOT_OFFS	(64 * 1024)
227 
228 /* Display */
229 #define CONFIG_VIDEO_IPUV3
230 #define CONFIG_IMX_HDMI
231 
232 #define CONFIG_SPLASH_SCREEN
233 #define CONFIG_SPLASH_SOURCE
234 #define CONFIG_VIDEO_BMP_RLE8
235 
236 #define CONFIG_VIDEO_LOGO
237 #define CONFIG_VIDEO_BMP_LOGO
238 
239 /* EEPROM */
240 #define CONFIG_ENV_EEPROM_IS_ON_I2C
241 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		1
242 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	4
243 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	5
244 #define CONFIG_SYS_EEPROM_SIZE			256
245 
246 #endif	/* __CONFIG_CM_FX6_H */
247