1 /* 2 * Config file for Compulab CM-FX6 board 3 * 4 * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/ 5 * 6 * Author: Nikita Kiryanov <nikita@compulab.co.il> 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 #ifndef __CONFIG_CM_FX6_H 12 #define __CONFIG_CM_FX6_H 13 14 #include <asm/arch/imx-regs.h> 15 #include <config_distro_defaults.h> 16 #include "mx6_common.h" 17 18 /* Machine config */ 19 #define CONFIG_MX6 20 #define CONFIG_SYS_LITTLE_ENDIAN 21 #define CONFIG_MACH_TYPE 4273 22 #define CONFIG_SYS_HZ 1000 23 24 /* Display information on boot */ 25 #define CONFIG_DISPLAY_CPUINFO 26 #define CONFIG_DISPLAY_BOARDINFO 27 #define CONFIG_TIMESTAMP 28 29 /* CMD */ 30 #include <config_cmd_default.h> 31 #define CONFIG_CMD_GREPENV 32 #undef CONFIG_CMD_FLASH 33 #undef CONFIG_CMD_LOADB 34 #undef CONFIG_CMD_LOADS 35 #undef CONFIG_CMD_XIMG 36 #undef CONFIG_CMD_FPGA 37 #undef CONFIG_CMD_IMLS 38 39 /* MMC */ 40 #define CONFIG_MMC 41 #define CONFIG_CMD_MMC 42 #define CONFIG_GENERIC_MMC 43 #define CONFIG_FSL_ESDHC 44 #define CONFIG_FSL_USDHC 45 #define CONFIG_SYS_FSL_USDHC_NUM 3 46 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR 47 48 /* RAM */ 49 #define PHYS_SDRAM_1 MMDC0_ARB_BASE_ADDR 50 #define PHYS_SDRAM_2 MMDC1_ARB_BASE_ADDR 51 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 52 #define CONFIG_NR_DRAM_BANKS 2 53 #define CONFIG_SYS_MEMTEST_START 0x10000000 54 #define CONFIG_SYS_MEMTEST_END 0x10010000 55 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 56 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 57 #define CONFIG_SYS_INIT_SP_OFFSET \ 58 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 59 #define CONFIG_SYS_INIT_SP_ADDR \ 60 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 61 62 /* Serial console */ 63 #define CONFIG_MXC_UART 64 #define CONFIG_MXC_UART_BASE UART4_BASE 65 #define CONFIG_BAUDRATE 115200 66 #define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200} 67 68 /* Shell */ 69 #define CONFIG_SYS_PROMPT "CM-FX6 # " 70 #define CONFIG_SYS_CBSIZE 1024 71 #define CONFIG_SYS_MAXARGS 16 72 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 73 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 74 sizeof(CONFIG_SYS_PROMPT) + 16) 75 76 /* SPI flash */ 77 #define CONFIG_SYS_NO_FLASH 78 #define CONFIG_CMD_SF 79 #define CONFIG_SF_DEFAULT_BUS 0 80 #define CONFIG_SF_DEFAULT_CS 0 81 #define CONFIG_SF_DEFAULT_SPEED 25000000 82 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) 83 84 /* Environment */ 85 #define CONFIG_ENV_OVERWRITE 86 #define CONFIG_ENV_IS_IN_SPI_FLASH 87 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 88 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE 89 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS 90 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 91 #define CONFIG_ENV_SECT_SIZE (64 * 1024) 92 #define CONFIG_ENV_SIZE (8 * 1024) 93 #define CONFIG_ENV_OFFSET (768 * 1024) 94 95 #define CONFIG_EXTRA_ENV_SETTINGS \ 96 "kernel=uImage-cm-fx6\0" \ 97 "autoload=no\0" \ 98 "loadaddr=0x10800000\0" \ 99 "fdtaddr=0x11000000\0" \ 100 "console=ttymxc3,115200\0" \ 101 "ethprime=FEC0\0" \ 102 "bootscr=boot.scr\0" \ 103 "bootm_low=18000000\0" \ 104 "video_hdmi=mxcfb0:dev=hdmi,1920x1080M-32@50,if=RGB32\0" \ 105 "video_dvi=mxcfb0:dev=dvi,1280x800M-32@50,if=RGB32\0" \ 106 "fdtfile=cm-fx6.dtb\0" \ 107 "doboot=bootm ${loadaddr}\0" \ 108 "loadfdt=false\0" \ 109 "setboottypez=setenv kernel zImage-cm-fx6;" \ 110 "setenv doboot bootz ${loadaddr} - ${fdtaddr};" \ 111 "setenv loadfdt true;\0" \ 112 "setboottypem=setenv kernel uImage-cm-fx6;" \ 113 "setenv doboot bootm ${loadaddr};" \ 114 "setenv loadfdt false;\0"\ 115 "run_eboot=echo Starting EBOOT ...; "\ 116 "mmc dev ${mmcdev} && " \ 117 "mmc rescan && mmc read 10042000 a 400 && go 10042000\0" \ 118 "mmcdev=2\0" \ 119 "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \ 120 "loadmmcbootscript=load mmc ${mmcdev} ${loadaddr} ${bootscr}\0" \ 121 "mmcbootscript=echo Running bootscript from mmc ...; "\ 122 "source ${loadaddr}\0" \ 123 "mmcargs=setenv bootargs console=${console} " \ 124 "root=${mmcroot} " \ 125 "${video}\0" \ 126 "mmcloadkernel=load mmc ${mmcdev} ${loadaddr} ${kernel}\0" \ 127 "mmcloadfdt=load mmc ${mmcdev} ${fdtaddr} ${fdtfile}\0" \ 128 "mmcboot=echo Booting from mmc ...; " \ 129 "run mmcargs; " \ 130 "run doboot\0" \ 131 "satadev=0\0" \ 132 "sataroot=/dev/sda2 rw rootwait\0" \ 133 "sataargs=setenv bootargs console=${console} " \ 134 "root=${sataroot} " \ 135 "${video}\0" \ 136 "loadsatabootscript=load sata ${satadev} ${loadaddr} ${bootscr}\0" \ 137 "satabootscript=echo Running bootscript from sata ...; " \ 138 "source ${loadaddr}\0" \ 139 "sataloadkernel=load sata ${satadev} ${loadaddr} ${kernel}\0" \ 140 "sataloadfdt=load sata ${satadev} ${fdtaddr} ${fdtfile}\0" \ 141 "sataboot=echo Booting from sata ...; "\ 142 "run sataargs; " \ 143 "run doboot\0" \ 144 "nandroot=/dev/mtdblock4 rw\0" \ 145 "nandrootfstype=ubifs\0" \ 146 "nandargs=setenv bootargs console=${console} " \ 147 "root=${nandroot} " \ 148 "rootfstype=${nandrootfstype} " \ 149 "${video}\0" \ 150 "nandloadfdt=nand read ${fdtaddr} 780000 80000;\0" \ 151 "nandboot=echo Booting from nand ...; " \ 152 "run nandargs; " \ 153 "nand read ${loadaddr} 0 780000; " \ 154 "if ${loadfdt}; then " \ 155 "run nandloadfdt;" \ 156 "fi; " \ 157 "run doboot\0" \ 158 "boot=mmc dev ${mmcdev}; " \ 159 "if mmc rescan; then " \ 160 "if run loadmmcbootscript; then " \ 161 "run mmcbootscript;" \ 162 "else " \ 163 "if run mmcloadkernel; then " \ 164 "if ${loadfdt}; then " \ 165 "run mmcloadfdt;" \ 166 "fi;" \ 167 "run mmcboot;" \ 168 "fi;" \ 169 "fi;" \ 170 "fi;" \ 171 "if sata init; then " \ 172 "if run loadsatabootscript; then " \ 173 "run satabootscript;" \ 174 "else "\ 175 "if run sataloadkernel; then " \ 176 "if ${loadfdt}; then " \ 177 "run sataloadfdt; " \ 178 "fi;" \ 179 "run sataboot;" \ 180 "fi;" \ 181 "fi;" \ 182 "fi;" \ 183 "run nandboot\0" 184 185 #define CONFIG_BOOTCOMMAND \ 186 "run setboottypem; run boot" 187 188 /* SPI */ 189 #define CONFIG_SPI 190 #define CONFIG_MXC_SPI 191 #define CONFIG_SPI_FLASH 192 #define CONFIG_SPI_FLASH_ATMEL 193 #define CONFIG_SPI_FLASH_EON 194 #define CONFIG_SPI_FLASH_GIGADEVICE 195 #define CONFIG_SPI_FLASH_MACRONIX 196 #define CONFIG_SPI_FLASH_SPANSION 197 #define CONFIG_SPI_FLASH_STMICRO 198 #define CONFIG_SPI_FLASH_SST 199 #define CONFIG_SPI_FLASH_WINBOND 200 201 /* NAND */ 202 #ifndef CONFIG_SPL_BUILD 203 #define CONFIG_CMD_NAND 204 #define CONFIG_SYS_NAND_BASE 0x40000000 205 #define CONFIG_SYS_NAND_MAX_CHIPS 1 206 #define CONFIG_SYS_MAX_NAND_DEVICE 1 207 #define CONFIG_NAND_MXS 208 #define CONFIG_SYS_NAND_ONFI_DETECTION 209 /* APBH DMA is required for NAND support */ 210 #define CONFIG_APBH_DMA 211 #define CONFIG_APBH_DMA_BURST 212 #define CONFIG_APBH_DMA_BURST8 213 #endif 214 215 /* Ethernet */ 216 #define CONFIG_FEC_MXC 217 #define CONFIG_FEC_MXC_PHYADDR 0 218 #define CONFIG_FEC_XCV_TYPE RGMII 219 #define IMX_FEC_BASE ENET_BASE_ADDR 220 #define CONFIG_PHYLIB 221 #define CONFIG_PHY_ATHEROS 222 #define CONFIG_MII 223 #define CONFIG_ETHPRIME "FEC0" 224 #define CONFIG_ARP_TIMEOUT 200UL 225 #define CONFIG_NET_RETRY_COUNT 5 226 227 /* USB */ 228 #define CONFIG_CMD_USB 229 #define CONFIG_USB_EHCI 230 #define CONFIG_USB_EHCI_MX6 231 #define CONFIG_USB_STORAGE 232 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 233 #define CONFIG_MXC_USB_FLAGS 0 234 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 235 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ 236 237 /* I2C */ 238 #define CONFIG_CMD_I2C 239 #define CONFIG_SYS_I2C 240 #define CONFIG_SYS_I2C_MXC 241 #define CONFIG_SYS_I2C_SPEED 100000 242 #define CONFIG_SYS_MXC_I2C3_SPEED 400000 243 244 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 245 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 246 #define CONFIG_SYS_I2C_EEPROM_BUS 2 247 248 /* SATA */ 249 #define CONFIG_CMD_SATA 250 #define CONFIG_SYS_SATA_MAX_DEVICE 1 251 #define CONFIG_LIBATA 252 #define CONFIG_LBA48 253 #define CONFIG_DWC_AHSATA 254 #define CONFIG_DWC_AHSATA_PORT_ID 0 255 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR 256 257 /* GPIO */ 258 #define CONFIG_MXC_GPIO 259 260 /* Boot */ 261 #define CONFIG_ZERO_BOOTDELAY_CHECK 262 #define CONFIG_LOADADDR 0x10800000 263 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 264 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 265 #define CONFIG_SYS_BOOTMAPSZ (8 << 20) 266 #define CONFIG_SETUP_MEMORY_TAGS 267 #define CONFIG_INITRD_TAG 268 #define CONFIG_REVISION_TAG 269 #define CONFIG_SERIAL_TAG 270 271 /* misc */ 272 #define CONFIG_SYS_GENERIC_BOARD 273 #define CONFIG_STACKSIZE (128 * 1024) 274 #define CONFIG_SYS_MALLOC_LEN (2 * 1024 * 1024) 275 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 800 /* 400 KB */ 276 #define CONFIG_OF_BOARD_SETUP 277 278 /* SPL */ 279 #include "imx6_spl.h" 280 #define CONFIG_SPL_BOARD_INIT 281 #define CONFIG_SPL_MMC_SUPPORT 282 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x80 /* offset 64 kb */ 283 #define CONFIG_SYS_MONITOR_LEN (CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS / 2 * 1024) 284 #define CONFIG_SPL_SPI_SUPPORT 285 #define CONFIG_SPL_SPI_FLASH_SUPPORT 286 #define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024) 287 #define CONFIG_SPL_SPI_LOAD 288 289 #endif /* __CONFIG_CM_FX6_H */ 290