1 /* 2 * Config file for Compulab CM-FX6 board 3 * 4 * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/ 5 * 6 * Author: Nikita Kiryanov <nikita@compulab.co.il> 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 #ifndef __CONFIG_CM_FX6_H 12 #define __CONFIG_CM_FX6_H 13 14 #include "mx6_common.h" 15 16 /* Machine config */ 17 #define CONFIG_SYS_LITTLE_ENDIAN 18 #define CONFIG_MACH_TYPE 4273 19 20 /* MMC */ 21 #define CONFIG_SYS_FSL_USDHC_NUM 3 22 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR 23 24 /* RAM */ 25 #define PHYS_SDRAM_1 MMDC0_ARB_BASE_ADDR 26 #define PHYS_SDRAM_2 MMDC1_ARB_BASE_ADDR 27 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 28 #define CONFIG_NR_DRAM_BANKS 2 29 #define CONFIG_SYS_MEMTEST_START 0x10000000 30 #define CONFIG_SYS_MEMTEST_END 0x10010000 31 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 32 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 33 #define CONFIG_SYS_INIT_SP_OFFSET \ 34 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 35 #define CONFIG_SYS_INIT_SP_ADDR \ 36 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 37 38 /* Serial console */ 39 #define CONFIG_MXC_UART 40 #define CONFIG_MXC_UART_BASE UART4_BASE 41 #define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200} 42 43 /* SPI flash */ 44 #define CONFIG_SF_DEFAULT_BUS 0 45 #define CONFIG_SF_DEFAULT_CS 0 46 #define CONFIG_SF_DEFAULT_SPEED 25000000 47 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) 48 49 /* MTD support */ 50 #ifndef CONFIG_SPL_BUILD 51 #define CONFIG_MTD_DEVICE 52 #define CONFIG_MTD_PARTITIONS 53 #define CONFIG_SPI_FLASH_MTD 54 #endif 55 56 /* Environment */ 57 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 58 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE 59 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS 60 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 61 #define CONFIG_ENV_SECT_SIZE (64 * 1024) 62 #define CONFIG_ENV_SIZE (8 * 1024) 63 #define CONFIG_ENV_OFFSET (768 * 1024) 64 65 #ifndef CONFIG_SPL_BUILD 66 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG 67 #define CONFIG_EXTRA_ENV_SETTINGS \ 68 "fdt_high=0xffffffff\0" \ 69 "initrd_high=0xffffffff\0" \ 70 "fdt_addr_r=0x18000000\0" \ 71 "ramdisk_addr_r=0x13000000\0" \ 72 "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ 73 "pxefile_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ 74 "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \ 75 "fdtfile=undefined\0" \ 76 "stdin=serial,usbkbd\0" \ 77 "stdout=serial,vga\0" \ 78 "stderr=serial,vga\0" \ 79 "panel=HDMI\0" \ 80 "autoload=no\0" \ 81 "uImage=uImage-cm-fx6\0" \ 82 "zImage=zImage-cm-fx6\0" \ 83 "kernel=uImage-cm-fx6\0" \ 84 "dtb=cm-fx6.dtb\0" \ 85 "console=ttymxc3,115200\0" \ 86 "ethprime=FEC0\0" \ 87 "video_hdmi=mxcfb0:dev=hdmi,1920x1080M-32@50,if=RGB32\0" \ 88 "video_dvi=mxcfb0:dev=dvi,1280x800M-32@50,if=RGB32\0" \ 89 "doboot=bootm ${kernel_addr_r}\0" \ 90 "doloadfdt=false\0" \ 91 "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ 92 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ 93 "setboottypez=setenv kernel ${zImage};" \ 94 "setenv doboot bootz ${kernel_addr_r} - ${fdt_addr_r};" \ 95 "setenv doloadfdt true;\0" \ 96 "setboottypem=setenv kernel ${uImage};" \ 97 "setenv doboot bootm ${kernel_addr_r};" \ 98 "setenv doloadfdt false;\0"\ 99 "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \ 100 "sataroot=/dev/sda2 rw rootwait\0" \ 101 "nandroot=/dev/mtdblock4 rw\0" \ 102 "nandrootfstype=ubifs\0" \ 103 "mmcargs=setenv bootargs console=${console} root=${mmcroot} " \ 104 "${video} ${extrabootargs}\0" \ 105 "sataargs=setenv bootargs console=${console} root=${sataroot} " \ 106 "${video} ${extrabootargs}\0" \ 107 "nandargs=setenv bootargs console=${console} " \ 108 "root=${nandroot} " \ 109 "rootfstype=${nandrootfstype} " \ 110 "${video} ${extrabootargs}\0" \ 111 "nandboot=if run nandloadkernel; then " \ 112 "run nandloadfdt;" \ 113 "run setboottypem;" \ 114 "run storagebootcmd;" \ 115 "run setboottypez;" \ 116 "run storagebootcmd;" \ 117 "fi;\0" \ 118 "run_eboot=echo Starting EBOOT ...; "\ 119 "mmc dev 2 && " \ 120 "mmc rescan && mmc read 10042000 a 400 && go 10042000\0" \ 121 "loadkernel=load ${storagetype} ${storagedev} ${kernel_addr_r} ${kernel};\0"\ 122 "loadfdt=load ${storagetype} ${storagedev} ${fdt_addr_r} ${dtb};\0" \ 123 "nandloadkernel=nand read ${kernel_addr_r} 0 780000;\0" \ 124 "nandloadfdt=nand read ${fdt_addr_r} 780000 80000;\0" \ 125 "setupmmcboot=setenv storagetype mmc; setenv storagedev 2;\0" \ 126 "setupsataboot=setenv storagetype sata; setenv storagedev 0;\0" \ 127 "setupnandboot=setenv storagetype nand;\0" \ 128 "storagebootcmd=echo Booting from ${storagetype} ...;" \ 129 "run ${storagetype}args; run doboot;\0" \ 130 "trybootk=if run loadkernel; then " \ 131 "if ${doloadfdt}; then " \ 132 "run loadfdt;" \ 133 "fi;" \ 134 "run storagebootcmd;" \ 135 "fi;\0" \ 136 "trybootsmz=" \ 137 "run setboottypem;" \ 138 "run trybootk;" \ 139 "run setboottypez;" \ 140 "run trybootk;\0" \ 141 "legacy_bootcmd=" \ 142 "run setupmmcboot;" \ 143 "mmc dev ${storagedev};" \ 144 "if mmc rescan; then " \ 145 "run trybootsmz;" \ 146 "fi;" \ 147 "run setupsataboot;" \ 148 "if sata init; then " \ 149 "run trybootsmz;" \ 150 "fi;" \ 151 "run setupnandboot;" \ 152 "run nandboot;\0" \ 153 "findfdt="\ 154 "if test $board_name = Utilite && test $board_rev = MX6Q ; then " \ 155 "setenv fdtfile imx6q-utilite-pro.dtb; fi; " \ 156 "if test $fdtfile = undefined; then " \ 157 "echo WARNING: Could not determine dtb to use; fi; \0" \ 158 BOOTENV 159 160 #define CONFIG_PREBOOT "usb start;sf probe" 161 162 #define BOOT_TARGET_DEVICES(func) \ 163 func(USB, usb, 0) \ 164 func(MMC, mmc, 2) \ 165 func(SATA, sata, 0) 166 167 #include <config_distro_bootcmd.h> 168 #else 169 #define CONFIG_EXTRA_ENV_SETTINGS 170 #endif 171 172 /* SPI */ 173 #define CONFIG_SPI 174 175 /* NAND */ 176 #ifndef CONFIG_SPL_BUILD 177 #define CONFIG_SYS_NAND_BASE 0x40000000 178 #define CONFIG_SYS_NAND_MAX_CHIPS 1 179 #define CONFIG_SYS_MAX_NAND_DEVICE 1 180 #define CONFIG_SYS_NAND_ONFI_DETECTION 181 /* APBH DMA is required for NAND support */ 182 #endif 183 184 /* Ethernet */ 185 #define CONFIG_FEC_MXC 186 #define CONFIG_FEC_MXC_PHYADDR 0 187 #define CONFIG_FEC_XCV_TYPE RGMII 188 #define IMX_FEC_BASE ENET_BASE_ADDR 189 #define CONFIG_PHY_ATHEROS 190 #define CONFIG_MII 191 #define CONFIG_ETHPRIME "FEC0" 192 #define CONFIG_ARP_TIMEOUT 200UL 193 #define CONFIG_NET_RETRY_COUNT 5 194 195 /* USB */ 196 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 197 #define CONFIG_MXC_USB_FLAGS 0 198 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 199 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ 200 201 /* I2C */ 202 #define CONFIG_SYS_I2C 203 #define CONFIG_SYS_I2C_MXC 204 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 205 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 206 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 207 #define CONFIG_SYS_I2C_SPEED 100000 208 #define CONFIG_SYS_MXC_I2C3_SPEED 400000 209 210 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 211 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 212 #define CONFIG_SYS_I2C_EEPROM_BUS 2 213 214 /* SATA */ 215 #define CONFIG_SYS_SATA_MAX_DEVICE 1 216 #define CONFIG_LBA48 217 #define CONFIG_DWC_AHSATA_PORT_ID 0 218 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR 219 220 /* Boot */ 221 #define CONFIG_SYS_BOOTMAPSZ (8 << 20) 222 #define CONFIG_SERIAL_TAG 223 224 /* misc */ 225 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 226 #define CONFIG_MISC_INIT_R 227 228 /* SPL */ 229 #include "imx6_spl.h" 230 #define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024) 231 #define CONFIG_SPL_SPI_LOAD 232 233 /* Display */ 234 #define CONFIG_VIDEO_IPUV3 235 #define CONFIG_IMX_HDMI 236 237 #define CONFIG_SPLASH_SCREEN 238 #define CONFIG_SPLASH_SOURCE 239 #define CONFIG_VIDEO_BMP_RLE8 240 241 #define CONFIG_VIDEO_LOGO 242 #define CONFIG_VIDEO_BMP_LOGO 243 244 /* EEPROM */ 245 #define CONFIG_ENV_EEPROM_IS_ON_I2C 246 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 247 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 248 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 249 #define CONFIG_SYS_EEPROM_SIZE 256 250 251 #endif /* __CONFIG_CM_FX6_H */ 252