1 /* 2 * Config file for Compulab CM-FX6 board 3 * 4 * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/ 5 * 6 * Author: Nikita Kiryanov <nikita@compulab.co.il> 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 #ifndef __CONFIG_CM_FX6_H 12 #define __CONFIG_CM_FX6_H 13 14 #include "mx6_common.h" 15 16 /* Machine config */ 17 #define CONFIG_SYS_LITTLE_ENDIAN 18 #define CONFIG_MACH_TYPE 4273 19 20 /* MMC */ 21 #define CONFIG_SYS_FSL_USDHC_NUM 3 22 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR 23 24 /* RAM */ 25 #define PHYS_SDRAM_1 MMDC0_ARB_BASE_ADDR 26 #define PHYS_SDRAM_2 MMDC1_ARB_BASE_ADDR 27 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 28 #define CONFIG_NR_DRAM_BANKS 2 29 #define CONFIG_SYS_MEMTEST_START 0x10000000 30 #define CONFIG_SYS_MEMTEST_END 0x10010000 31 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 32 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 33 #define CONFIG_SYS_INIT_SP_OFFSET \ 34 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 35 #define CONFIG_SYS_INIT_SP_ADDR \ 36 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 37 38 /* Serial console */ 39 #define CONFIG_MXC_UART 40 #define CONFIG_MXC_UART_BASE UART4_BASE 41 #define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200} 42 43 /* Shell */ 44 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 45 sizeof(CONFIG_SYS_PROMPT) + 16) 46 47 /* SPI flash */ 48 #define CONFIG_SF_DEFAULT_BUS 0 49 #define CONFIG_SF_DEFAULT_CS 0 50 #define CONFIG_SF_DEFAULT_SPEED 25000000 51 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) 52 53 /* MTD support */ 54 #ifndef CONFIG_SPL_BUILD 55 #define CONFIG_MTD_DEVICE 56 #define CONFIG_MTD_PARTITIONS 57 #define CONFIG_SPI_FLASH_MTD 58 #endif 59 60 #define MTDIDS_DEFAULT "nor0=spi0.0" 61 #define MTDPARTS_DEFAULT "mtdparts=spi0.0:" \ 62 "768k(uboot)," \ 63 "256k(uboot-environment)," \ 64 "-(reserved)" 65 66 /* Environment */ 67 #define CONFIG_ENV_IS_IN_SPI_FLASH 68 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 69 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE 70 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS 71 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 72 #define CONFIG_ENV_SECT_SIZE (64 * 1024) 73 #define CONFIG_ENV_SIZE (8 * 1024) 74 #define CONFIG_ENV_OFFSET (768 * 1024) 75 76 #define CONFIG_EXTRA_ENV_SETTINGS \ 77 "stdin=serial,usbkbd\0" \ 78 "stdout=serial,vga\0" \ 79 "stderr=serial,vga\0" \ 80 "panel=HDMI\0" \ 81 "autoload=no\0" \ 82 "uImage=uImage-cm-fx6\0" \ 83 "zImage=zImage-cm-fx6\0" \ 84 "kernel=uImage-cm-fx6\0" \ 85 "script=boot.scr\0" \ 86 "dtb=cm-fx6.dtb\0" \ 87 "bootm_low=18000000\0" \ 88 "loadaddr=0x10800000\0" \ 89 "fdtaddr=0x11000000\0" \ 90 "console=ttymxc3,115200\0" \ 91 "ethprime=FEC0\0" \ 92 "video_hdmi=mxcfb0:dev=hdmi,1920x1080M-32@50,if=RGB32\0" \ 93 "video_dvi=mxcfb0:dev=dvi,1280x800M-32@50,if=RGB32\0" \ 94 "doboot=bootm ${loadaddr}\0" \ 95 "doloadfdt=false\0" \ 96 "mtdids=" MTDIDS_DEFAULT "\0" \ 97 "mtdparts=" MTDPARTS_DEFAULT "\0" \ 98 "setboottypez=setenv kernel ${zImage};" \ 99 "setenv doboot bootz ${loadaddr} - ${fdtaddr};" \ 100 "setenv doloadfdt true;\0" \ 101 "setboottypem=setenv kernel ${uImage};" \ 102 "setenv doboot bootm ${loadaddr};" \ 103 "setenv doloadfdt false;\0"\ 104 "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \ 105 "sataroot=/dev/sda2 rw rootwait\0" \ 106 "nandroot=/dev/mtdblock4 rw\0" \ 107 "nandrootfstype=ubifs\0" \ 108 "mmcargs=setenv bootargs console=${console} root=${mmcroot} " \ 109 "${video} ${extrabootargs}\0" \ 110 "sataargs=setenv bootargs console=${console} root=${sataroot} " \ 111 "${video} ${extrabootargs}\0" \ 112 "nandargs=setenv bootargs console=${console} " \ 113 "root=${nandroot} " \ 114 "rootfstype=${nandrootfstype} " \ 115 "${video} ${extrabootargs}\0" \ 116 "nandboot=if run nandloadkernel; then " \ 117 "run nandloadfdt;" \ 118 "run setboottypem;" \ 119 "run storagebootcmd;" \ 120 "run setboottypez;" \ 121 "run storagebootcmd;" \ 122 "fi;\0" \ 123 "run_eboot=echo Starting EBOOT ...; "\ 124 "mmc dev 2 && " \ 125 "mmc rescan && mmc read 10042000 a 400 && go 10042000\0" \ 126 "loadscript=load ${storagetype} ${storagedev} ${loadaddr} ${script};\0"\ 127 "loadkernel=load ${storagetype} ${storagedev} ${loadaddr} ${kernel};\0"\ 128 "loadfdt=load ${storagetype} ${storagedev} ${fdtaddr} ${dtb};\0" \ 129 "bootscript=echo Running bootscript from ${storagetype} ...;" \ 130 "source ${loadaddr};\0" \ 131 "nandloadkernel=nand read ${loadaddr} 0 780000;\0" \ 132 "nandloadfdt=nand read ${fdtaddr} 780000 80000;\0" \ 133 "setupmmcboot=setenv storagetype mmc; setenv storagedev 2;\0" \ 134 "setupsataboot=setenv storagetype sata; setenv storagedev 0;\0" \ 135 "setupnandboot=setenv storagetype nand;\0" \ 136 "setupusbboot=setenv storagetype usb; setenv storagedev 0;\0" \ 137 "storagebootcmd=echo Booting from ${storagetype} ...;" \ 138 "run ${storagetype}args; run doboot;\0" \ 139 "trybootk=if run loadkernel; then " \ 140 "if ${doloadfdt}; then " \ 141 "run loadfdt;" \ 142 "fi;" \ 143 "run storagebootcmd;" \ 144 "fi;\0" \ 145 "trybootsmz=if run loadscript; then " \ 146 "run bootscript;" \ 147 "fi;" \ 148 "run setboottypem;" \ 149 "run trybootk;" \ 150 "run setboottypez;" \ 151 "run trybootk;\0" 152 153 #define CONFIG_BOOTCOMMAND \ 154 "run setupmmcboot;" \ 155 "mmc dev ${storagedev};" \ 156 "if mmc rescan; then " \ 157 "run trybootsmz;" \ 158 "fi;" \ 159 "run setupusbboot;" \ 160 "if usb start; then "\ 161 "if run loadscript; then " \ 162 "run bootscript;" \ 163 "fi;" \ 164 "fi;" \ 165 "run setupsataboot;" \ 166 "if sata init; then " \ 167 "run trybootsmz;" \ 168 "fi;" \ 169 "run setupnandboot;" \ 170 "run nandboot;" 171 172 #define CONFIG_PREBOOT "usb start;sf probe" 173 174 /* SPI */ 175 #define CONFIG_SPI 176 #define CONFIG_MXC_SPI 177 178 /* NAND */ 179 #ifndef CONFIG_SPL_BUILD 180 #define CONFIG_CMD_NAND 181 #define CONFIG_SYS_NAND_BASE 0x40000000 182 #define CONFIG_SYS_NAND_MAX_CHIPS 1 183 #define CONFIG_SYS_MAX_NAND_DEVICE 1 184 #define CONFIG_NAND_MXS 185 #define CONFIG_SYS_NAND_ONFI_DETECTION 186 /* APBH DMA is required for NAND support */ 187 #define CONFIG_APBH_DMA 188 #define CONFIG_APBH_DMA_BURST 189 #define CONFIG_APBH_DMA_BURST8 190 #endif 191 192 /* Ethernet */ 193 #define CONFIG_FEC_MXC 194 #define CONFIG_FEC_MXC_PHYADDR 0 195 #define CONFIG_FEC_XCV_TYPE RGMII 196 #define IMX_FEC_BASE ENET_BASE_ADDR 197 #define CONFIG_PHYLIB 198 #define CONFIG_PHY_ATHEROS 199 #define CONFIG_MII 200 #define CONFIG_ETHPRIME "FEC0" 201 #define CONFIG_ARP_TIMEOUT 200UL 202 #define CONFIG_NET_RETRY_COUNT 5 203 204 /* USB */ 205 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 206 #define CONFIG_MXC_USB_FLAGS 0 207 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 208 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ 209 210 /* I2C */ 211 #define CONFIG_SYS_I2C 212 #define CONFIG_SYS_I2C_MXC 213 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 214 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 215 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 216 #define CONFIG_SYS_I2C_SPEED 100000 217 #define CONFIG_SYS_MXC_I2C3_SPEED 400000 218 219 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 220 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 221 #define CONFIG_SYS_I2C_EEPROM_BUS 2 222 223 /* SATA */ 224 #define CONFIG_SYS_SATA_MAX_DEVICE 1 225 #define CONFIG_LIBATA 226 #define CONFIG_LBA48 227 #define CONFIG_DWC_AHSATA 228 #define CONFIG_DWC_AHSATA_PORT_ID 0 229 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR 230 231 /* Boot */ 232 #define CONFIG_SYS_BOOTMAPSZ (8 << 20) 233 #define CONFIG_SERIAL_TAG 234 235 /* misc */ 236 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 237 #define CONFIG_MISC_INIT_R 238 239 /* SPL */ 240 #include "imx6_spl.h" 241 #define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024) 242 #define CONFIG_SPL_SPI_LOAD 243 244 /* Display */ 245 #define CONFIG_VIDEO_IPUV3 246 #define CONFIG_IPUV3_CLK 260000000 247 #define CONFIG_IMX_HDMI 248 249 #define CONFIG_SPLASH_SCREEN 250 #define CONFIG_SPLASH_SOURCE 251 #define CONFIG_VIDEO_BMP_RLE8 252 253 #define CONFIG_VIDEO_LOGO 254 #define CONFIG_VIDEO_BMP_LOGO 255 256 /* EEPROM */ 257 #define CONFIG_ENV_EEPROM_IS_ON_I2C 258 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 259 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 260 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 261 #define CONFIG_SYS_EEPROM_SIZE 256 262 263 #endif /* __CONFIG_CM_FX6_H */ 264