1 /* 2 * Config file for Compulab CM-FX6 board 3 * 4 * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/ 5 * 6 * Author: Nikita Kiryanov <nikita@compulab.co.il> 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 #ifndef __CONFIG_CM_FX6_H 12 #define __CONFIG_CM_FX6_H 13 14 #include "mx6_common.h" 15 16 /* Machine config */ 17 #define CONFIG_SYS_LITTLE_ENDIAN 18 #define CONFIG_MACH_TYPE 4273 19 20 /* CMD */ 21 #define CONFIG_CMD_GREPENV 22 23 /* MMC */ 24 #define CONFIG_SYS_FSL_USDHC_NUM 3 25 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR 26 27 /* RAM */ 28 #define PHYS_SDRAM_1 MMDC0_ARB_BASE_ADDR 29 #define PHYS_SDRAM_2 MMDC1_ARB_BASE_ADDR 30 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 31 #define CONFIG_NR_DRAM_BANKS 2 32 #define CONFIG_SYS_MEMTEST_START 0x10000000 33 #define CONFIG_SYS_MEMTEST_END 0x10010000 34 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 35 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 36 #define CONFIG_SYS_INIT_SP_OFFSET \ 37 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 38 #define CONFIG_SYS_INIT_SP_ADDR \ 39 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 40 41 /* Serial console */ 42 #define CONFIG_MXC_UART 43 #define CONFIG_MXC_UART_BASE UART4_BASE 44 #define CONFIG_BAUDRATE 115200 45 #define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200} 46 47 /* Shell */ 48 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 49 sizeof(CONFIG_SYS_PROMPT) + 16) 50 51 /* SPI flash */ 52 #define CONFIG_SF_DEFAULT_BUS 0 53 #define CONFIG_SF_DEFAULT_CS 0 54 #define CONFIG_SF_DEFAULT_SPEED 25000000 55 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) 56 57 /* Environment */ 58 #define CONFIG_ENV_IS_IN_SPI_FLASH 59 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 60 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE 61 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS 62 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 63 #define CONFIG_ENV_SECT_SIZE (64 * 1024) 64 #define CONFIG_ENV_SIZE (8 * 1024) 65 #define CONFIG_ENV_OFFSET (768 * 1024) 66 67 #define CONFIG_EXTRA_ENV_SETTINGS \ 68 "stdin=serial,usbkbd\0" \ 69 "stdout=serial,vga\0" \ 70 "stderr=serial,vga\0" \ 71 "panel=HDMI\0" \ 72 "autoload=no\0" \ 73 "kernel=uImage-cm-fx6\0" \ 74 "script=boot.scr\0" \ 75 "dtb=cm-fx6.dtb\0" \ 76 "bootm_low=18000000\0" \ 77 "loadaddr=0x10800000\0" \ 78 "fdtaddr=0x11000000\0" \ 79 "console=ttymxc3,115200\0" \ 80 "ethprime=FEC0\0" \ 81 "video_hdmi=mxcfb0:dev=hdmi,1920x1080M-32@50,if=RGB32\0" \ 82 "video_dvi=mxcfb0:dev=dvi,1280x800M-32@50,if=RGB32\0" \ 83 "doboot=bootm ${loadaddr}\0" \ 84 "doloadfdt=false\0" \ 85 "setboottypez=setenv kernel zImage-cm-fx6;" \ 86 "setenv doboot bootz ${loadaddr} - ${fdtaddr};" \ 87 "setenv doloadfdt true;\0" \ 88 "setboottypem=setenv kernel uImage-cm-fx6;" \ 89 "setenv doboot bootm ${loadaddr};" \ 90 "setenv doloadfdt false;\0"\ 91 "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \ 92 "sataroot=/dev/sda2 rw rootwait\0" \ 93 "nandroot=/dev/mtdblock4 rw\0" \ 94 "nandrootfstype=ubifs\0" \ 95 "mmcargs=setenv bootargs console=${console} root=${mmcroot} " \ 96 "${video}\0" \ 97 "sataargs=setenv bootargs console=${console} root=${sataroot} " \ 98 "${video}\0" \ 99 "nandargs=setenv bootargs console=${console} " \ 100 "root=${nandroot} " \ 101 "rootfstype=${nandrootfstype} " \ 102 "${video}\0" \ 103 "nandboot=if run nandloadkernel; then " \ 104 "run nandloadfdt;" \ 105 "run setboottypem;" \ 106 "run storagebootcmd;" \ 107 "run setboottypez;" \ 108 "run storagebootcmd;" \ 109 "fi;\0" \ 110 "run_eboot=echo Starting EBOOT ...; "\ 111 "mmc dev 2 && " \ 112 "mmc rescan && mmc read 10042000 a 400 && go 10042000\0" \ 113 "loadscript=load ${storagetype} ${storagedev} ${loadaddr} ${script};\0"\ 114 "loadkernel=load ${storagetype} ${storagedev} ${loadaddr} ${kernel};\0"\ 115 "loadfdt=load ${storagetype} ${storagedev} ${fdtaddr} ${dtb};\0" \ 116 "bootscript=echo Running bootscript from ${storagetype} ...;" \ 117 "source ${loadaddr};\0" \ 118 "nandloadkernel=nand read ${loadaddr} 0 780000;\0" \ 119 "nandloadfdt=nand read ${fdtaddr} 780000 80000;\0" \ 120 "setupmmcboot=setenv storagetype mmc; setenv storagedev 2;\0" \ 121 "setupsataboot=setenv storagetype sata; setenv storagedev 0;\0" \ 122 "setupnandboot=setenv storagetype nand;\0" \ 123 "setupusbboot=setenv storagetype usb; setenv storagedev 0;\0" \ 124 "storagebootcmd=echo Booting from ${storagetype} ...;" \ 125 "run ${storagetype}args; run doboot;\0" \ 126 "trybootk=if run loadkernel; then " \ 127 "if ${doloadfdt}; then " \ 128 "run loadfdt;" \ 129 "fi;" \ 130 "run storagebootcmd;" \ 131 "fi;\0" \ 132 "trybootsmz=if run loadscript; then " \ 133 "run bootscript;" \ 134 "fi;" \ 135 "run setboottypem;" \ 136 "run trybootk;" \ 137 "run setboottypez;" \ 138 "run trybootk;\0" 139 140 #define CONFIG_BOOTCOMMAND \ 141 "run setupmmcboot;" \ 142 "mmc dev ${storagedev};" \ 143 "if mmc rescan; then " \ 144 "run trybootsmz;" \ 145 "fi;" \ 146 "run setupusbboot;" \ 147 "if usb start; then "\ 148 "if run loadscript; then " \ 149 "run bootscript;" \ 150 "fi;" \ 151 "fi;" \ 152 "run setupsataboot;" \ 153 "if sata init; then " \ 154 "run trybootsmz;" \ 155 "fi;" \ 156 "run setupnandboot;" \ 157 "run nandboot;" 158 159 #define CONFIG_PREBOOT "usb start" 160 161 /* SPI */ 162 #define CONFIG_SPI 163 #define CONFIG_MXC_SPI 164 165 /* NAND */ 166 #ifndef CONFIG_SPL_BUILD 167 #define CONFIG_CMD_NAND 168 #define CONFIG_SYS_NAND_BASE 0x40000000 169 #define CONFIG_SYS_NAND_MAX_CHIPS 1 170 #define CONFIG_SYS_MAX_NAND_DEVICE 1 171 #define CONFIG_NAND_MXS 172 #define CONFIG_SYS_NAND_ONFI_DETECTION 173 /* APBH DMA is required for NAND support */ 174 #define CONFIG_APBH_DMA 175 #define CONFIG_APBH_DMA_BURST 176 #define CONFIG_APBH_DMA_BURST8 177 #endif 178 179 /* Ethernet */ 180 #define CONFIG_FEC_MXC 181 #define CONFIG_FEC_MXC_PHYADDR 0 182 #define CONFIG_FEC_XCV_TYPE RGMII 183 #define IMX_FEC_BASE ENET_BASE_ADDR 184 #define CONFIG_PHYLIB 185 #define CONFIG_PHY_ATHEROS 186 #define CONFIG_MII 187 #define CONFIG_ETHPRIME "FEC0" 188 #define CONFIG_ARP_TIMEOUT 200UL 189 #define CONFIG_NET_RETRY_COUNT 5 190 191 /* USB */ 192 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 193 #define CONFIG_MXC_USB_FLAGS 0 194 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 195 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ 196 #define CONFIG_SYS_STDIO_DEREGISTER 197 198 /* I2C */ 199 #define CONFIG_SYS_I2C 200 #define CONFIG_SYS_I2C_MXC 201 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 202 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 203 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 204 #define CONFIG_SYS_I2C_SPEED 100000 205 #define CONFIG_SYS_MXC_I2C3_SPEED 400000 206 207 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 208 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 209 #define CONFIG_SYS_I2C_EEPROM_BUS 2 210 211 /* SATA */ 212 #define CONFIG_CMD_SATA 213 #define CONFIG_SYS_SATA_MAX_DEVICE 1 214 #define CONFIG_LIBATA 215 #define CONFIG_LBA48 216 #define CONFIG_DWC_AHSATA 217 #define CONFIG_DWC_AHSATA_PORT_ID 0 218 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR 219 220 /* Boot */ 221 #define CONFIG_SYS_BOOTMAPSZ (8 << 20) 222 #define CONFIG_SERIAL_TAG 223 224 /* misc */ 225 #define CONFIG_STACKSIZE (128 * 1024) 226 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 227 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 800 /* 400 KB */ 228 #define CONFIG_OF_BOARD_SETUP 229 #define CONFIG_MISC_INIT_R 230 231 /* SPL */ 232 #include "imx6_spl.h" 233 #define CONFIG_SPL_MMC_SUPPORT 234 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x80 /* offset 64 kb */ 235 #define CONFIG_SYS_MONITOR_LEN (CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS / 2 * 1024) 236 #define CONFIG_SPL_SPI_SUPPORT 237 #define CONFIG_SPL_SPI_FLASH_SUPPORT 238 #define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024) 239 #define CONFIG_SPL_SPI_LOAD 240 241 /* Display */ 242 #define CONFIG_VIDEO 243 #define CONFIG_VIDEO_IPUV3 244 #define CONFIG_IPUV3_CLK 260000000 245 #define CONFIG_IMX_HDMI 246 #define CONFIG_CFB_CONSOLE 247 #define CONFIG_VGA_AS_SINGLE_DEVICE 248 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 249 #define CONFIG_CONSOLE_MUX 250 #define CONFIG_VIDEO_SW_CURSOR 251 252 #define CONFIG_SPLASH_SCREEN 253 #define CONFIG_SPLASH_SOURCE 254 #define CONFIG_CMD_BMP 255 #define CONFIG_VIDEO_BMP_RLE8 256 257 #define CONFIG_VIDEO_LOGO 258 #define CONFIG_VIDEO_BMP_LOGO 259 260 #endif /* __CONFIG_CM_FX6_H */ 261