1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Config file for Compulab CM-FX6 board 4 * 5 * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/ 6 * 7 * Author: Nikita Kiryanov <nikita@compulab.co.il> 8 */ 9 10 #ifndef __CONFIG_CM_FX6_H 11 #define __CONFIG_CM_FX6_H 12 13 #include "mx6_common.h" 14 15 /* Machine config */ 16 #define CONFIG_SYS_LITTLE_ENDIAN 17 #define CONFIG_MACH_TYPE 4273 18 19 /* MMC */ 20 #define CONFIG_SYS_FSL_USDHC_NUM 3 21 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR 22 23 /* RAM */ 24 #define PHYS_SDRAM_1 MMDC0_ARB_BASE_ADDR 25 #define PHYS_SDRAM_2 MMDC1_ARB_BASE_ADDR 26 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 27 #define CONFIG_SYS_MEMTEST_START 0x10000000 28 #define CONFIG_SYS_MEMTEST_END 0x10010000 29 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 30 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 31 #define CONFIG_SYS_INIT_SP_OFFSET \ 32 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 33 #define CONFIG_SYS_INIT_SP_ADDR \ 34 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 35 36 /* Serial console */ 37 #define CONFIG_MXC_UART 38 #define CONFIG_MXC_UART_BASE UART4_BASE 39 #define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200} 40 41 /* SPI flash */ 42 43 /* MTD support */ 44 #ifndef CONFIG_SPL_BUILD 45 #define CONFIG_SPI_FLASH_MTD 46 #endif 47 48 /* Environment */ 49 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 50 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE 51 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS 52 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 53 #define CONFIG_ENV_SECT_SIZE (64 * 1024) 54 #define CONFIG_ENV_SIZE (8 * 1024) 55 #define CONFIG_ENV_OFFSET (768 * 1024) 56 57 #ifndef CONFIG_SPL_BUILD 58 #define CONFIG_EXTRA_ENV_SETTINGS \ 59 "fdt_high=0xffffffff\0" \ 60 "initrd_high=0xffffffff\0" \ 61 "fdt_addr_r=0x18000000\0" \ 62 "ramdisk_addr_r=0x13000000\0" \ 63 "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ 64 "pxefile_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ 65 "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \ 66 "fdtfile=undefined\0" \ 67 "stdin=serial,usbkbd\0" \ 68 "stdout=serial,vga\0" \ 69 "stderr=serial,vga\0" \ 70 "panel=HDMI\0" \ 71 "autoload=no\0" \ 72 "uImage=uImage-cm-fx6\0" \ 73 "zImage=zImage-cm-fx6\0" \ 74 "kernel=uImage-cm-fx6\0" \ 75 "dtb=cm-fx6.dtb\0" \ 76 "console=ttymxc3,115200\0" \ 77 "ethprime=FEC0\0" \ 78 "video_hdmi=mxcfb0:dev=hdmi,1920x1080M-32@50,if=RGB32\0" \ 79 "video_dvi=mxcfb0:dev=dvi,1280x800M-32@50,if=RGB32\0" \ 80 "doboot=bootm ${kernel_addr_r}\0" \ 81 "doloadfdt=false\0" \ 82 "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ 83 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ 84 "setboottypez=setenv kernel ${zImage};" \ 85 "setenv doboot bootz ${kernel_addr_r} - ${fdt_addr_r};" \ 86 "setenv doloadfdt true;\0" \ 87 "setboottypem=setenv kernel ${uImage};" \ 88 "setenv doboot bootm ${kernel_addr_r};" \ 89 "setenv doloadfdt false;\0"\ 90 "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \ 91 "sataroot=/dev/sda2 rw rootwait\0" \ 92 "nandroot=/dev/mtdblock4 rw\0" \ 93 "nandrootfstype=ubifs\0" \ 94 "mmcargs=setenv bootargs console=${console} root=${mmcroot} " \ 95 "${video} ${extrabootargs}\0" \ 96 "sataargs=setenv bootargs console=${console} root=${sataroot} " \ 97 "${video} ${extrabootargs}\0" \ 98 "nandargs=setenv bootargs console=${console} " \ 99 "root=${nandroot} " \ 100 "rootfstype=${nandrootfstype} " \ 101 "${video} ${extrabootargs}\0" \ 102 "nandboot=if run nandloadkernel; then " \ 103 "run nandloadfdt;" \ 104 "run setboottypem;" \ 105 "run storagebootcmd;" \ 106 "run setboottypez;" \ 107 "run storagebootcmd;" \ 108 "fi;\0" \ 109 "run_eboot=echo Starting EBOOT ...; "\ 110 "mmc dev 2 && " \ 111 "mmc rescan && mmc read 10042000 a 400 && go 10042000\0" \ 112 "loadkernel=load ${storagetype} ${storagedev} ${kernel_addr_r} ${kernel};\0"\ 113 "loadfdt=load ${storagetype} ${storagedev} ${fdt_addr_r} ${dtb};\0" \ 114 "nandloadkernel=nand read ${kernel_addr_r} 0 780000;\0" \ 115 "nandloadfdt=nand read ${fdt_addr_r} 780000 80000;\0" \ 116 "setupmmcboot=setenv storagetype mmc; setenv storagedev 2;\0" \ 117 "setupsataboot=setenv storagetype sata; setenv storagedev 0;\0" \ 118 "setupnandboot=setenv storagetype nand;\0" \ 119 "storagebootcmd=echo Booting from ${storagetype} ...;" \ 120 "run ${storagetype}args; run doboot;\0" \ 121 "trybootk=if run loadkernel; then " \ 122 "if ${doloadfdt}; then " \ 123 "run loadfdt;" \ 124 "fi;" \ 125 "run storagebootcmd;" \ 126 "fi;\0" \ 127 "trybootsmz=" \ 128 "run setboottypem;" \ 129 "run trybootk;" \ 130 "run setboottypez;" \ 131 "run trybootk;\0" \ 132 "legacy_bootcmd=" \ 133 "run setupmmcboot;" \ 134 "mmc dev ${storagedev};" \ 135 "if mmc rescan; then " \ 136 "run trybootsmz;" \ 137 "fi;" \ 138 "run setupsataboot;" \ 139 "if sata init; then " \ 140 "run trybootsmz;" \ 141 "fi;" \ 142 "run setupnandboot;" \ 143 "run nandboot;\0" \ 144 "findfdt="\ 145 "if test $board_name = Utilite && test $board_rev = MX6Q ; then " \ 146 "setenv fdtfile imx6q-utilite-pro.dtb; fi; " \ 147 "if test $fdtfile = undefined; then " \ 148 "echo WARNING: Could not determine dtb to use; fi; \0" \ 149 BOOTENV 150 151 #define CONFIG_PREBOOT "usb start;sf probe" 152 153 #define BOOT_TARGET_DEVICES(func) \ 154 func(USB, usb, 0) \ 155 func(MMC, mmc, 2) \ 156 func(SATA, sata, 0) 157 158 #include <config_distro_bootcmd.h> 159 #else 160 #define CONFIG_EXTRA_ENV_SETTINGS 161 #endif 162 163 /* NAND */ 164 #ifndef CONFIG_SPL_BUILD 165 #define CONFIG_SYS_NAND_BASE 0x40000000 166 #define CONFIG_SYS_NAND_MAX_CHIPS 1 167 #define CONFIG_SYS_MAX_NAND_DEVICE 1 168 #define CONFIG_SYS_NAND_ONFI_DETECTION 169 /* APBH DMA is required for NAND support */ 170 #endif 171 172 /* Ethernet */ 173 #define CONFIG_FEC_MXC 174 #define CONFIG_FEC_MXC_PHYADDR 0 175 #define CONFIG_FEC_XCV_TYPE RGMII 176 #define IMX_FEC_BASE ENET_BASE_ADDR 177 #define CONFIG_PHY_ATHEROS 178 #define CONFIG_ETHPRIME "FEC0" 179 #define CONFIG_ARP_TIMEOUT 200UL 180 #define CONFIG_NET_RETRY_COUNT 5 181 182 /* USB */ 183 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 184 #define CONFIG_MXC_USB_FLAGS 0 185 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 186 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ 187 188 /* I2C */ 189 #define CONFIG_SYS_I2C 190 #define CONFIG_SYS_I2C_MXC 191 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 192 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 193 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 194 #define CONFIG_SYS_I2C_SPEED 100000 195 #define CONFIG_SYS_MXC_I2C3_SPEED 400000 196 197 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 198 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 199 #define CONFIG_SYS_I2C_EEPROM_BUS 2 200 201 /* SATA */ 202 #define CONFIG_SYS_SATA_MAX_DEVICE 1 203 #define CONFIG_LBA48 204 #define CONFIG_DWC_AHSATA_PORT_ID 0 205 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR 206 207 /* Boot */ 208 #define CONFIG_SYS_BOOTMAPSZ (8 << 20) 209 #define CONFIG_SERIAL_TAG 210 211 /* misc */ 212 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 213 214 /* SPL */ 215 #include "imx6_spl.h" 216 #define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024) 217 218 /* Display */ 219 #define CONFIG_VIDEO_IPUV3 220 #define CONFIG_IMX_HDMI 221 222 #define CONFIG_SPLASH_SCREEN 223 #define CONFIG_SPLASH_SOURCE 224 #define CONFIG_VIDEO_BMP_RLE8 225 226 #define CONFIG_VIDEO_LOGO 227 #define CONFIG_VIDEO_BMP_LOGO 228 229 /* EEPROM */ 230 #define CONFIG_ENV_EEPROM_IS_ON_I2C 231 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 232 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 233 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 234 #define CONFIG_SYS_EEPROM_SIZE 256 235 236 #endif /* __CONFIG_CM_FX6_H */ 237