1 /* 2 * Config file for Compulab CM-FX6 board 3 * 4 * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/ 5 * 6 * Author: Nikita Kiryanov <nikita@compulab.co.il> 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 #ifndef __CONFIG_CM_FX6_H 12 #define __CONFIG_CM_FX6_H 13 14 #include "mx6_common.h" 15 16 /* Machine config */ 17 #define CONFIG_SYS_LITTLE_ENDIAN 18 #define CONFIG_MACH_TYPE 4273 19 20 /* CMD */ 21 #define CONFIG_CMD_MTDPARTS 22 23 /* MMC */ 24 #define CONFIG_SYS_FSL_USDHC_NUM 3 25 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR 26 27 /* RAM */ 28 #define PHYS_SDRAM_1 MMDC0_ARB_BASE_ADDR 29 #define PHYS_SDRAM_2 MMDC1_ARB_BASE_ADDR 30 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 31 #define CONFIG_NR_DRAM_BANKS 2 32 #define CONFIG_SYS_MEMTEST_START 0x10000000 33 #define CONFIG_SYS_MEMTEST_END 0x10010000 34 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 35 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 36 #define CONFIG_SYS_INIT_SP_OFFSET \ 37 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 38 #define CONFIG_SYS_INIT_SP_ADDR \ 39 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 40 41 /* Serial console */ 42 #define CONFIG_MXC_UART 43 #define CONFIG_MXC_UART_BASE UART4_BASE 44 #define CONFIG_BAUDRATE 115200 45 #define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200} 46 47 /* Shell */ 48 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 49 sizeof(CONFIG_SYS_PROMPT) + 16) 50 51 /* SPI flash */ 52 #define CONFIG_SF_DEFAULT_BUS 0 53 #define CONFIG_SF_DEFAULT_CS 0 54 #define CONFIG_SF_DEFAULT_SPEED 25000000 55 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) 56 57 /* MTD support */ 58 #ifndef CONFIG_SPL_BUILD 59 #define CONFIG_MTD_DEVICE 60 #define CONFIG_MTD_PARTITIONS 61 #define CONFIG_SPI_FLASH_MTD 62 #endif 63 64 #define MTDIDS_DEFAULT "nor0=spi0.0" 65 #define MTDPARTS_DEFAULT "mtdparts=spi0.0:" \ 66 "768k(uboot)," \ 67 "256k(uboot-environment)," \ 68 "-(reserved)" 69 70 /* Environment */ 71 #define CONFIG_ENV_IS_IN_SPI_FLASH 72 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 73 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE 74 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS 75 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 76 #define CONFIG_ENV_SECT_SIZE (64 * 1024) 77 #define CONFIG_ENV_SIZE (8 * 1024) 78 #define CONFIG_ENV_OFFSET (768 * 1024) 79 80 #define CONFIG_EXTRA_ENV_SETTINGS \ 81 "stdin=serial,usbkbd\0" \ 82 "stdout=serial,vga\0" \ 83 "stderr=serial,vga\0" \ 84 "panel=HDMI\0" \ 85 "autoload=no\0" \ 86 "uImage=uImage-cm-fx6\0" \ 87 "zImage=zImage-cm-fx6\0" \ 88 "kernel=uImage-cm-fx6\0" \ 89 "script=boot.scr\0" \ 90 "dtb=cm-fx6.dtb\0" \ 91 "bootm_low=18000000\0" \ 92 "loadaddr=0x10800000\0" \ 93 "fdtaddr=0x11000000\0" \ 94 "console=ttymxc3,115200\0" \ 95 "ethprime=FEC0\0" \ 96 "video_hdmi=mxcfb0:dev=hdmi,1920x1080M-32@50,if=RGB32\0" \ 97 "video_dvi=mxcfb0:dev=dvi,1280x800M-32@50,if=RGB32\0" \ 98 "doboot=bootm ${loadaddr}\0" \ 99 "doloadfdt=false\0" \ 100 "mtdids=" MTDIDS_DEFAULT "\0" \ 101 "mtdparts=" MTDPARTS_DEFAULT "\0" \ 102 "setboottypez=setenv kernel ${zImage};" \ 103 "setenv doboot bootz ${loadaddr} - ${fdtaddr};" \ 104 "setenv doloadfdt true;\0" \ 105 "setboottypem=setenv kernel ${uImage};" \ 106 "setenv doboot bootm ${loadaddr};" \ 107 "setenv doloadfdt false;\0"\ 108 "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \ 109 "sataroot=/dev/sda2 rw rootwait\0" \ 110 "nandroot=/dev/mtdblock4 rw\0" \ 111 "nandrootfstype=ubifs\0" \ 112 "mmcargs=setenv bootargs console=${console} root=${mmcroot} " \ 113 "${video} ${extrabootargs}\0" \ 114 "sataargs=setenv bootargs console=${console} root=${sataroot} " \ 115 "${video} ${extrabootargs}\0" \ 116 "nandargs=setenv bootargs console=${console} " \ 117 "root=${nandroot} " \ 118 "rootfstype=${nandrootfstype} " \ 119 "${video} ${extrabootargs}\0" \ 120 "nandboot=if run nandloadkernel; then " \ 121 "run nandloadfdt;" \ 122 "run setboottypem;" \ 123 "run storagebootcmd;" \ 124 "run setboottypez;" \ 125 "run storagebootcmd;" \ 126 "fi;\0" \ 127 "run_eboot=echo Starting EBOOT ...; "\ 128 "mmc dev 2 && " \ 129 "mmc rescan && mmc read 10042000 a 400 && go 10042000\0" \ 130 "loadscript=load ${storagetype} ${storagedev} ${loadaddr} ${script};\0"\ 131 "loadkernel=load ${storagetype} ${storagedev} ${loadaddr} ${kernel};\0"\ 132 "loadfdt=load ${storagetype} ${storagedev} ${fdtaddr} ${dtb};\0" \ 133 "bootscript=echo Running bootscript from ${storagetype} ...;" \ 134 "source ${loadaddr};\0" \ 135 "nandloadkernel=nand read ${loadaddr} 0 780000;\0" \ 136 "nandloadfdt=nand read ${fdtaddr} 780000 80000;\0" \ 137 "setupmmcboot=setenv storagetype mmc; setenv storagedev 2;\0" \ 138 "setupsataboot=setenv storagetype sata; setenv storagedev 0;\0" \ 139 "setupnandboot=setenv storagetype nand;\0" \ 140 "setupusbboot=setenv storagetype usb; setenv storagedev 0;\0" \ 141 "storagebootcmd=echo Booting from ${storagetype} ...;" \ 142 "run ${storagetype}args; run doboot;\0" \ 143 "trybootk=if run loadkernel; then " \ 144 "if ${doloadfdt}; then " \ 145 "run loadfdt;" \ 146 "fi;" \ 147 "run storagebootcmd;" \ 148 "fi;\0" \ 149 "trybootsmz=if run loadscript; then " \ 150 "run bootscript;" \ 151 "fi;" \ 152 "run setboottypem;" \ 153 "run trybootk;" \ 154 "run setboottypez;" \ 155 "run trybootk;\0" 156 157 #define CONFIG_BOOTCOMMAND \ 158 "run setupmmcboot;" \ 159 "mmc dev ${storagedev};" \ 160 "if mmc rescan; then " \ 161 "run trybootsmz;" \ 162 "fi;" \ 163 "run setupusbboot;" \ 164 "if usb start; then "\ 165 "if run loadscript; then " \ 166 "run bootscript;" \ 167 "fi;" \ 168 "fi;" \ 169 "run setupsataboot;" \ 170 "if sata init; then " \ 171 "run trybootsmz;" \ 172 "fi;" \ 173 "run setupnandboot;" \ 174 "run nandboot;" 175 176 #define CONFIG_PREBOOT "usb start;sf probe" 177 178 /* SPI */ 179 #define CONFIG_SPI 180 #define CONFIG_MXC_SPI 181 182 /* NAND */ 183 #ifndef CONFIG_SPL_BUILD 184 #define CONFIG_CMD_NAND 185 #define CONFIG_SYS_NAND_BASE 0x40000000 186 #define CONFIG_SYS_NAND_MAX_CHIPS 1 187 #define CONFIG_SYS_MAX_NAND_DEVICE 1 188 #define CONFIG_NAND_MXS 189 #define CONFIG_SYS_NAND_ONFI_DETECTION 190 /* APBH DMA is required for NAND support */ 191 #define CONFIG_APBH_DMA 192 #define CONFIG_APBH_DMA_BURST 193 #define CONFIG_APBH_DMA_BURST8 194 #endif 195 196 /* Ethernet */ 197 #define CONFIG_FEC_MXC 198 #define CONFIG_FEC_MXC_PHYADDR 0 199 #define CONFIG_FEC_XCV_TYPE RGMII 200 #define IMX_FEC_BASE ENET_BASE_ADDR 201 #define CONFIG_PHYLIB 202 #define CONFIG_PHY_ATHEROS 203 #define CONFIG_MII 204 #define CONFIG_ETHPRIME "FEC0" 205 #define CONFIG_ARP_TIMEOUT 200UL 206 #define CONFIG_NET_RETRY_COUNT 5 207 208 /* USB */ 209 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 210 #define CONFIG_MXC_USB_FLAGS 0 211 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 212 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ 213 214 /* I2C */ 215 #define CONFIG_SYS_I2C 216 #define CONFIG_SYS_I2C_MXC 217 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 218 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 219 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 220 #define CONFIG_SYS_I2C_SPEED 100000 221 #define CONFIG_SYS_MXC_I2C3_SPEED 400000 222 223 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 224 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 225 #define CONFIG_SYS_I2C_EEPROM_BUS 2 226 227 /* SATA */ 228 #define CONFIG_CMD_SATA 229 #define CONFIG_SYS_SATA_MAX_DEVICE 1 230 #define CONFIG_LIBATA 231 #define CONFIG_LBA48 232 #define CONFIG_DWC_AHSATA 233 #define CONFIG_DWC_AHSATA_PORT_ID 0 234 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR 235 236 /* Boot */ 237 #define CONFIG_SYS_BOOTMAPSZ (8 << 20) 238 #define CONFIG_SERIAL_TAG 239 240 /* misc */ 241 #define CONFIG_STACKSIZE (128 * 1024) 242 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 243 #define CONFIG_MISC_INIT_R 244 245 /* SPL */ 246 #include "imx6_spl.h" 247 #define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024) 248 #define CONFIG_SPL_SPI_LOAD 249 250 /* Display */ 251 #define CONFIG_VIDEO_IPUV3 252 #define CONFIG_IPUV3_CLK 260000000 253 #define CONFIG_IMX_HDMI 254 255 #define CONFIG_SPLASH_SCREEN 256 #define CONFIG_SPLASH_SOURCE 257 #define CONFIG_CMD_BMP 258 #define CONFIG_VIDEO_BMP_RLE8 259 260 #define CONFIG_VIDEO_LOGO 261 #define CONFIG_VIDEO_BMP_LOGO 262 263 /* EEPROM */ 264 #define CONFIG_CMD_EEPROM 265 #define CONFIG_ENV_EEPROM_IS_ON_I2C 266 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 267 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 268 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 269 #define CONFIG_SYS_EEPROM_SIZE 256 270 271 #define CONFIG_CMD_EEPROM_LAYOUT 272 #define CONFIG_EEPROM_LAYOUT_HELP_STRING "v2, v3" 273 274 #endif /* __CONFIG_CM_FX6_H */ 275