xref: /openbmc/u-boot/include/configs/cm_fx6.h (revision 0093b3fc)
1 /*
2  * Config file for Compulab CM-FX6 board
3  *
4  * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/
5  *
6  * Author: Nikita Kiryanov <nikita@compulab.co.il>
7  *
8  * SPDX-License-Identifier:	GPL-2.0+
9  */
10 
11 #ifndef __CONFIG_CM_FX6_H
12 #define __CONFIG_CM_FX6_H
13 
14 #include "mx6_common.h"
15 
16 #ifndef CONFIG_SPL_BUILD
17 #include <config_distro_defaults.h>
18 #endif
19 
20 /* Machine config */
21 #define CONFIG_SYS_LITTLE_ENDIAN
22 #define CONFIG_MACH_TYPE		4273
23 
24 /* MMC */
25 #define CONFIG_SYS_FSL_USDHC_NUM	3
26 #define CONFIG_SYS_FSL_ESDHC_ADDR	USDHC2_BASE_ADDR
27 
28 /* RAM */
29 #define PHYS_SDRAM_1			MMDC0_ARB_BASE_ADDR
30 #define PHYS_SDRAM_2			MMDC1_ARB_BASE_ADDR
31 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
32 #define CONFIG_NR_DRAM_BANKS		2
33 #define CONFIG_SYS_MEMTEST_START	0x10000000
34 #define CONFIG_SYS_MEMTEST_END		0x10010000
35 #define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
36 #define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE
37 #define CONFIG_SYS_INIT_SP_OFFSET \
38 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
39 #define CONFIG_SYS_INIT_SP_ADDR \
40 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
41 
42 /* Serial console */
43 #define CONFIG_MXC_UART
44 #define CONFIG_MXC_UART_BASE		UART4_BASE
45 #define CONFIG_SYS_BAUDRATE_TABLE	{9600, 19200, 38400, 57600, 115200}
46 
47 /* SPI flash */
48 #define CONFIG_SF_DEFAULT_BUS		0
49 #define CONFIG_SF_DEFAULT_CS		0
50 #define CONFIG_SF_DEFAULT_SPEED		25000000
51 #define CONFIG_SF_DEFAULT_MODE		(SPI_MODE_0)
52 
53 /* MTD support */
54 #ifndef CONFIG_SPL_BUILD
55 #define CONFIG_MTD_DEVICE
56 #define CONFIG_MTD_PARTITIONS
57 #define CONFIG_SPI_FLASH_MTD
58 #endif
59 
60 /* Environment */
61 #define CONFIG_ENV_SPI_MAX_HZ		CONFIG_SF_DEFAULT_SPEED
62 #define CONFIG_ENV_SPI_MODE		CONFIG_SF_DEFAULT_MODE
63 #define CONFIG_ENV_SPI_BUS		CONFIG_SF_DEFAULT_BUS
64 #define CONFIG_ENV_SPI_CS		CONFIG_SF_DEFAULT_CS
65 #define CONFIG_ENV_SECT_SIZE		(64 * 1024)
66 #define CONFIG_ENV_SIZE			(8 * 1024)
67 #define CONFIG_ENV_OFFSET		(768 * 1024)
68 
69 #ifndef CONFIG_SPL_BUILD
70 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
71 #define CONFIG_EXTRA_ENV_SETTINGS \
72 	"fdt_high=0xffffffff\0" \
73 	"initrd_high=0xffffffff\0" \
74 	"fdt_addr_r=0x18000000\0" \
75 	"ramdisk_addr_r=0x13000000\0" \
76 	"kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
77 	"pxefile_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
78 	"scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \
79 	"fdtfile=undefined\0" \
80 	"stdin=serial,usbkbd\0" \
81 	"stdout=serial,vga\0" \
82 	"stderr=serial,vga\0" \
83 	"panel=HDMI\0" \
84 	"autoload=no\0" \
85 	"uImage=uImage-cm-fx6\0" \
86 	"zImage=zImage-cm-fx6\0" \
87 	"kernel=uImage-cm-fx6\0" \
88 	"dtb=cm-fx6.dtb\0" \
89 	"console=ttymxc3,115200\0" \
90 	"ethprime=FEC0\0" \
91 	"video_hdmi=mxcfb0:dev=hdmi,1920x1080M-32@50,if=RGB32\0" \
92 	"video_dvi=mxcfb0:dev=dvi,1280x800M-32@50,if=RGB32\0" \
93 	"doboot=bootm ${kernel_addr_r}\0" \
94 	"doloadfdt=false\0" \
95 	"mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
96 	"mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
97 	"setboottypez=setenv kernel ${zImage};" \
98 		"setenv doboot bootz ${kernel_addr_r} - ${fdt_addr_r};" \
99 		"setenv doloadfdt true;\0" \
100 	"setboottypem=setenv kernel ${uImage};" \
101 		"setenv doboot bootm ${kernel_addr_r};" \
102 		"setenv doloadfdt false;\0"\
103 	"mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
104 	"sataroot=/dev/sda2 rw rootwait\0" \
105 	"nandroot=/dev/mtdblock4 rw\0" \
106 	"nandrootfstype=ubifs\0" \
107 	"mmcargs=setenv bootargs console=${console} root=${mmcroot} " \
108 		"${video} ${extrabootargs}\0" \
109 	"sataargs=setenv bootargs console=${console} root=${sataroot} " \
110 		"${video} ${extrabootargs}\0" \
111 	"nandargs=setenv bootargs console=${console} " \
112 		"root=${nandroot} " \
113 		"rootfstype=${nandrootfstype} " \
114 		"${video} ${extrabootargs}\0" \
115 	"nandboot=if run nandloadkernel; then " \
116 			"run nandloadfdt;" \
117 			"run setboottypem;" \
118 			"run storagebootcmd;" \
119 			"run setboottypez;" \
120 			"run storagebootcmd;" \
121 		"fi;\0" \
122 	"run_eboot=echo Starting EBOOT ...; "\
123 		"mmc dev 2 && " \
124 		"mmc rescan && mmc read 10042000 a 400 && go 10042000\0" \
125 	"loadkernel=load ${storagetype} ${storagedev} ${kernel_addr_r} ${kernel};\0"\
126 	"loadfdt=load ${storagetype} ${storagedev} ${fdt_addr_r} ${dtb};\0" \
127 	"nandloadkernel=nand read ${kernel_addr_r} 0 780000;\0" \
128 	"nandloadfdt=nand read ${fdt_addr_r} 780000 80000;\0" \
129 	"setupmmcboot=setenv storagetype mmc; setenv storagedev 2;\0" \
130 	"setupsataboot=setenv storagetype sata; setenv storagedev 0;\0" \
131 	"setupnandboot=setenv storagetype nand;\0" \
132 	"storagebootcmd=echo Booting from ${storagetype} ...;" \
133 			"run ${storagetype}args; run doboot;\0" \
134 	"trybootk=if run loadkernel; then " \
135 		"if ${doloadfdt}; then " \
136 			"run loadfdt;" \
137 		"fi;" \
138 		"run storagebootcmd;" \
139 		"fi;\0" \
140 	"trybootsmz=" \
141 		"run setboottypem;" \
142 		"run trybootk;" \
143 		"run setboottypez;" \
144 		"run trybootk;\0" \
145 	"legacy_bootcmd=" \
146 		"run setupmmcboot;" \
147 		"mmc dev ${storagedev};" \
148 		"if mmc rescan; then " \
149 			"run trybootsmz;" \
150 		"fi;" \
151 		"run setupsataboot;" \
152 		"if sata init; then " \
153 			"run trybootsmz;" \
154 		"fi;" \
155 		"run setupnandboot;" \
156 		"run nandboot;\0" \
157 	"findfdt="\
158 		"if test $board_name = Utilite && test $board_rev = MX6Q ; then " \
159 			"setenv fdtfile imx6q-utilite-pro.dtb; fi; " \
160 		"if test $fdtfile = undefined; then " \
161 			"echo WARNING: Could not determine dtb to use; fi; \0" \
162 	BOOTENV
163 
164 #define CONFIG_PREBOOT		"usb start;sf probe"
165 
166 #define BOOT_TARGET_DEVICES(func) \
167 	func(USB, usb, 0) \
168 	func(MMC, mmc, 2) \
169 	func(SATA, sata, 0)
170 
171 #include <config_distro_bootcmd.h>
172 #else
173 #define CONFIG_EXTRA_ENV_SETTINGS
174 #endif
175 
176 /* SPI */
177 #define CONFIG_SPI
178 #define CONFIG_MXC_SPI
179 
180 /* NAND */
181 #ifndef CONFIG_SPL_BUILD
182 #define CONFIG_SYS_NAND_BASE		0x40000000
183 #define CONFIG_SYS_NAND_MAX_CHIPS	1
184 #define CONFIG_SYS_MAX_NAND_DEVICE	1
185 #define CONFIG_NAND_MXS
186 #define CONFIG_SYS_NAND_ONFI_DETECTION
187 /* APBH DMA is required for NAND support */
188 #define CONFIG_APBH_DMA
189 #define CONFIG_APBH_DMA_BURST
190 #define CONFIG_APBH_DMA_BURST8
191 #endif
192 
193 /* Ethernet */
194 #define CONFIG_FEC_MXC
195 #define CONFIG_FEC_MXC_PHYADDR		0
196 #define CONFIG_FEC_XCV_TYPE		RGMII
197 #define IMX_FEC_BASE			ENET_BASE_ADDR
198 #define CONFIG_PHY_ATHEROS
199 #define CONFIG_MII
200 #define CONFIG_ETHPRIME			"FEC0"
201 #define CONFIG_ARP_TIMEOUT		200UL
202 #define CONFIG_NET_RETRY_COUNT		5
203 
204 /* USB */
205 #define CONFIG_MXC_USB_PORTSC		(PORT_PTS_UTMI | PORT_PTS_PTW)
206 #define CONFIG_MXC_USB_FLAGS		0
207 #define CONFIG_USB_MAX_CONTROLLER_COUNT	2
208 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET	/* For OTG port */
209 
210 /* I2C */
211 #define CONFIG_SYS_I2C
212 #define CONFIG_SYS_I2C_MXC
213 #define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
214 #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
215 #define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
216 #define CONFIG_SYS_I2C_SPEED		100000
217 #define CONFIG_SYS_MXC_I2C3_SPEED	400000
218 
219 #define CONFIG_SYS_I2C_EEPROM_ADDR	0x50
220 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	1
221 #define CONFIG_SYS_I2C_EEPROM_BUS	2
222 
223 /* SATA */
224 #define CONFIG_SYS_SATA_MAX_DEVICE	1
225 #define CONFIG_LBA48
226 #define CONFIG_DWC_AHSATA_PORT_ID	0
227 #define CONFIG_DWC_AHSATA_BASE_ADDR	SATA_ARB_BASE_ADDR
228 
229 /* Boot */
230 #define CONFIG_SYS_BOOTMAPSZ	        (8 << 20)
231 #define CONFIG_SERIAL_TAG
232 
233 /* misc */
234 #define CONFIG_SYS_MALLOC_LEN			(10 * 1024 * 1024)
235 #define CONFIG_MISC_INIT_R
236 
237 /* SPL */
238 #include "imx6_spl.h"
239 #define CONFIG_SYS_SPI_U_BOOT_OFFS	(64 * 1024)
240 #define CONFIG_SPL_SPI_LOAD
241 
242 /* Display */
243 #define CONFIG_VIDEO_IPUV3
244 #define CONFIG_IMX_HDMI
245 
246 #define CONFIG_SPLASH_SCREEN
247 #define CONFIG_SPLASH_SOURCE
248 #define CONFIG_VIDEO_BMP_RLE8
249 
250 #define CONFIG_VIDEO_LOGO
251 #define CONFIG_VIDEO_BMP_LOGO
252 
253 /* EEPROM */
254 #define CONFIG_ENV_EEPROM_IS_ON_I2C
255 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		1
256 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	4
257 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	5
258 #define CONFIG_SYS_EEPROM_SIZE			256
259 
260 #endif	/* __CONFIG_CM_FX6_H */
261