1e32028a7SNikita Kiryanov /* 2e32028a7SNikita Kiryanov * Config file for Compulab CM-FX6 board 3e32028a7SNikita Kiryanov * 4e32028a7SNikita Kiryanov * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/ 5e32028a7SNikita Kiryanov * 6e32028a7SNikita Kiryanov * Author: Nikita Kiryanov <nikita@compulab.co.il> 7e32028a7SNikita Kiryanov * 8e32028a7SNikita Kiryanov * SPDX-License-Identifier: GPL-2.0+ 9e32028a7SNikita Kiryanov */ 10e32028a7SNikita Kiryanov 11e32028a7SNikita Kiryanov #ifndef __CONFIG_CM_FX6_H 12e32028a7SNikita Kiryanov #define __CONFIG_CM_FX6_H 13e32028a7SNikita Kiryanov 14e32028a7SNikita Kiryanov #include "mx6_common.h" 15e32028a7SNikita Kiryanov 16e32028a7SNikita Kiryanov /* Machine config */ 17e32028a7SNikita Kiryanov #define CONFIG_SYS_LITTLE_ENDIAN 18e32028a7SNikita Kiryanov #define CONFIG_MACH_TYPE 4273 19e32028a7SNikita Kiryanov 20e32028a7SNikita Kiryanov /* CMD */ 21*63a93093SChristopher Spinrath #define CONFIG_CMD_MTDPARTS 22e32028a7SNikita Kiryanov 23e32028a7SNikita Kiryanov /* MMC */ 24e32028a7SNikita Kiryanov #define CONFIG_SYS_FSL_USDHC_NUM 3 25e32028a7SNikita Kiryanov #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR 26e32028a7SNikita Kiryanov 27e32028a7SNikita Kiryanov /* RAM */ 28e32028a7SNikita Kiryanov #define PHYS_SDRAM_1 MMDC0_ARB_BASE_ADDR 29e32028a7SNikita Kiryanov #define PHYS_SDRAM_2 MMDC1_ARB_BASE_ADDR 30e32028a7SNikita Kiryanov #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 31e32028a7SNikita Kiryanov #define CONFIG_NR_DRAM_BANKS 2 32e32028a7SNikita Kiryanov #define CONFIG_SYS_MEMTEST_START 0x10000000 33e32028a7SNikita Kiryanov #define CONFIG_SYS_MEMTEST_END 0x10010000 34e32028a7SNikita Kiryanov #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 35e32028a7SNikita Kiryanov #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 36e32028a7SNikita Kiryanov #define CONFIG_SYS_INIT_SP_OFFSET \ 37e32028a7SNikita Kiryanov (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 38e32028a7SNikita Kiryanov #define CONFIG_SYS_INIT_SP_ADDR \ 39e32028a7SNikita Kiryanov (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 40e32028a7SNikita Kiryanov 41e32028a7SNikita Kiryanov /* Serial console */ 42e32028a7SNikita Kiryanov #define CONFIG_MXC_UART 43e32028a7SNikita Kiryanov #define CONFIG_MXC_UART_BASE UART4_BASE 44e32028a7SNikita Kiryanov #define CONFIG_BAUDRATE 115200 45e32028a7SNikita Kiryanov #define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200} 46e32028a7SNikita Kiryanov 47e32028a7SNikita Kiryanov /* Shell */ 48e32028a7SNikita Kiryanov #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 49e32028a7SNikita Kiryanov sizeof(CONFIG_SYS_PROMPT) + 16) 50e32028a7SNikita Kiryanov 51e32028a7SNikita Kiryanov /* SPI flash */ 52e32028a7SNikita Kiryanov #define CONFIG_SF_DEFAULT_BUS 0 53e32028a7SNikita Kiryanov #define CONFIG_SF_DEFAULT_CS 0 54e32028a7SNikita Kiryanov #define CONFIG_SF_DEFAULT_SPEED 25000000 55e32028a7SNikita Kiryanov #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) 56e32028a7SNikita Kiryanov 57*63a93093SChristopher Spinrath /* MTD support */ 58*63a93093SChristopher Spinrath #ifndef CONFIG_SPL_BUILD 59*63a93093SChristopher Spinrath #define CONFIG_FDT_FIXUP_PARTITIONS 60*63a93093SChristopher Spinrath #define CONFIG_MTD_DEVICE 61*63a93093SChristopher Spinrath #define CONFIG_MTD_PARTITIONS 62*63a93093SChristopher Spinrath #define CONFIG_SPI_FLASH_MTD 63*63a93093SChristopher Spinrath #endif 64*63a93093SChristopher Spinrath 65*63a93093SChristopher Spinrath #define MTDIDS_DEFAULT "nor0=spi0.0" 66*63a93093SChristopher Spinrath #define MTDPARTS_DEFAULT "mtdparts=spi0.0:" \ 67*63a93093SChristopher Spinrath "768k(uboot)," \ 68*63a93093SChristopher Spinrath "256k(uboot-environment)," \ 69*63a93093SChristopher Spinrath "-(reserved)" 70*63a93093SChristopher Spinrath 71e32028a7SNikita Kiryanov /* Environment */ 72e32028a7SNikita Kiryanov #define CONFIG_ENV_IS_IN_SPI_FLASH 73e32028a7SNikita Kiryanov #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 74e32028a7SNikita Kiryanov #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE 75e32028a7SNikita Kiryanov #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS 76e32028a7SNikita Kiryanov #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 77e32028a7SNikita Kiryanov #define CONFIG_ENV_SECT_SIZE (64 * 1024) 78e32028a7SNikita Kiryanov #define CONFIG_ENV_SIZE (8 * 1024) 79e32028a7SNikita Kiryanov #define CONFIG_ENV_OFFSET (768 * 1024) 80e32028a7SNikita Kiryanov 81e32028a7SNikita Kiryanov #define CONFIG_EXTRA_ENV_SETTINGS \ 821c2e5292SNikita Kiryanov "stdin=serial,usbkbd\0" \ 83deb94d61SNikita Kiryanov "stdout=serial,vga\0" \ 84deb94d61SNikita Kiryanov "stderr=serial,vga\0" \ 85deb94d61SNikita Kiryanov "panel=HDMI\0" \ 86e32028a7SNikita Kiryanov "autoload=no\0" \ 87f0f6724fSChristopher Spinrath "uImage=uImage-cm-fx6\0" \ 88f0f6724fSChristopher Spinrath "zImage=zImage-cm-fx6\0" \ 89508a6edeSNikita Kiryanov "kernel=uImage-cm-fx6\0" \ 90508a6edeSNikita Kiryanov "script=boot.scr\0" \ 91508a6edeSNikita Kiryanov "dtb=cm-fx6.dtb\0" \ 92508a6edeSNikita Kiryanov "bootm_low=18000000\0" \ 93e32028a7SNikita Kiryanov "loadaddr=0x10800000\0" \ 94e32028a7SNikita Kiryanov "fdtaddr=0x11000000\0" \ 95e32028a7SNikita Kiryanov "console=ttymxc3,115200\0" \ 96e32028a7SNikita Kiryanov "ethprime=FEC0\0" \ 97e32028a7SNikita Kiryanov "video_hdmi=mxcfb0:dev=hdmi,1920x1080M-32@50,if=RGB32\0" \ 98e32028a7SNikita Kiryanov "video_dvi=mxcfb0:dev=dvi,1280x800M-32@50,if=RGB32\0" \ 99e32028a7SNikita Kiryanov "doboot=bootm ${loadaddr}\0" \ 100508a6edeSNikita Kiryanov "doloadfdt=false\0" \ 101*63a93093SChristopher Spinrath "mtdids=" MTDIDS_DEFAULT "\0" \ 102*63a93093SChristopher Spinrath "mtdparts=" MTDPARTS_DEFAULT "\0" \ 103f0f6724fSChristopher Spinrath "setboottypez=setenv kernel ${zImage};" \ 104e32028a7SNikita Kiryanov "setenv doboot bootz ${loadaddr} - ${fdtaddr};" \ 105508a6edeSNikita Kiryanov "setenv doloadfdt true;\0" \ 106f0f6724fSChristopher Spinrath "setboottypem=setenv kernel ${uImage};" \ 107e32028a7SNikita Kiryanov "setenv doboot bootm ${loadaddr};" \ 108508a6edeSNikita Kiryanov "setenv doloadfdt false;\0"\ 109e32028a7SNikita Kiryanov "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \ 110206f38f7SNikita Kiryanov "sataroot=/dev/sda2 rw rootwait\0" \ 111a6b0652bSNikita Kiryanov "nandroot=/dev/mtdblock4 rw\0" \ 112a6b0652bSNikita Kiryanov "nandrootfstype=ubifs\0" \ 113508a6edeSNikita Kiryanov "mmcargs=setenv bootargs console=${console} root=${mmcroot} " \ 114f0f6724fSChristopher Spinrath "${video} ${extrabootargs}\0" \ 115508a6edeSNikita Kiryanov "sataargs=setenv bootargs console=${console} root=${sataroot} " \ 116f0f6724fSChristopher Spinrath "${video} ${extrabootargs}\0" \ 117a6b0652bSNikita Kiryanov "nandargs=setenv bootargs console=${console} " \ 118a6b0652bSNikita Kiryanov "root=${nandroot} " \ 119a6b0652bSNikita Kiryanov "rootfstype=${nandrootfstype} " \ 120f0f6724fSChristopher Spinrath "${video} ${extrabootargs}\0" \ 121508a6edeSNikita Kiryanov "nandboot=if run nandloadkernel; then " \ 122a6b0652bSNikita Kiryanov "run nandloadfdt;" \ 123508a6edeSNikita Kiryanov "run setboottypem;" \ 124508a6edeSNikita Kiryanov "run storagebootcmd;" \ 125508a6edeSNikita Kiryanov "run setboottypez;" \ 126508a6edeSNikita Kiryanov "run storagebootcmd;" \ 127508a6edeSNikita Kiryanov "fi;\0" \ 128508a6edeSNikita Kiryanov "run_eboot=echo Starting EBOOT ...; "\ 129508a6edeSNikita Kiryanov "mmc dev 2 && " \ 130508a6edeSNikita Kiryanov "mmc rescan && mmc read 10042000 a 400 && go 10042000\0" \ 131508a6edeSNikita Kiryanov "loadscript=load ${storagetype} ${storagedev} ${loadaddr} ${script};\0"\ 132508a6edeSNikita Kiryanov "loadkernel=load ${storagetype} ${storagedev} ${loadaddr} ${kernel};\0"\ 133508a6edeSNikita Kiryanov "loadfdt=load ${storagetype} ${storagedev} ${fdtaddr} ${dtb};\0" \ 134508a6edeSNikita Kiryanov "bootscript=echo Running bootscript from ${storagetype} ...;" \ 135508a6edeSNikita Kiryanov "source ${loadaddr};\0" \ 136508a6edeSNikita Kiryanov "nandloadkernel=nand read ${loadaddr} 0 780000;\0" \ 137508a6edeSNikita Kiryanov "nandloadfdt=nand read ${fdtaddr} 780000 80000;\0" \ 138508a6edeSNikita Kiryanov "setupmmcboot=setenv storagetype mmc; setenv storagedev 2;\0" \ 139508a6edeSNikita Kiryanov "setupsataboot=setenv storagetype sata; setenv storagedev 0;\0" \ 140508a6edeSNikita Kiryanov "setupnandboot=setenv storagetype nand;\0" \ 141508a6edeSNikita Kiryanov "setupusbboot=setenv storagetype usb; setenv storagedev 0;\0" \ 142508a6edeSNikita Kiryanov "storagebootcmd=echo Booting from ${storagetype} ...;" \ 143508a6edeSNikita Kiryanov "run ${storagetype}args; run doboot;\0" \ 144508a6edeSNikita Kiryanov "trybootk=if run loadkernel; then " \ 145508a6edeSNikita Kiryanov "if ${doloadfdt}; then " \ 146508a6edeSNikita Kiryanov "run loadfdt;" \ 147a6b0652bSNikita Kiryanov "fi;" \ 148508a6edeSNikita Kiryanov "run storagebootcmd;" \ 149508a6edeSNikita Kiryanov "fi;\0" \ 150508a6edeSNikita Kiryanov "trybootsmz=if run loadscript; then " \ 151508a6edeSNikita Kiryanov "run bootscript;" \ 152e32028a7SNikita Kiryanov "fi;" \ 153508a6edeSNikita Kiryanov "run setboottypem;" \ 154508a6edeSNikita Kiryanov "run trybootk;" \ 155508a6edeSNikita Kiryanov "run setboottypez;" \ 156508a6edeSNikita Kiryanov "run trybootk;\0" 157e32028a7SNikita Kiryanov 158e32028a7SNikita Kiryanov #define CONFIG_BOOTCOMMAND \ 159508a6edeSNikita Kiryanov "run setupmmcboot;" \ 160508a6edeSNikita Kiryanov "mmc dev ${storagedev};" \ 161508a6edeSNikita Kiryanov "if mmc rescan; then " \ 162508a6edeSNikita Kiryanov "run trybootsmz;" \ 163508a6edeSNikita Kiryanov "fi;" \ 164508a6edeSNikita Kiryanov "run setupusbboot;" \ 165508a6edeSNikita Kiryanov "if usb start; then "\ 166508a6edeSNikita Kiryanov "if run loadscript; then " \ 167508a6edeSNikita Kiryanov "run bootscript;" \ 168508a6edeSNikita Kiryanov "fi;" \ 169508a6edeSNikita Kiryanov "fi;" \ 170508a6edeSNikita Kiryanov "run setupsataboot;" \ 171508a6edeSNikita Kiryanov "if sata init; then " \ 172508a6edeSNikita Kiryanov "run trybootsmz;" \ 173508a6edeSNikita Kiryanov "fi;" \ 174508a6edeSNikita Kiryanov "run setupnandboot;" \ 175508a6edeSNikita Kiryanov "run nandboot;" 176e32028a7SNikita Kiryanov 177*63a93093SChristopher Spinrath #define CONFIG_PREBOOT "usb start;sf probe" 1781c2e5292SNikita Kiryanov 179e32028a7SNikita Kiryanov /* SPI */ 180e32028a7SNikita Kiryanov #define CONFIG_SPI 181e32028a7SNikita Kiryanov #define CONFIG_MXC_SPI 182e32028a7SNikita Kiryanov 183a6b0652bSNikita Kiryanov /* NAND */ 184a6b0652bSNikita Kiryanov #ifndef CONFIG_SPL_BUILD 185a6b0652bSNikita Kiryanov #define CONFIG_CMD_NAND 186a6b0652bSNikita Kiryanov #define CONFIG_SYS_NAND_BASE 0x40000000 187a6b0652bSNikita Kiryanov #define CONFIG_SYS_NAND_MAX_CHIPS 1 188a6b0652bSNikita Kiryanov #define CONFIG_SYS_MAX_NAND_DEVICE 1 189a6b0652bSNikita Kiryanov #define CONFIG_NAND_MXS 190a6b0652bSNikita Kiryanov #define CONFIG_SYS_NAND_ONFI_DETECTION 191a6b0652bSNikita Kiryanov /* APBH DMA is required for NAND support */ 192a6b0652bSNikita Kiryanov #define CONFIG_APBH_DMA 193a6b0652bSNikita Kiryanov #define CONFIG_APBH_DMA_BURST 194a6b0652bSNikita Kiryanov #define CONFIG_APBH_DMA_BURST8 195a6b0652bSNikita Kiryanov #endif 196a6b0652bSNikita Kiryanov 19702b1343eSNikita Kiryanov /* Ethernet */ 19802b1343eSNikita Kiryanov #define CONFIG_FEC_MXC 19902b1343eSNikita Kiryanov #define CONFIG_FEC_MXC_PHYADDR 0 20002b1343eSNikita Kiryanov #define CONFIG_FEC_XCV_TYPE RGMII 20102b1343eSNikita Kiryanov #define IMX_FEC_BASE ENET_BASE_ADDR 20202b1343eSNikita Kiryanov #define CONFIG_PHYLIB 20302b1343eSNikita Kiryanov #define CONFIG_PHY_ATHEROS 20402b1343eSNikita Kiryanov #define CONFIG_MII 20502b1343eSNikita Kiryanov #define CONFIG_ETHPRIME "FEC0" 20602b1343eSNikita Kiryanov #define CONFIG_ARP_TIMEOUT 200UL 20702b1343eSNikita Kiryanov #define CONFIG_NET_RETRY_COUNT 5 20802b1343eSNikita Kiryanov 2090f3effb9SNikita Kiryanov /* USB */ 2100f3effb9SNikita Kiryanov #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 2110f3effb9SNikita Kiryanov #define CONFIG_MXC_USB_FLAGS 0 2120f3effb9SNikita Kiryanov #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 2130f3effb9SNikita Kiryanov #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ 2141c2e5292SNikita Kiryanov #define CONFIG_SYS_STDIO_DEREGISTER 2150f3effb9SNikita Kiryanov 216f42b2f60SNikita Kiryanov /* I2C */ 217f42b2f60SNikita Kiryanov #define CONFIG_SYS_I2C 218f42b2f60SNikita Kiryanov #define CONFIG_SYS_I2C_MXC 21903544c66SAlbert ARIBAUD \\(3ADEV\\) #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 22003544c66SAlbert ARIBAUD \\(3ADEV\\) #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 221f8cb101eSYork Sun #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 222f42b2f60SNikita Kiryanov #define CONFIG_SYS_I2C_SPEED 100000 223f42b2f60SNikita Kiryanov #define CONFIG_SYS_MXC_I2C3_SPEED 400000 224f42b2f60SNikita Kiryanov 225f42b2f60SNikita Kiryanov #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 226f42b2f60SNikita Kiryanov #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 227f42b2f60SNikita Kiryanov #define CONFIG_SYS_I2C_EEPROM_BUS 2 228f42b2f60SNikita Kiryanov 229206f38f7SNikita Kiryanov /* SATA */ 230206f38f7SNikita Kiryanov #define CONFIG_CMD_SATA 231206f38f7SNikita Kiryanov #define CONFIG_SYS_SATA_MAX_DEVICE 1 232206f38f7SNikita Kiryanov #define CONFIG_LIBATA 233206f38f7SNikita Kiryanov #define CONFIG_LBA48 234206f38f7SNikita Kiryanov #define CONFIG_DWC_AHSATA 235206f38f7SNikita Kiryanov #define CONFIG_DWC_AHSATA_PORT_ID 0 236206f38f7SNikita Kiryanov #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR 237206f38f7SNikita Kiryanov 238e32028a7SNikita Kiryanov /* Boot */ 239e32028a7SNikita Kiryanov #define CONFIG_SYS_BOOTMAPSZ (8 << 20) 240f66113c0SNikita Kiryanov #define CONFIG_SERIAL_TAG 241e32028a7SNikita Kiryanov 242e32028a7SNikita Kiryanov /* misc */ 243e32028a7SNikita Kiryanov #define CONFIG_STACKSIZE (128 * 1024) 2449fbdcf01SNikita Kiryanov #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 245e32028a7SNikita Kiryanov #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 800 /* 400 KB */ 2467d1abb7dSNikita Kiryanov #define CONFIG_MISC_INIT_R 247e32028a7SNikita Kiryanov 248e32028a7SNikita Kiryanov /* SPL */ 249e32028a7SNikita Kiryanov #include "imx6_spl.h" 250e32028a7SNikita Kiryanov #define CONFIG_SPL_MMC_SUPPORT 251e32028a7SNikita Kiryanov #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x80 /* offset 64 kb */ 252e32028a7SNikita Kiryanov #define CONFIG_SYS_MONITOR_LEN (CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS / 2 * 1024) 253e32028a7SNikita Kiryanov #define CONFIG_SPL_SPI_SUPPORT 254e32028a7SNikita Kiryanov #define CONFIG_SPL_SPI_FLASH_SUPPORT 255e32028a7SNikita Kiryanov #define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024) 256e32028a7SNikita Kiryanov #define CONFIG_SPL_SPI_LOAD 257e32028a7SNikita Kiryanov 258deb94d61SNikita Kiryanov /* Display */ 259deb94d61SNikita Kiryanov #define CONFIG_VIDEO 260deb94d61SNikita Kiryanov #define CONFIG_VIDEO_IPUV3 261deb94d61SNikita Kiryanov #define CONFIG_IPUV3_CLK 260000000 262deb94d61SNikita Kiryanov #define CONFIG_IMX_HDMI 263deb94d61SNikita Kiryanov #define CONFIG_CFB_CONSOLE 264deb94d61SNikita Kiryanov #define CONFIG_VGA_AS_SINGLE_DEVICE 265deb94d61SNikita Kiryanov #define CONFIG_SYS_CONSOLE_IS_IN_ENV 266deb94d61SNikita Kiryanov #define CONFIG_CONSOLE_MUX 267deb94d61SNikita Kiryanov #define CONFIG_VIDEO_SW_CURSOR 268deb94d61SNikita Kiryanov 2693a236a35SNikita Kiryanov #define CONFIG_SPLASH_SCREEN 270f82eb2faSNikita Kiryanov #define CONFIG_SPLASH_SOURCE 2713a236a35SNikita Kiryanov #define CONFIG_CMD_BMP 2723a236a35SNikita Kiryanov #define CONFIG_VIDEO_BMP_RLE8 2733a236a35SNikita Kiryanov 2748015dde8SNikita Kiryanov #define CONFIG_VIDEO_LOGO 2758015dde8SNikita Kiryanov #define CONFIG_VIDEO_BMP_LOGO 2768015dde8SNikita Kiryanov 27712616531SNikita Kiryanov /* EEPROM */ 27812616531SNikita Kiryanov #define CONFIG_CMD_EEPROM 27912616531SNikita Kiryanov #define CONFIG_ENV_EEPROM_IS_ON_I2C 28012616531SNikita Kiryanov #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 28112616531SNikita Kiryanov #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 28212616531SNikita Kiryanov #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 28312616531SNikita Kiryanov #define CONFIG_SYS_EEPROM_SIZE 256 28412616531SNikita Kiryanov 28512616531SNikita Kiryanov #define CONFIG_CMD_EEPROM_LAYOUT 28612616531SNikita Kiryanov #define CONFIG_EEPROM_LAYOUT_HELP_STRING "v2, v3" 28712616531SNikita Kiryanov 288e32028a7SNikita Kiryanov #endif /* __CONFIG_CM_FX6_H */ 289